Hi!
My name is Joao Pinto and I am currently developing a pilot project with ARM' Juno r1 board. The application is very simple: I have a Synopsys board connected to Juno through PCIe. Using ARM' factory kernel image or our own linaro kernel image (using latest release: 4.1 rc4), PCI initialization log provides some worrying messages (please check bellow log).
pci_hotplug: PCI Hot Plug PCI Core version: 0.5 pciehp: PCI Express Hot Plug Controller Driver version: 0.4 PCI host bridge /pci@30000000 ranges: IO 0x5ff00000..0x5fffffff -> 0x00000000 MEM 0x50000000..0x5effffff -> 0x00000000 MEM 0x4000000000..0x407fffffff -> 0x20000000 MEM 0x4080000000..0x40ffffffff -> 0xa0000000 XpressRICH3-AXI PCIe Host Bridge 4x link negotiated (gen 2), maxpayload 256, maxreqsize 1024 pcie-xr3 7ff30000.pci: PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [bus 00-ff] pci_bus 0000:00: root bus resource [io 0x0000-0xfffff] pci_bus 0000:00: root bus resource [mem 0x50000000-0x5effffff] (bus address [0x00000000-0x0effffff]) pci_bus 0000:00: root bus resource [mem 0x4000000000-0x407fffffff pref] (bus address [0x20000000-0x9fffffff]) pci_bus 0000:00: root bus resource [mem 0x4080000000-0x40ffffffff] (bus address [0xa0000000-0x11fffffff]) pci 0000:00:00.0: [1556:1100] type 01 class 0xff0000 pci 0000:00:00.0: reg 0x10: [mem 0x50000000-0x50003fff 64bit pref] pci 0000:00:00.0: supports D1 D2 pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring pci 0000:01:00.0: [111d:8090] type 01 class 0x060400 pci 0000:01:00.0: PME# supported from D0 D3hot D3cold pci 0000:01:00.0: of_irq_parse_pci() failed with rc=-19 pci 0000:01:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring pci 0000:02:01.0: [111d:8090] type 01 class 0x060400 pci 0000:02:01.0: PME# supported from D0 D3hot D3cold pci 0000:02:01.0: of_irq_parse_pci() failed with rc=-19 pci 0000:02:02.0: [111d:8090] type 01 class 0x060400 pci 0000:02:02.0: PME# supported from D0 D3hot D3cold pci 0000:02:02.0: of_irq_parse_pci() failed with rc=-19 pci 0000:02:03.0: [111d:8090] type 01 class 0x060400 pci 0000:02:03.0: PME# supported from D0 D3hot D3cold pci 0000:02:03.0: of_irq_parse_pci() failed with rc=-19 pci 0000:02:0c.0: [111d:8090] type 01 class 0x060400 pci 0000:02:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring pci 0000:02:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring pci 0000:02:03.0: bridge configuration invalid ([bus 00-00]), reconfiguring pci 0000:02:0c.0: bridge configuration invalid ([bus 00-00]), reconfiguring pci 0000:02:10.0: bridge configuration invalid ([bus 00-00]), reconfiguring pci 0000:02:1f.0: bridge configuration invalid ([bus 00-00]), reconfiguring pci 0000:03:00.0: [1095:3132] type 00 class 0x018000 pci 0000:03:00.0: reg 0x10: [mem 0x50000000-0x5000007f 64bit] pci 0000:03:00.0: reg 0x18: [mem 0x50000000-0x50003fff 64bit] pci 0000:03:00.0: reg 0x20: [io 0x0000-0x007f] pci 0000:03:00.0: reg 0x30: [mem 0x50000000-0x5007ffff pref] pci 0000:03:00.0: supports D1 D2 pci 0000:03:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'11:07 AM pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03 pci 0000:04:00.0: [16c3:abcd] type 00 class 0x0c0330 pci 0000:04:00.0: reg 0x10: [mem 0x50000000-0x500fffff 64bit] pci 0000:04:00.0: reg 0x30: [mem 0x50000000-0x5000ffff pref] pci 0000:04:00.0: supports D1 pci 0000:04:00.0: PME# supported from D0 D1 D3hot D3cold pci_bus 0000:04: busn_res: [bus 04-ff] end is updated to 04 pci_bus 0000:05: busn_res: [bus 05-ff] end is updated to 05 pci_bus 0000:06: busn_res: [bus 06-ff] end is updated to 06 pci_bus 0000:07: busn_res: [bus 07-ff] end is updated to 07 pci 0000:08:00.0: [11ab:4380] type 00 class 0x020000 pci 0000:08:00.0: reg 0x10: [mem 0x50000000-0x50003fff 64bit] pci 0000:08:00.0: reg 0x18: [io 0x0000-0x00ff] pci 0000:08:00.0: supports D1 D2 pci 0000:08:00.0: PME# supported from D0 D1 D2 D3hot D3cold pci_bus 0000:08: busn_res: [bus 08-ff] end is updated to 08 pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 08 pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 08 pcie-xr3 7ff30000.pci: Unable to locate msi-parent node. dma-pl330 7ff00000.dma: Loaded driver for PL330 DMAC-341330 dma-pl330 7ff00000.dma: DBUFF-1024x16bytes Num_Chans-8 Num_Peri-8 Num_Events-8
In our initial test, despite the previous failure messages we were able to see the PCI bus and devices (through lspci command) where you can see Synopsys board on 04:00.0:
00:00.0 PCI bridge: PLDA PCI Express Core Reference Design (rev 01) 01:00.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8090 (rev 02) 02:01.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8090 (rev 02) 02:02.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8090 (rev 02) 02:03.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8090 (rev 02) 02:0c.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8090 (rev 02) 02:10.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8090 (rev 02) 02:1f.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8090 (rev 02) 03:00.0 Mass storage controller: Silicon Image, Inc. SiI 3132 Serial ATA Raid II Controller (rev 01) 04:00.0 USB controller: Synopsys, Inc. Device abcd (rev 01) 08:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8057 PCI-E Gigabit Ethernet Controller
But after several driver initialization failures we checked that 03:00.0, 04:00.0 and 08:00.0 PCI devices are pointing to the same base address:
03:00.0 Mass storage controller: Silicon Image, Inc. SiI 3132 Serial ATA Raid II Controller (rev 01) Subsystem: Silicon Image, Inc. SiI 3132 Serial ATA Raid II Controller Flags: fast devsel, IRQ 36 Memory at 50000000 (64-bit, non-prefetchable) [disabled] [size=128] Memory at 50000000 (64-bit, non-prefetchable) [disabled] [size=16K] I/O ports at <unassigned> [disabled] [size=128] [virtual] Expansion ROM at 50000000 [disabled] [size=512K] Capabilities: [54] Power Management version 2 Capabilities: [5c] MSI: Enable- Count=1/1 Maskable- 64bit+ Capabilities: [70] Express Legacy Endpoint, MSI 00 Capabilities: [100] Advanced Error Reporting
04:00.0 USB controller: Synopsys, Inc. Device abcd (rev 01) (prog-if 30 [XHCI]) Subsystem: Synopsys, Inc. Device 0124 Flags: bus master, fast devsel, latency 0, IRQ 37 Memory at 50000000 (64-bit, non-prefetchable) [size=1M] [virtual] Expansion ROM at 50000000 [disabled] [size=64K] Capabilities: [40] Power Management version 3 Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+ Capabilities: [70] Express Endpoint, MSI 00 Capabilities: [100] Advanced Error Reporting
08:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8057 PCI-E Gigabit Ethernet Controller Subsystem: Marvell Technology Group Ltd. 88E8057 PCI-E Gigabit Ethernet Controller Flags: fast devsel, IRQ 38 Memory at 50000000 (64-bit, non-prefetchable) [disabled] [size=16K] I/O ports at <unassigned> [disabled] [size=256] Capabilities: [48] Power Management version 3 Capabilities: [5c] MSI: Enable- Count=1/1 Maskable- 64bit+ Capabilities: [c0] Express Legacy Endpoint, MSI 00 Capabilities: [100] Advanced Error Reporting Capabilities: [130] Device Serial Number 00-00-00-00-00-00-00-00
I tried also to read a register from our USB Controller (0xc120) though devmem (provided by Busybox) using the base address 0x50000000 + 0xc120 offset and the result is a segmentation fault which is not normal. In our opinion the PCI has problems in the initialization and obviously that reflects in its memory mapping.
I would like to know if this is a known issue and what should we do to overcome it.
Thanks, Joao Pinto
IMPORTANT NOTICE: This email message, which includes any attachments, may contain confidential, proprietary and/or privileged information for the sole use of the intended recipient. Any unauthorized review, use, copying, disclosure or distribution is prohibited. If you are not the intended recipient, please immediately contact the sender by reply email and permanently destroy the original and any copies of this message. Thank you.