On Sat, 1 Feb 2014, Brown, Len wrote:
Right now (on ARM at least but I imagine this is pretty universal), the biggest impact on information accuracy for a CPU depends on what the other CPUs are doing. The most obvious example is cluster power down. For a cluster to be powered down, all the CPUs sharing this cluster must also be powered down. And all those CPUs must have agreed to a possible cluster power down in advance as well. But it is not because an idle CPU has agreed to the extra latency imposed by a cluster power down that the cluster has actually powered down since another CPU in that cluster might still be running, in which case the recorded latency information for that idle CPU would be higher than it would be in practice at that moment.
That will not work.
What will not work?
When a CPU goes idle, it uses the CURRENT criteria for entering that state. If the criteria change after it has entered the state, are you going to wake it up so it can re-evaluate? No.
That's not what I'm saying at all.
That is why the state must describe the worst case latency that CPU may see when waking from the state on THAT entry.
No disagreement there. Isn't that what I'm saying?
That is why we use the package C-state numbers to describe core C-states on IA.
And your point is?
Nicolas