26 Oct
2018
26 Oct
'18
8:52 p.m.
On 10/26/2018 03:14 PM, Thor Thayer wrote:
Gentle ping.
On 9/25/18 10:21 AM, thor.thayer@linux.intel.com wrote:
From: Thor Thayer thor.thayer@linux.intel.com
The address in the SDRAM node was incorrect. Fix this to agree with the correct address and to match the reg definition block.
Cc: stable@vger.kernel.org Fixes: 54b4a8f57848b("arm: socfpga: dts: Add Arria10 SDRAM EDAC DTS support") Signed-off-by: Thor Thayer thor.thayer@linux.intel.com
arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
This is already in arm-soc/next/dt and should land in v4.20-rc1.
Dinh