From: Matt Roper matthew.d.roper@intel.com
commit 25b79ad51bf04a8aa67b5bccd631fc05f963b8e0 upstream.
The workaround database now indicates we need to disable psdunit clock gating as well.
v3: - Rebase on top of other workarounds that have landed. - Restrict cc:stable tag to 5.2+ since that's when ICL was first officially supported.
Bspec: 32354 Bspec: 33450 Bspec: 33451 Suggested-by: Lionel Landwerlin lionel.g.landwerlin@intel.com Cc: stable@vger.kernel.org # v5.2+ Cc: Lionel Landwerlin lionel.g.landwerlin@intel.com Cc: Lucas De Marchi lucas.demarchi@intel.com Cc: Matt Atwood matthew.s.atwood@intel.com Signed-off-by: Matt Roper matthew.d.roper@intel.com Acked-by: Lionel Landwerlin lionel.g.landwerlin@intel.com Link: https://patchwork.freedesktop.org/patch/msgid/20191231190713.1549533-1-matth... (cherry picked from commit 1cd21a7c5679015352e8a6f46813aced51d71bb8) Signed-off-by: Joonas Lahtinen joonas.lahtinen@linux.intel.com Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org
--- drivers/gpu/drm/i915/i915_reg.h | 4 ++++ drivers/gpu/drm/i915/intel_pm.c | 3 +++ 2 files changed, 7 insertions(+)
--- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4053,6 +4053,10 @@ enum { #define HSUNIT_CLKGATE_DIS REG_BIT(8) #define VSUNIT_CLKGATE_DIS REG_BIT(3)
+#define UNSLICE_UNIT_LEVEL_CLKGATE2 _MMIO(0x94e4) +#define VSUNIT_CLKGATE_DIS_TGL REG_BIT(19) +#define PSDUNIT_CLKGATE_DIS REG_BIT(5) + #define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560) #define CGPSF_CLKGATE_DIS (1 << 3)
--- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -9202,6 +9202,9 @@ static void icl_init_clock_gating(struct intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE, 0, VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
+ /* Wa_1407352427:icl,ehl */ + intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2, + 0, PSDUNIT_CLKGATE_DIS); }
static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)