On Tue, May 13, 2025 at 2:23 PM David (Ming Qiang) Wu David.Wu3@amd.com wrote:

V2: not to add extra read-back in vcn_v4_0_5_start as there is a read-back already. New comment for better understanding.

On VCN v4.0.5 there is a race condition where the WPTR is not updated after starting from idle when doorbell is used. The read-back of regVCN_RB1_DB_CTRL register after written is to ensure the doorbell_index is updated before it can work properly.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12528 Cc: stable@vger.kernel.org

Signed-off-by: David (Ming Qiang) Wu David.Wu3@amd.com Reviewed-by: Mario Limonciello mario.limonciello@amd.com Tested-by: Mario Limonciello mario.limonciello@amd.com

Reviewed-by: Alex Deucher alexander.deucher@amd.com

---

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c | 4 ++++ 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c index ed00d35039c13..e55b76d71367d 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c @@ -1034,6 +1034,10 @@ static int vcn_v4_0_5_start_dpg_mode(struct amdgpu_vcn_inst *vinst, ring->doorbell_index << VCN_RB1_DB_CTRL__OFFSET__SHIFT | VCN_RB1_DB_CTRL__EN_MASK);

•   /* Keeping one read-back to ensure all register writes are done, otherwise
  

•    * it may introduce race conditions */
  

•   RREG32_SOC15(VCN, inst_idx, regVCN_RB1_DB_CTRL);
  

•   return 0;
  

}

-- 2.34.1