On Sun, Jun 09, 2024 at 11:21:55PM -0700, Ron Economos wrote:
On 6/9/24 12:34 PM, Pavel Machek wrote:
Hi!
This is the start of the stable review cycle for the 6.6.33 release. There are 741 patches in this series, all will be posted as a response to this one. If anyone has any issues with these being applied, please let me know.
6.6 seems to have build problem on risc-v:
CC kernel/locking/qrwlock.o 690 CC lib/bug.o 691 CC block/blk-rq-qos.o 692 arch/riscv/kernel/suspend.c: In function 'suspend_save_csrs': 693 arch/riscv/kernel/suspend.c:14:66: error: 'RISCV_ISA_EXT_XLINUXENVCFG' undeclared (first use in this function); did you mean 'RISCV_ISA_EXT_ZIFENCEI'? 694 14 | if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_XLINUXENVCFG)) 695 | ^~~~~~~~~~~~~~~~~~~~~~~~~~ 696 | RISCV_ISA_EXT_ZIFENCEI 697 arch/riscv/kernel/suspend.c:14:66: note: each undeclared identifier is reported only once for each function it appears in 698 CC io_uring/io-wq.o 699 arch/riscv/kernel/suspend.c: In function 'suspend_restore_csrs': 700 arch/riscv/kernel/suspend.c:37:66: error: 'RISCV_ISA_EXT_XLINUXENVCFG' undeclared (first use in this function); did you mean 'RISCV_ISA_EXT_ZIFENCEI'? 701 37 | if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_XLINUXENVCFG)) 702 | ^~~~~~~~~~~~~~~~~~~~~~~~~~ 703 | RISCV_ISA_EXT_ZIFENCEI 704 make[4]: *** [scripts/Makefile.build:243: arch/riscv/kernel/suspend.o] Error 1 705 make[3]: *** [scripts/Makefile.build:480: arch/riscv/kernel] Error 2 706 make[2]: *** [scripts/Makefile.build:480: arch/riscv] Error 2 707 make[2]: *** Waiting for unfinished jobs.... 708 CC lib/buildid.o 709
https://gitlab.com/cip-project/cip-testing/linux-stable-rc-ci/-/jobs/7053222... https://gitlab.com/cip-project/cip-testing/linux-stable-rc-ci/-/pipelines/13...
No problems detected on 6.8-stable and 6.1-stable.
Best regards, Pavel
I'm seeing the same thing here. Somehow some extra patches got slipped in between rc1 and rc2. The new patches for RISC-V are:
Samuel Holland samuel.holland@sifive.com riscv: Save/restore envcfg CSR during CPU suspend
commit 88b55a586b87994a33e0285c9e8881485e9b77ea
Samuel Holland samuel.holland@sifive.com riscv: Fix enabling cbo.zero when running in M-mode
commit 8c6e096cf527d65e693bfbf00aa6791149c58552
The first patch "riscv: Save/restore envcfg CSR during CPU suspend" causes the build failure.
Yes, these were added because they were marked as fixes for other commits in the series. I'll unwind them all now as something is going wrong...
greg k-h