Tcwg-commits June 2016

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3603 discussions

[toolchain/luajit-aarch64] branch old/aarch64-v2.1 created (now af6bca9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. charles.baylis pushed a change to branch old/aarch64-v2.1 in repository toolchain/luajit-aarch64. at af6bca9 More stuff No new revisions were added by this update. -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years

[toolchain/luajit-aarch64] branch old/aarch64-use-dispatch created (now 29f7d5e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. charles.baylis pushed a change to branch old/aarch64-use-dispatch in repository toolchain/luajit-aarch64. at 29f7d5e dubious patch to use DISPATCH register in the way ARM does. This branch includes the following new commits: new f804d59 Remove TISNIL register alias to make space for DISPATCH register new 29f7d5e dubious patch to use DISPATCH register in the way ARM does. The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years

[toolchain/luajit-aarch64] branch aarch64-v2.1-new created (now aff9aba)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. charles.baylis pushed a change to branch aarch64-v2.1-new in repository toolchain/luajit-aarch64. at aff9aba Cleanup for ahuvload This branch includes the following new commits: new 221268b Use the GDB JIT API in a thread-safe manner. new f05280e x86/x64: Fix instruction length decoder. new 6a99732 Merge branch 'master' into v2.1 new 35b09e6 Windows/x86: Add full exception interoperability. new 573daa9 Fix dependencies. new 5837c2a Remove assumption that lj_math_random_step() doesn't clobber FPRs. new 4fe400c Merge branch 'master' into v2.1 new d4f3b11 Workaround for MinGW headers lacking some exception definitions. new 37e1e70 Add guard for obscure aliasing between open upvalues and SSA slots. new 475a6ae Merge branch 'master' into v2.1 new 1931b38 LJ_GC64: Introduce IRT_PGC. new cfa188f Move common 32/64 bit in-memory FP constants to jit_State. new 786dbb2 Add IR_FLOAD with REF_NIL for field loads from GG_State. new ccae333 Load SIMD constants with IR_FLOAD from GG_State. new 5135876 Add ra_addrename(). new a657fa0 Make the IR immovable after assembly. new 3152ed9 Simplify GCtrace * reference embedding for trace stitching. new a406797 Always walk IR constants in ascending order. new 7fb75cc Embed 64 bit constants directly in the IR, using two slots. new 9e99ccc Strip out old infrastructure for 64 bit constants. new f26679c LJ_GC64: Add support for 64 bit GCobj constants in the IR. new 8f868a9 LJ_GC64: Update IR type sizes. new 6c8258d LJ_FR2: Add support for trace recording and snapshots. new 2868715 x64/LJ_GC64: Add missing backend support and enable JIT compilation. new 747feb6 x86: Don't spill an explicit REF_BASE in the IR. new bfe2a35 Merge branch 'master' into v2.1 new 3f1031c Use MAP_TRYFIXED for the probing memory allocator, if available. new 9fa843a Cleanup install docs. new 6360f6e Fix collateral damage from LJ_GC64 changes to asm_href(). new e77638f x64/LJ_GC64: Fix __call metamethod for tailcall. new 5e2b609 Fix compiler warning. new e3c4c9a DynASM/MIPS: Add missing MIPS64 instructions. new d9986fb MIPS64, part 1: Add MIPS64 support to interpreter. new 56fe899 Proper fix for LJ_GC64 changes to asm_href(). new 384ce2f MIPS: Fix build failures and warnings. new a5f8a48 Don't try to record outermost pcall() return to lower frame. new 1c0454c Merge branch 'master' into v2.1 new 3206307 Fix Valgrind suppressions. new 7d43402 Merge branch 'master' into v2.1 new 58ca165 LJ_GC64: Allow optional use of the system memory allocator. new cc05e79 LJ_GC64: Ensure all IR slot fields are initialized. new ce1ad87 LJ_GC64: Set correct nil value when clearing a cdata finalizer. new a7bec69 Fix PHI remarking in SINK pass. new a88dc57 Merge branch 'master' into v2.1 new f598343 x64/LJ_GC64: Fix code generation for IR_KNULL call argument. new 287a534 MIPS: Support MIPS16 interlinking. new 9cbd10e stub out the stuff to enable the JIT for ARM64 new a12b229 WIP new 9715a81 WIP new 309f508 ARM: minor cleanup new ffd80e0 More stuff new 6fe20b7 tries to run JITed code. Dies with SIGILL. new 5b88ae2 fix up some branch encoding mistakes new f5b1800 Correct some branch issues with emit_branch and asm_guardcc new b718cfa Cleanup/fixes for load/store offsets new e216f4d Start of vm_exit_handler new 767c34d WIP trace exit. new 3e2a03f more vm_exit_handler fixes, now hits NYI at end new d87c739 vm_exit_interp implemented (not audited for w/x registers) new 421f1e4 LDR instruction selection fix new a5f1856 Support various constant generation operations. new 4f30c6e A bunch of fixes, first trace runs to completion. new ca73965 Fix vm_exit_interp assuming 4 byte pointers in dispatch table new b181399 Test program works, but segfaults on exit new ab82cab Fix corruption of stack frame on trace exit. new aff9aba Cleanup for ahuvload The 66 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years

[toolchain/luajit-aarch64] branch v2.1 updated (ac42037 -> 287a534)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. charles.baylis pushed a change to branch v2.1 in repository toolchain/luajit-aarch64. from ac42037 Constrain value range of lj_ir_kptr() to unsigned 32 bit pointers. new 221268b Use the GDB JIT API in a thread-safe manner. new f05280e x86/x64: Fix instruction length decoder. new 6a99732 Merge branch 'master' into v2.1 new 35b09e6 Windows/x86: Add full exception interoperability. new 573daa9 Fix dependencies. new 5837c2a Remove assumption that lj_math_random_step() doesn't clobber FPRs. new 4fe400c Merge branch 'master' into v2.1 new d4f3b11 Workaround for MinGW headers lacking some exception definitions. new 37e1e70 Add guard for obscure aliasing between open upvalues and SSA slots. new 475a6ae Merge branch 'master' into v2.1 new 1931b38 LJ_GC64: Introduce IRT_PGC. new cfa188f Move common 32/64 bit in-memory FP constants to jit_State. new 786dbb2 Add IR_FLOAD with REF_NIL for field loads from GG_State. new ccae333 Load SIMD constants with IR_FLOAD from GG_State. new 5135876 Add ra_addrename(). new a657fa0 Make the IR immovable after assembly. new 3152ed9 Simplify GCtrace * reference embedding for trace stitching. new a406797 Always walk IR constants in ascending order. new 7fb75cc Embed 64 bit constants directly in the IR, using two slots. new 9e99ccc Strip out old infrastructure for 64 bit constants. new f26679c LJ_GC64: Add support for 64 bit GCobj constants in the IR. new 8f868a9 LJ_GC64: Update IR type sizes. new 6c8258d LJ_FR2: Add support for trace recording and snapshots. new 2868715 x64/LJ_GC64: Add missing backend support and enable JIT compilation. new 747feb6 x86: Don't spill an explicit REF_BASE in the IR. new bfe2a35 Merge branch 'master' into v2.1 new 3f1031c Use MAP_TRYFIXED for the probing memory allocator, if available. new 9fa843a Cleanup install docs. new 6360f6e Fix collateral damage from LJ_GC64 changes to asm_href(). new e77638f x64/LJ_GC64: Fix __call metamethod for tailcall. new 5e2b609 Fix compiler warning. new e3c4c9a DynASM/MIPS: Add missing MIPS64 instructions. new d9986fb MIPS64, part 1: Add MIPS64 support to interpreter. new 56fe899 Proper fix for LJ_GC64 changes to asm_href(). new 384ce2f MIPS: Fix build failures and warnings. new a5f8a48 Don't try to record outermost pcall() return to lower frame. new 1c0454c Merge branch 'master' into v2.1 new 3206307 Fix Valgrind suppressions. new 7d43402 Merge branch 'master' into v2.1 new 58ca165 LJ_GC64: Allow optional use of the system memory allocator. new cc05e79 LJ_GC64: Ensure all IR slot fields are initialized. new ce1ad87 LJ_GC64: Set correct nil value when clearing a cdata finalizer. new a7bec69 Fix PHI remarking in SINK pass. new a88dc57 Merge branch 'master' into v2.1 new f598343 x64/LJ_GC64: Fix code generation for IR_KNULL call argument. new 287a534 MIPS: Support MIPS16 interlinking. The 46 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: doc/ext_jit.html | 2 +- doc/extensions.html | 25 +- doc/install.html | 88 +- doc/luajit.html | 4 +- doc/status.html | 6 - dynasm/dasm_mips.h | 11 +- dynasm/dasm_mips.lua | 75 +- dynasm/{dasm_x64.lua => dasm_mips64.lua} | 8 +- src/Makefile | 10 +- src/Makefile.dep | 28 +- src/host/buildvm.c | 2 +- src/host/buildvm_peobj.c | 28 +- src/jit/dis_mips.lua | 4 +- src/jit/dump.lua | 10 +- src/lib_aux.c | 6 +- src/lib_jit.c | 10 +- src/lj.supp | 6 +- src/lj_alloc.c | 8 +- src/lj_arch.h | 50 +- src/lj_asm.c | 165 +- src/lj_asm_arm.h | 33 +- src/lj_asm_mips.h | 41 +- src/lj_asm_ppc.h | 35 +- src/lj_asm_x86.h | 519 +++- src/lj_ccall.c | 159 +- src/lj_ccall.h | 20 +- src/lj_ccallback.c | 70 +- src/lj_cdata.c | 10 +- src/lj_crecord.c | 30 +- src/lj_def.h | 2 + src/lj_dispatch.c | 2 +- src/lj_emit_arm.h | 3 +- src/lj_emit_mips.h | 9 +- src/lj_emit_ppc.h | 4 +- src/lj_emit_x86.h | 127 +- src/lj_err.c | 42 +- src/lj_ffrecord.c | 95 +- src/lj_frame.h | 37 +- src/lj_gc.c | 2 + src/lj_gdbjit.c | 18 + src/lj_ir.c | 159 +- src/lj_ir.h | 45 +- src/lj_ircall.h | 52 +- src/lj_iropt.h | 12 +- src/lj_jit.h | 63 +- src/lj_opt_fold.c | 12 +- src/lj_opt_mem.c | 4 +- src/lj_opt_narrow.c | 2 +- src/lj_opt_sink.c | 15 +- src/lj_opt_split.c | 8 + src/lj_record.c | 300 ++- src/lj_snap.c | 81 +- src/lj_state.c | 2 +- src/lj_target_mips.h | 46 +- src/lj_target_x86.h | 12 +- src/lj_trace.c | 64 +- src/lj_trace.h | 1 + src/lj_vm.h | 4 + src/vm_mips.dasc | 2 +- src/{vm_mips.dasc => vm_mips64.dasc} | 3887 +++++++++++++----------------- src/vm_x64.dasc | 5 +- src/vm_x86.dasc | 77 +- 62 files changed, 3763 insertions(+), 2894 deletions(-) copy dynasm/{dasm_x64.lua => dasm_mips64.lua} (66%) copy src/{vm_mips.dasc => vm_mips64.dasc} (55%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years

[toolchain/luajit-aarch64] branch aarch64-v2.1-on-gc64 deleted (was 8b0a977)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. charles.baylis pushed a change to branch aarch64-v2.1-on-gc64 in repository toolchain/luajit-aarch64. was 8b0a977 vm_exit_interp implemented (not audited for w/x registers) This change permanently discards the following revisions: discards 8b0a977 vm_exit_interp implemented (not audited for w/x registers) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years

[toolchain/luajit-aarch64] branch aarch64-v2.1-gc64-dis deleted (was 909f5fd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. charles.baylis pushed a change to branch aarch64-v2.1-gc64-dis in repository toolchain/luajit-aarch64. was 909f5fd Fix corruption of stack frame on trace exit. This change permanently discards the following revisions: discards 909f5fd Fix corruption of stack frame on trace exit. discards 0b8042c Test program works, but segfaults on exit discards ec4cb26 Fix vm_exit_interp assuming 4 byte pointers in dispatch table discards 559544a A bunch of fixes, first trace runs to completion. discards 5ceb522 Support various constant generation operations. discards 65b13bd LDR instruction selection fix discards 58e460d Merge remote-tracking branch 'rtrk/arm64' into tmp discards fa251ef ARM64: Added code for disassembling FP instructions. Small fi [...] discards 9c89016 Merge remote-tracking branch 'rtrk/arm64' into tmp discards 52dc80d Implemented disassembling majority of general purpose instructions. discards 16897a9 ARM64: Initial steps in implementing ARM64 disassembler. discards 35b09e6 Windows/x86: Add full exception interoperability. discards 6a99732 Merge branch 'master' into v2.1 discards f05280e x86/x64: Fix instruction length decoder. discards 221268b Use the GDB JIT API in a thread-safe manner. -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years

[toolchain/luajit-aarch64] branch aarch64-v2.1 deleted (was af6bca9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. charles.baylis pushed a change to branch aarch64-v2.1 in repository toolchain/luajit-aarch64. was af6bca9 More stuff The revisions that were on this branch are still contained in other references; therefore, this change does not discard any commits from the repository. -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years

[toolchain/luajit-aarch64] branch aarch64-use-dispatch deleted (was 29f7d5e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. charles.baylis pushed a change to branch aarch64-use-dispatch in repository toolchain/luajit-aarch64. was 29f7d5e dubious patch to use DISPATCH register in the way ARM does. This change permanently discards the following revisions: discards 29f7d5e dubious patch to use DISPATCH register in the way ARM does. discards f804d59 Remove TISNIL register alias to make space for DISPATCH register -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years

[llvm] branch master updated (1063f93 -> eb66787)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 1063f93 [llc] Remove exit-on-error flag from MIR tests (PR27770) new eb66787 [AMDGPU] Disassembler: Support for sdwa instructions The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 6 +- test/MC/Disassembler/AMDGPU/sdwa_vi.txt | 347 +++++++++++++++++++++ 2 files changed, 352 insertions(+), 1 deletion(-) create mode 100644 test/MC/Disassembler/AMDGPU/sdwa_vi.txt -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years

[llvm] branch master updated (b867bf3 -> 1063f93)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from b867bf3 [AVX512] Fix shuffle decode printing for several instructions [...] new 1063f93 [llc] Remove exit-on-error flag from MIR tests (PR27770) The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: test/CodeGen/MIR/Generic/invalid-jump-table-kind.mir | 2 +- test/CodeGen/MIR/Generic/llvm-ir-error-reported.mir | 2 +- test/CodeGen/MIR/Generic/machine-function-missing-function.mir | 2 +- test/CodeGen/MIR/Generic/machine-function-missing-name.mir | 2 +- test/CodeGen/MIR/Generic/machine-function-redefinition-error.mir | 2 +- test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir | 2 +- test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir | 2 +- test/CodeGen/MIR/X86/variable-sized-stack-object-size-error.mir | 2 +- tools/llc/llc.cpp | 4 +--- 9 files changed, 9 insertions(+), 11 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years

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Tcwg-commits June 2016