Tcwg-commits October 2019

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig updated (c45521070e9 -> a53504c16e9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig in repository toolchain/ci/gcc. from c45521070e9 * ipa-inline.c: Fix type; compute size rather than self_si [...] adds fdb1d0f278e 2019-0105 Steven G. Kargl <kargl(a)gcc.gnu.org> adds b334ecb7c1e Daily bump. adds 86b34dfdcc6 [Darwin] Fix some format-related build warnings. adds 6a1019b0044 Add std::copy_n __glibcxx_requires_can_increment checks. adds a8f3cf77c42 Add C++11 __iterator_category_t template alias. adds e908afccb0e Add std::copy_n istreambuf_iterator specialization adds 66f02f9ec57 Fix EXECUTE_IF_SET_IN_HARD_REG_SET use adds a53504c16e9 Add std::copy_n istreambuf_iterator specialization No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 11 + gcc/DATESTAMP | 2 +- gcc/config/darwin.c | 11 +- gcc/testsuite/ChangeLog | 14161 ------------------- gcc/var-tracking.c | 5 +- libstdc++-v3/ChangeLog | 25 + libstdc++-v3/include/bits/stl_algo.h | 23 +- .../include/bits/stl_iterator_base_types.h | 11 +- libstdc++-v3/include/bits/streambuf_iterator.h | 26 + libstdc++-v3/include/std/numeric | 3 +- .../testsuite/25_algorithms/copy_n/debug/1_neg.cc | 38 + .../testsuite/25_algorithms/copy_n/debug/2_neg.cc | 38 + .../25_algorithms/copy_n/istreambuf_iterator/1.cc | 73 + .../copy_n/istreambuf_iterator/1_neg.cc | 40 + .../copy_n/istreambuf_iterator/2_neg.cc | 38 + 15 files changed, 327 insertions(+), 14178 deletions(-) create mode 100644 libstdc++-v3/testsuite/25_algorithms/copy_n/debug/1_neg.cc create mode 100644 libstdc++-v3/testsuite/25_algorithms/copy_n/debug/2_neg.cc create mode 100644 libstdc++-v3/testsuite/25_algorithms/copy_n/istreambuf_iterator/1.cc create mode 100644 libstdc++-v3/testsuite/25_algorithms/copy_n/istreambuf_iterator [...] create mode 100644 libstdc++-v3/testsuite/25_algorithms/copy_n/istreambuf_iterator [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig updated (382dfe0118 -> 225f296a02)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig in repository toolchain/ci/binutils-gdb. from 382dfe0118 Automatic date update in version.in adds 6cb6aea2df Automatic date update in version.in adds 225f296a02 Change gdb/version.in to 9.0.50.DATE-git (new version number [...] No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gdb/ChangeLog | 4 ++++ gdb/version.in | 2 +- 3 files changed, 6 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig updated (915f50a5 -> b6a05649)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards 915f50a5 0: update: binutils-gcc-linux: boot new b6a05649 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (915f50a5) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-lt [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 182 +- 02-prepare_abe/console.log | 298 +- 03-build_abe-binutils/console.log | 11188 ++++++------ 04-build_abe-stage1/console.log | 19850 +++++++++++---------- 05-build_linux/console.log | 1048 +- 06-boot_linux/console.log | 470 +- 07-check_regression/console.log | 8 +- 08-update_baseline/console.log | 8 +- console.log | 33084 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 10 files changed, 33062 insertions(+), 33086 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[linux] annotated tag v5.4-rc2 created (now a09a4100c0de)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to annotated tag v5.4-rc2 in repository linux. at a09a4100c0de (tag) tagging da0c9ea146cbe92b832f1b0f694840ea8eb33cce (commit) replaces v5.4-rc1 tagged by Linus Torvalds on Sun Oct 6 14:27:38 2019 -0700 - Log ----------------------------------------------------------------- Linux 5.4-rc2 -----BEGIN PGP SIGNATURE----- iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAl2aXEoeHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGZKUH/1S+unzPxmXwraBl ORnOSMCaoepaCS2kc4nFim3hpnwzuFLn8NHPSARPPBO7Jy9Shtku0om66rF6R4DD zoe/QSLvtUqiVU6xuPR8ymjeizN+qj+9RT8tDftCs2QCBqZ/jr/kKiiA32aipnrz IBC+I6eKFN0WqBep5NwAkIAok+JiUBMIEuEXjkF2q0Vw9fnmmNRMm6rPDk1dHgQi K6mr8N3Vbsdadn/XBt4DRje2c593cfOnryPUwyIIBGw5W6EECX6k9CeD+CNNxLYb mPNC34wQsqvbAOsP6Y+2lBLZw+0AG5uLytDrwNNO1JKSEYMSG6wH4t7C6w0IlTQt OkYK3S0= =0ny6 -----END PGP SIGNATURE----- ----------------------------------------------------------------------- No new revisions were added by this update. -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[linux] branch master updated (b212921b13bd -> da0c9ea146cb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository linux. from b212921b13bd elf: don't use MAP_FIXED_NOREPLACE for elf executable mappings new da0c9ea146cb Linux 5.4-rc2 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig updated (8815be04ec1 -> d84cd7caa87)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/llvm-project. from 8815be04ec1 [X86][AVX] Push sign extensions of comparison bool results [...] adds 2decdf42b95 [FastISel] Copy the inline assembly dialect to the INLINEAS [...] adds 69c65a86097 AMDGPU/GlobalISel: Fix RegBankSelect for sendmsg intrinsics adds a5b9c756745 GlobalISel: Partially implement lower for G_EXTRACT adds bcd6b1d2090 AMDGPU/GlobalISel: Lower G_ATOMIC_CMPXCHG_WITH_SUCCESS adds c0ec72d4f85 AMDGPU/GlobalISel: RegBankSelect DS GWS intrinsics adds 786a3953bac AMDGPU/GlobalISel: RegBankSelect mul24 intrinsics adds e59296a0519 AMDGPU/GlobalISel: Fall back on weird G_EXTRACT offsets adds c209598268b [clang-format][docs] Fix the Google C++ and Chromium style [...] adds 7653ff398d2 [X86] Enable AVX512BW for memcmp() adds 032dd9b086c [X86][SSE] matchVectorShuffleAsBlend - use Zeroable element [...] adds c38881a6b7f [InstCombine] don't assume 'inbounds' for bitcast pointer t [...] adds 61c22a83dee [InstCombine] add fast-math-flags for better test coverage; NFC adds 2dee7e55610 [X86][AVX] combineExtractSubvector - merge duplicate variab [...] adds 25ba49824d2 [DAGCombine] Match more patterns for half word bswap adds aab8b3ab9cf [InstCombine] fold fneg disguised as select+fmul (PR43497) adds ee68f1ec67c [NFC] Replace 'isDarwin' with 'IsDarwin' adds f643fabb525 Revert [DAGCombine] Match more patterns for half word bswap adds 6d196514104 [Docs] Adds new Getting Started/Tutorials page adds 5c876303ecd [X86][SSE] resolveTargetShuffleInputs - call getTargetShuff [...] adds de0e3aac2a2 [Docs] Removes Programming Documentation page adds dcb75bf843e [LOOPGUARD] Remove asserts in getLoopGuardBranch Summary: T [...] adds 598e7a3a689 gn build: make windows build less broken adds 1e9c0cecab5 [Sema] Avoids an assertion failure when an invalid conversi [...] adds 842dde6be43 [LegalizeTypes][X86] When splitting a vselect for type lega [...] adds 570ae49d030 [X86] Add custom type legalization for v16i64->v16i8 trunca [...] adds 344df110e56 Implements CWG 1601 in [over.ics.rank/4.2] adds 42010dc8108 [X86][SSE] Don't merge known undef/zero elements into targe [...] adds 739c9f0b793 [X86][SSE] Remove resolveTargetShuffleInputs and use getTar [...] adds e36415cacff [NFC][PowerPC] Reorganize CRNotPat multiclass patterns in P [...] adds d84cd7caa87 Fix signed/unsigned warning. NFCI No new revisions were added by this update. Summary of changes: clang/docs/ClangFormatStyleOptions.rst | 2 +- clang/lib/Sema/SemaDecl.cpp | 3 + clang/lib/Sema/SemaOverload.cpp | 42 ++++ clang/test/CXX/drs/dr16xx.cpp | 12 + clang/test/CXX/drs/dr6xx.cpp | 15 +- clang/test/CodeGen/aapcs-bitfield.c | 72 +++--- .../test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp | 16 +- clang/test/CodeGenCXX/microsoft-abi-typeid.cpp | 2 +- clang/test/SemaCXX/PR31422.cpp | 7 + clang/www/cxx_dr_status.html | 2 +- llvm/docs/GettingStartedTutorials.rst | 34 +++ llvm/docs/ProgrammingDocumentation.rst | 67 ------ llvm/docs/Reference.rst | 120 ++++++++-- llvm/docs/SubsystemDocumentation.rst | 46 +--- llvm/docs/UserGuides.rst | 103 ++++---- llvm/docs/index.rst | 33 +-- .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 1 + llvm/lib/Analysis/LoopInfo.cpp | 12 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 35 +++ llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 1 + .../CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | 15 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 7 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 17 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 48 +++- llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp | 4 +- llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h | 14 +- llvm/lib/Target/PowerPC/PPC.h | 4 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 20 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 6 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 6 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 175 +++++++------- llvm/lib/Target/PowerPC/PPCMCInstLower.cpp | 22 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 262 +++++++++++---------- .../Transforms/InstCombine/InstCombineCasts.cpp | 11 +- .../InstCombine/InstCombineMulDivRem.cpp | 67 ++++-- .../GlobalISel/artifact-combiner-extract.mir | 14 +- .../legalize-atomic-cmpxchg-with-success.mir | 107 +++++++++ .../GlobalISel/legalize-extract-vector-elt.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/legalize-extract.mir | 183 +++++++++++++- .../AMDGPU/GlobalISel/legalize-shuffle-vector.mir | 20 +- .../regbankselect-amdgcn.ds.gws.init.mir | 79 +++++++ .../regbankselect-amdgcn.ds.gws.sema.v.mir | 37 +++ .../GlobalISel/regbankselect-amdgcn.s.sendmsg.mir | 13 +- .../regbankselect-amdgcn.s.sendmsghalt.mir | 15 +- .../AMDGPU/GlobalISel/regbankselect-constant.mir | 8 +- llvm/test/CodeGen/X86/avx512-vselect.ll | 59 ++--- llvm/test/CodeGen/X86/memcmp.ll | 20 +- llvm/test/CodeGen/X86/min-legal-vector-width.ll | 61 ++--- llvm/test/CodeGen/X86/packss.ll | 22 +- llvm/test/CodeGen/X86/pr34177.ll | 121 +++++++--- llvm/test/CodeGen/X86/pr43575.ll | 14 ++ llvm/test/CodeGen/X86/setcc-wide-types.ll | 118 +++++++--- llvm/test/CodeGen/X86/vector-trunc-packus.ll | 65 +++-- llvm/test/CodeGen/X86/vector-trunc-ssat.ll | 59 +++-- llvm/test/CodeGen/X86/vector-trunc-usat.ll | 50 +++- llvm/test/Transforms/InstCombine/addrspacecast.ll | 2 +- llvm/test/Transforms/InstCombine/cast.ll | 4 +- llvm/test/Transforms/InstCombine/fmul.ll | 32 +-- .../Transforms/InstCombine/load-bitcast-vec.ll | 35 +++ llvm/test/Transforms/InstCombine/memset.ll | 2 +- llvm/test/Transforms/InstCombine/unpack-fca.ll | 18 +- llvm/unittests/Analysis/LoopInfoTest.cpp | 85 +++++++ llvm/utils/gn/build/toolchain/BUILD.gn | 3 + 63 files changed, 1744 insertions(+), 825 deletions(-) create mode 100644 clang/test/SemaCXX/PR31422.cpp create mode 100644 llvm/docs/GettingStartedTutorials.rst delete mode 100644 llvm/docs/ProgrammingDocumentation.rst create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg-wit [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws [...] create mode 100644 llvm/test/CodeGen/X86/pr43575.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig updated (51d92d07 -> dc3fc4c3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/base-artifacts. discards 51d92d07 0: update: llvm-linux: 19895 new dc3fc4c3 0: update: llvm-linux: 19895 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (51d92d07) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 76 +- 02-build_llvm/console.log | 12204 ++++++++++++++++++------------------ 03-build_linux/console.log | 946 +-- console.log | 13226 +++++++++++++++++++-------------------- jenkins/manifest.sh | 8 +- 5 files changed, 13230 insertions(+), 13230 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (e2321bb4488 -> d84cd7caa87)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/llvm-project. from e2321bb4488 [SLP] avoid reduction transform on patterns that the backen [...] adds 8815be04ec1 [X86][AVX] Push sign extensions of comparison bool results [...] adds 2decdf42b95 [FastISel] Copy the inline assembly dialect to the INLINEAS [...] adds 69c65a86097 AMDGPU/GlobalISel: Fix RegBankSelect for sendmsg intrinsics adds a5b9c756745 GlobalISel: Partially implement lower for G_EXTRACT adds bcd6b1d2090 AMDGPU/GlobalISel: Lower G_ATOMIC_CMPXCHG_WITH_SUCCESS adds c0ec72d4f85 AMDGPU/GlobalISel: RegBankSelect DS GWS intrinsics adds 786a3953bac AMDGPU/GlobalISel: RegBankSelect mul24 intrinsics adds e59296a0519 AMDGPU/GlobalISel: Fall back on weird G_EXTRACT offsets adds c209598268b [clang-format][docs] Fix the Google C++ and Chromium style [...] adds 7653ff398d2 [X86] Enable AVX512BW for memcmp() adds 032dd9b086c [X86][SSE] matchVectorShuffleAsBlend - use Zeroable element [...] adds c38881a6b7f [InstCombine] don't assume 'inbounds' for bitcast pointer t [...] adds 61c22a83dee [InstCombine] add fast-math-flags for better test coverage; NFC adds 2dee7e55610 [X86][AVX] combineExtractSubvector - merge duplicate variab [...] adds 25ba49824d2 [DAGCombine] Match more patterns for half word bswap adds aab8b3ab9cf [InstCombine] fold fneg disguised as select+fmul (PR43497) adds ee68f1ec67c [NFC] Replace 'isDarwin' with 'IsDarwin' adds f643fabb525 Revert [DAGCombine] Match more patterns for half word bswap adds 6d196514104 [Docs] Adds new Getting Started/Tutorials page adds 5c876303ecd [X86][SSE] resolveTargetShuffleInputs - call getTargetShuff [...] adds de0e3aac2a2 [Docs] Removes Programming Documentation page adds dcb75bf843e [LOOPGUARD] Remove asserts in getLoopGuardBranch Summary: T [...] adds 598e7a3a689 gn build: make windows build less broken adds 1e9c0cecab5 [Sema] Avoids an assertion failure when an invalid conversi [...] adds 842dde6be43 [LegalizeTypes][X86] When splitting a vselect for type lega [...] adds 570ae49d030 [X86] Add custom type legalization for v16i64->v16i8 trunca [...] adds 344df110e56 Implements CWG 1601 in [over.ics.rank/4.2] new 42010dc8108 [X86][SSE] Don't merge known undef/zero elements into targe [...] new 739c9f0b793 [X86][SSE] Remove resolveTargetShuffleInputs and use getTar [...] new e36415cacff [NFC][PowerPC] Reorganize CRNotPat multiclass patterns in P [...] new d84cd7caa87 Fix signed/unsigned warning. NFCI The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/docs/ClangFormatStyleOptions.rst | 2 +- clang/lib/Sema/SemaDecl.cpp | 3 + clang/lib/Sema/SemaOverload.cpp | 42 +++ clang/test/CXX/drs/dr16xx.cpp | 12 + clang/test/CXX/drs/dr6xx.cpp | 15 +- clang/test/CodeGen/aapcs-bitfield.c | 72 ++--- .../test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp | 16 +- clang/test/CodeGenCXX/microsoft-abi-typeid.cpp | 2 +- clang/test/SemaCXX/PR31422.cpp | 7 + clang/www/cxx_dr_status.html | 2 +- llvm/docs/GettingStartedTutorials.rst | 34 +++ llvm/docs/ProgrammingDocumentation.rst | 67 ----- llvm/docs/Reference.rst | 120 +++++++-- llvm/docs/SubsystemDocumentation.rst | 46 +--- llvm/docs/UserGuides.rst | 103 +++++--- llvm/docs/index.rst | 33 +-- .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 1 + llvm/lib/Analysis/LoopInfo.cpp | 12 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 35 +++ llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 1 + .../CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | 15 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 7 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 17 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 48 +++- llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp | 4 +- llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h | 14 +- llvm/lib/Target/PowerPC/PPC.h | 4 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 20 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 6 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 6 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 175 ++++++------ llvm/lib/Target/PowerPC/PPCMCInstLower.cpp | 22 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 294 +++++++++++---------- .../Transforms/InstCombine/InstCombineCasts.cpp | 11 +- .../InstCombine/InstCombineMulDivRem.cpp | 67 +++-- .../GlobalISel/artifact-combiner-extract.mir | 14 +- .../legalize-atomic-cmpxchg-with-success.mir | 107 ++++++++ .../GlobalISel/legalize-extract-vector-elt.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/legalize-extract.mir | 183 ++++++++++++- .../AMDGPU/GlobalISel/legalize-shuffle-vector.mir | 20 +- .../regbankselect-amdgcn.ds.gws.init.mir | 79 ++++++ .../regbankselect-amdgcn.ds.gws.sema.v.mir | 37 +++ .../GlobalISel/regbankselect-amdgcn.s.sendmsg.mir | 13 +- .../regbankselect-amdgcn.s.sendmsghalt.mir | 15 +- .../AMDGPU/GlobalISel/regbankselect-constant.mir | 8 +- llvm/test/CodeGen/X86/avx512-vselect.ll | 59 ++--- llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll | 161 +++++------ llvm/test/CodeGen/X86/bitcast-and-setcc-512.ll | 124 ++++----- llvm/test/CodeGen/X86/memcmp.ll | 20 +- llvm/test/CodeGen/X86/min-legal-vector-width.ll | 61 ++--- llvm/test/CodeGen/X86/packss.ll | 22 +- llvm/test/CodeGen/X86/pr34177.ll | 121 ++++++--- llvm/test/CodeGen/X86/pr43575.ll | 14 + llvm/test/CodeGen/X86/setcc-wide-types.ll | 118 ++++++--- llvm/test/CodeGen/X86/vector-trunc-packus.ll | 65 ++++- llvm/test/CodeGen/X86/vector-trunc-ssat.ll | 59 ++++- llvm/test/CodeGen/X86/vector-trunc-usat.ll | 50 +++- llvm/test/Transforms/InstCombine/addrspacecast.ll | 2 +- llvm/test/Transforms/InstCombine/cast.ll | 4 +- llvm/test/Transforms/InstCombine/fmul.ll | 32 ++- .../Transforms/InstCombine/load-bitcast-vec.ll | 35 +++ llvm/test/Transforms/InstCombine/memset.ll | 2 +- llvm/test/Transforms/InstCombine/unpack-fca.ll | 18 +- llvm/unittests/Analysis/LoopInfoTest.cpp | 85 ++++++ llvm/utils/gn/build/toolchain/BUILD.gn | 3 + 65 files changed, 1901 insertions(+), 985 deletions(-) create mode 100644 clang/test/SemaCXX/PR31422.cpp create mode 100644 llvm/docs/GettingStartedTutorials.rst delete mode 100644 llvm/docs/ProgrammingDocumentation.rst create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg-wit [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws [...] create mode 100644 llvm/test/CodeGen/X86/pr43575.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (233a7aa1 -> 056652f5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards 233a7aa1 0: update: llvm-linux: all new 056652f5 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (233a7aa1) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-build_llvm/console.log | 12194 +- 03-build_linux/console.log | 3283978 ++++++++++++++++++------------------ 04-boot_linux/console.log | 6 +- console.log | 3298147 +++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 6 files changed, 3297241 insertions(+), 3297220 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[linux] branch master updated (7cdb85df6061 -> b212921b13bd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository linux. from 7cdb85df6061 Merge tag 'dma-mapping-5.4-1' of git://git.infradead.org/u [...] new b212921b13bd elf: don't use MAP_FIXED_NOREPLACE for elf executable mappings The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: fs/binfmt_elf.c | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

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Tcwg-commits October 2019