Tcwg-commits June 2019

tcwg-commits@lists.linaro.org

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15913 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allmodconfig updated (ac0f614f -> daed576c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allmodconfig in repository toolchain/ci/base-artifacts. discards ac0f614f 2: update: linux-56b697c6c13b51887a0c66c8bcbd10cd537476fa: 18543 new daed576c 2: update: binutils-12efd68d159444ad8dfe24e49965a228ba980b86: 18543 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (ac0f614f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 127 +- 02-prepare_abe/console.log | 181 +- 03-build_abe-binutils/console.log | 11236 ++++++++------- 04-build_abe-stage1/console.log | 14176 ++++++++++--------- 05-build_linux/console.log | 1199 +- 07-check_regression/console.log | 6 +- 08-update_baseline/console.log | 21 + console.log | 27156 ++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 9 files changed, 27341 insertions(+), 26769 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig updated (33c71262988 -> 8d99db7fec9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig in repository toolchain/ci/gcc. from 33c71262988 Daily bump. new 8d99db7fec9 Daily bump. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig updated (a00e21c0a5 -> e4476675be)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig in repository toolchain/ci/binutils-gdb. from a00e21c0a5 Automatic date update in version.in new e4476675be Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig updated (f6dca304 -> 5601edc2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards f6dca304 0: update: binutils-gcc-linux: boot new 5601edc2 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f6dca304) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 180 +- 03-build_abe-binutils/console.log | 10885 ++++++------- 04-build_abe-stage1/console.log | 17338 +++++++++++---------- 05-build_linux/console.log | 790 +- 06-boot_linux/console.log | 382 +- console.log | 29703 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 8 files changed, 29706 insertions(+), 29712 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (788a024921c4 -> 156c05917e09)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/linux. from 788a024921c4 Merge tag 'arc-5.2-rc4' of git://git.kernel.org/pub/scm/li [...] adds a9fb94a99bb5 pstore: Set tfm to NULL on free_buf_for_compression adds 8880fa32c557 pstore/ram: Run without kernel crash dump region adds 47358b647550 Merge tag 'pstore-v5.2-rc4' of git://git.kernel.org/pub/sc [...] adds 7c33277b9a9a samples: fix pidfd-metadata compilation adds c732327f04a3 signal: improve comments adds 1fcd0eb356ad tests: fix pidfd-test compilation adds db309f2aedb8 Merge tag 'pidfd-fixes-v5.2-rc4' of gitolite.kernel.org:pu [...] adds f6131f28057d kselftest/cgroup: fix unexpected testing failure on test_m [...] adds 00e38a5d753d kselftest/cgroup: fix unexpected testing failure on test_core adds f97f3f8839eb kselftest/cgroup: fix incorrect test_core skip adds 98a13a8d2539 userfaultfd: selftest: fix compiler warning adds bc2cce3f2ebc selftests: vm: install test_vmalloc.sh for run_vmtests adds 156c05917e09 Merge tag 'linux-kselftest-5.2-rc4' of git://git.kernel.or [...] No new revisions were added by this update. Summary of changes: fs/pstore/platform.c | 7 +++-- fs/pstore/ram.c | 36 +++++++++++++++--------- kernel/signal.c | 11 ++++---- samples/pidfd/pidfd-metadata.c | 4 +++ tools/testing/selftests/cgroup/test_core.c | 7 ++++- tools/testing/selftests/cgroup/test_memcontrol.c | 4 +++ tools/testing/selftests/pidfd/pidfd_test.c | 4 +++ tools/testing/selftests/vm/Makefile | 2 ++ tools/testing/selftests/vm/userfaultfd.c | 2 +- 9 files changed, 54 insertions(+), 23 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (7c842fadf10 -> c37ff0d138a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/llvm-project. from 7c842fadf10 [PowerPC] Collapse RLDICL/RLDICR into RLDIC when possible adds 76467c4d7fb [NFC][FnAttrs] Stress tests for attribute deduction adds aade782a98e [Attributor] Pass infrastructure and fixpoint framework adds 2057f8366a4 Read .note.gnu.property sections and emit a merged .note.gn [...] adds 516e6cc1dd9 [Clang] Disable new PM for tests that use optimization leve [...] adds c0eb8a98253 Add __FILE_NAME__ to ReleaseNotes. NFC adds fa449a9bb27 Suppress false-positive GCC -Wreturn-type warning. adds a3e16719c46 Resubmit "[CorrelatedValuePropagation] Fix prof branch_weig [...] adds 4cd07dbeec9 Reduce memory consumption of coverage dumps adds 9d8d0f68fbc [CMake][Fuchsia] Use libc++ ABIv2 for the first stage build adds da7f033693a Ignore DIEs in the skeleton unit in a DWO scenario adds 2ae86d20893 [clang] [test] Add a (xfailing) test for PR41027 adds 3c850ca5603 [CMake] Export CMAKE_CONFIGURATION_TYPES for the LLVM build-tree adds c7694624383 [CMake] Add configuration dirs as potential locations for l [...] adds 6fc4c1cc54a Include what you use in PPCFrameLowering.h adds e12334a0f24 [ELF] Allow reading of more than one FEATURE_1_AND in same object. adds db134aaec24 [IPO] Disabled 'default only' switch statements to fix MSVC [...] adds daeeb33f860 Sanitize llvm-size help adds ddfbfd6172f [X86][SSE] Add some nt-store test cases inspired by PR42123 adds 5a81af547c2 [TargetLowering] SimplifyDemandedBits - pull out shift valu [...] adds b42196661ba [llvm-objdump] - Disassemble non-executable sections if spe [...] adds 9b2b8ad8b18 Revert "Factor out duplicated code building a MemberExpr an [...] adds 2121a4f7335 gn build: Merge r362578 adds 886a55eaa05 [X86][AVX] combineX86ShuffleChain - combine shuffle(extract [...] adds a1bb4fb79d8 [ARM] Allow "-march=foo+fp" to vary with foo adds f95e6c06534 [ARM] Allow "-march=foo+fp" to vary with foo adds 66296dc3e4c [yaml2obj] - Change how we handle implicit sections. adds 22e99c434fb [MIPS GlobalISel] Select fcmp adds 5145b1e4421 [Sema] Prevent binding incompatible addr space ref to temporaries adds 54bd6c840e3 UpdateTestChecks: hexagon support adds 253086230fa [NFC][Codegen][X86] Add AVX2 runline for '(X & (C l>> Y)) = [...] adds da59652c1ba Avoid using NoThrow Exception Specifier in non-C++ Modes. adds d34797dfc26 Title: [LOOPINFO] Extend Loop object to add utilities to ge [...] adds b90b3547988 [LoopInfo] Fix unused variable warning. NFC. adds 7ca9b978c4f [OpenCL][PR42031] Prevent deducing addr space in type alias. adds ad62a3a2992 [LoopUtils][SLPVectorizer] clean up management of fast-math-flags adds 15c657d13d6 [SLP] Fix regression in broadcasts caused by operand reorde [...] adds 5da702308c5 [llvm-readobj] - Remove TODOs from gnu-hash-symbols.test an [...] adds 590b1aee609 Revert "Title: [LOOPINFO] Extend Loop object to add utiliti [...] adds a0e350e640b [X86][SSE] Add additional nt-load test cases as discussed o [...] adds de586bd1fd5 [X86][AVX] Generalize split256BitStore to splitVectorStore. NFCI. adds d47f5488cf0 Added propagation of not big initial stack size of master t [...] adds 5659b36c15b [DynamicLoader] Make sure we always set the rendezvous breakpoint adds 2bf82879bde [x86] split more 256-bit stores of concatenated vectors adds 3027a2999c3 [dsymutil] Support more than 4 architectures adds 77d6adc491a Fix shadow local variable warning. NFCI. adds d97ea1bc1ac [Clang] Fix pretty printing of CUDA address spaces adds b67cb3cda05 Use LTO capable linker adds 579c8df7013 [lld] Explicitly ignore comdat groups when parsing LTO object(s) adds a282a61ba3a [WebAssembly] Handle object parsing more like the ELF backend adds 0a31726d200 [NFC][Reassociate] Regenerate CHECKs for fast-basictest.ll adds 13dd125043f [Tests] Add poison inference tests for indvars showing both [...] adds d0fff89b816 [X86] Add the vector integer min/max instructions to isAsso [...] adds 5162266515e [NFC][Reassociate] Add unary fneg tests to fast-basictest.ll adds 8b83a9c6b13 [NFC][Reassociate] Fix mistake in 468b2ad adds 84cfca0f2b7 [analyzer] PathDiagnosticPopUpPiece: working with CharSourceRange adds 036fa5346f2 [X86][SSE] Add vector tests to cover more isNegatibleForFre [...] adds a95edb9dc1d [GWP-ASan] Core Guarded Pool Allocator [4]. adds e34d1a4e07b [cmake] Remove duplicate TestingSupport library for linking adds 53572d0470c [WebAssembly] Limit PIC support to the Emscripten target adds ecf3ae4a703 [NativeProcessDarwin] Remove dead code. NFCI. adds 0f8a764e8fa AMDGPU: Fix using 2 different enums for same operand flags adds 4fb580c3147 AMDGPU: Remove amdgpu-max-work-group-size attribute adds 607c8a9d148 IR: make getParamByValType Just Work. NFC. adds 8d7f118ab2b InstCombine: correctly change byval type attribute alongsid [...] adds 2d0896c1cb9 [LOOPINFO] Extend Loop object to add utilities to get the l [...] adds ba86f2a22e7 [WebAssembly] Use Emscripten triples in PIC tests. adds a3701caad82 [clang-format][NFC] Fix BS_Allman style example in the head [...] adds 3975b15dbab [X86] Fix mistake that marked VADDSSrrb_Int/VADDSDrrb_Int/V [...] adds 7ce7110e6d9 Speedup to_string and to_wstring for integers using stack b [...] adds 7c663cde14e [WebAssembly] Improve lto/comdat.ll test. NFC. adds 9423f5ef56d Fix FileCheck prefixes in test case. adds c46827c7eda LLVM IR: Generate new-style byval-with-Type from Clang adds 663d762c9a5 NewGVN: Handle addrspacecast adds ac111e526dd [InstCombine] simplify code for bitcast of insertelement; NFC adds e3eeacd70a8 [CallSite removal] Refactoring llvm::InlineFunction APIs adds acb56090639 [EarlyCSE] Add tests for negated min/max/abs [NFC] adds 5347024e283 Update issue statuses. Reviewed as https://reviews.llvm.org/D62932 adds 8f500a6f9ca [libcxx][test] Include test_workarounds.h where needed adds b812b7a45ed AMDGPU: Invert frame index offset interpretation adds 2f94203e23d Revert "[AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pa [...] adds 6c5d5ce5517 Allow target to handle STRICT floating-point nodes new c72fbe5dc18 [MSAN] Add unary FNeg visitor to the MemorySanitizer new 34c8b835b16 AMDGPU: Don't fix emergency stack slot at offset 0 new c37ff0d138a Revert "Revert "[AArch64][GlobalISel] Optimize G_FCMP + G_S [...] The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../cmake/caches/DistributionExample-stage2.cmake | 2 +- clang/cmake/caches/DistributionExample.cmake | 7 +- clang/cmake/caches/Fuchsia.cmake | 25 +- clang/docs/ClangFormatStyleOptions.rst | 21 +- clang/docs/ReleaseNotes.rst | 6 +- clang/include/clang/AST/Expr.h | 68 +- clang/include/clang/AST/Stmt.h | 1 - clang/include/clang/AST/Type.h | 20 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 3 + clang/include/clang/Format/Format.h | 21 +- clang/include/clang/Sema/Initialization.h | 3 + clang/include/clang/Sema/ParsedAttr.h | 2 +- clang/include/clang/Sema/Sema.h | 17 - clang/lib/AST/DeclBase.cpp | 1 - clang/lib/AST/Expr.cpp | 72 +- clang/lib/AST/TypePrinter.cpp | 8 +- clang/lib/CodeGen/CGBuiltin.cpp | 2 +- clang/lib/CodeGen/CGCall.cpp | 2 +- clang/lib/CodeGen/CoverageMappingGen.cpp | 17 +- clang/lib/Driver/ToolChains/Arch/ARM.cpp | 72 +- clang/lib/Driver/ToolChains/Arch/ARM.h | 3 + clang/lib/Frontend/Rewrite/RewriteModernObjC.cpp | 54 +- clang/lib/Frontend/Rewrite/RewriteObjC.cpp | 24 +- clang/lib/Sema/SemaExprCXX.cpp | 12 +- clang/lib/Sema/SemaExprMember.cpp | 71 +- clang/lib/Sema/SemaInit.cpp | 19 +- clang/lib/Sema/SemaOverload.cpp | 11 +- clang/lib/Sema/SemaType.cpp | 28 +- clang/lib/Serialization/ASTReaderStmt.cpp | 92 +- clang/lib/Serialization/ASTWriterStmt.cpp | 56 +- clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp | 6 +- clang/test/CodeGen/aapcs-align.cpp | 8 +- clang/test/CodeGen/arm-aapcs-vfp.c | 6 +- clang/test/CodeGen/arm-arguments.c | 8 +- clang/test/CodeGen/arm-byval-align.c | 2 +- clang/test/CodeGen/blocks.c | 2 +- clang/test/CodeGen/callback_annotated.c | 6 +- clang/test/CodeGen/cfi-icall-cross-dso.c | 8 +- clang/test/CodeGen/complex-builtins.c | 76 +- clang/test/CodeGen/complex-libcalls.c | 80 +- clang/test/CodeGen/complex-math.c | 16 +- clang/test/CodeGen/dllimport.c | 4 +- clang/test/CodeGen/inline2.c | 4 +- clang/test/CodeGen/le32-arguments.c | 6 +- clang/test/CodeGen/lifetime.c | 6 +- clang/test/CodeGen/mingw-long-double.c | 2 +- clang/test/CodeGen/nvptx-abi.c | 10 +- clang/test/CodeGen/ppc64-align-struct.c | 6 +- clang/test/CodeGen/ppc64le-aggregates.c | 8 +- clang/test/CodeGen/ppc64le-f128Aggregates.c | 4 +- clang/test/CodeGen/regcall.c | 10 +- clang/test/CodeGen/regparm-struct.c | 2 +- clang/test/CodeGen/renderscript.c | 2 +- .../CodeGen/sanitize-address-field-padding.cpp | 2 +- clang/test/CodeGen/sparc-arguments.c | 4 +- clang/test/CodeGen/sparcv8-abi.c | 6 +- clang/test/CodeGen/stdcall-fastcall.c | 4 +- clang/test/CodeGen/struct-passing.c | 4 +- clang/test/CodeGen/tbaa-for-vptr.cpp | 10 +- clang/test/CodeGen/vectorcall.c | 4 +- clang/test/CodeGen/wasm-arguments.c | 12 +- clang/test/CodeGen/x86_32-arguments-darwin.c | 46 +- clang/test/CodeGen/x86_32-arguments-iamcu.c | 6 +- clang/test/CodeGen/x86_32-arguments-linux.c | 28 +- clang/test/CodeGen/x86_32-arguments-realign.c | 2 +- clang/test/CodeGen/x86_64-arguments-nacl.c | 4 +- clang/test/CodeGen/x86_64-arguments.c | 34 +- clang/test/CodeGenCUDA/kernel-args-alignment.cu | 2 +- clang/test/CodeGenCUDA/kernel-args.cu | 8 +- clang/test/CodeGenCXX/amdgcn-func-arg.cpp | 6 +- clang/test/CodeGenCXX/atomicinit.cpp | 2 +- clang/test/CodeGenCXX/cfi-speculative-vtable.cpp | 4 +- clang/test/CodeGenCXX/debug-info-class-optzns.cpp | 2 +- clang/test/CodeGenCXX/dllimport-members.cpp | 4 +- clang/test/CodeGenCXX/dllimport.cpp | 2 +- clang/test/CodeGenCXX/dso-local-executable.cpp | 6 +- clang/test/CodeGenCXX/init-invariant.cpp | 2 +- clang/test/CodeGenCXX/merge-functions.cpp | 2 +- .../CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp | 2 +- .../CodeGenCXX/microsoft-abi-sret-and-byval.cpp | 30 +- clang/test/CodeGenCXX/ms-inline-asm-fields.cpp | 2 +- clang/test/CodeGenCXX/nrvo.cpp | 6 +- clang/test/CodeGenCXX/regcall.cpp | 4 +- clang/test/CodeGenCXX/regparm.cpp | 2 +- .../sanitize-dtor-nontrivial-virtual-base.cpp | 2 +- clang/test/CodeGenCXX/stmtexpr.cpp | 2 +- .../visibility-hidden-extern-templates.cpp | 2 +- clang/test/CodeGenCXX/wasm-args-returns.cpp | 6 +- clang/test/CodeGenCXX/x86_32-arguments.cpp | 4 +- clang/test/CodeGenCXX/x86_64-arguments-avx.cpp | 2 +- .../test/CodeGenCXX/x86_64-arguments-nacl-x32.cpp | 4 +- clang/test/CodeGenCXX/x86_64-arguments.cpp | 16 +- clang/test/CodeGenObjC/local-static-block.m | 14 +- clang/test/CodeGenObjCXX/nrvo.mm | 2 +- clang/test/CodeGenOpenCL/addr-space-struct-arg.cl | 20 +- .../test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl | 16 +- .../test/CodeGenOpenCL/cl20-device-side-enqueue.cl | 6 +- .../kernels-have-spir-cc-by-default.cl | 6 +- clang/test/Driver/armv8.1m.main.c | 35 + clang/test/Driver/armv8.1m.main.s | 24 +- clang/test/Driver/asan.c | 24 +- clang/test/Driver/msan.c | 24 +- clang/test/Driver/tsan.c | 10 +- .../test/OpenMP/nvptx_unsupported_type_codegen.cpp | 4 +- clang/test/Sema/attr-nothrow.c | 18 + clang/test/Sema/pr41027.c | 10 + .../test/SemaOpenCLCXX/address-space-deduction.cl | 20 +- .../test/SemaOpenCLCXX/address-space-references.cl | 5 + clang/unittests/Tooling/CMakeLists.txt | 1 - compiler-rt/lib/gwp_asan/CMakeLists.txt | 6 +- compiler-rt/lib/gwp_asan/definitions.h | 29 + .../lib/gwp_asan/guarded_pool_allocator.cpp | 433 ++++++++ compiler-rt/lib/gwp_asan/guarded_pool_allocator.h | 254 +++++ .../guarded_pool_allocator_posix.cpp | 96 ++ compiler-rt/lib/gwp_asan/tests/CMakeLists.txt | 8 +- compiler-rt/lib/gwp_asan/tests/alignment.cpp | 27 + compiler-rt/lib/gwp_asan/tests/basic.cpp | 60 + compiler-rt/lib/gwp_asan/tests/harness.h | 60 + compiler-rt/lib/gwp_asan/tests/slot_reuse.cpp | 72 ++ .../lib/gwp_asan/tests/thread_contention.cpp | 69 ++ libcxx/src/string.cpp | 140 +-- .../variant/variant.get/get_index.pass.cpp | 1 + .../variant/variant.get/get_type.pass.cpp | 1 + libcxx/www/cxx1z_status.html | 6 +- libcxx/www/cxx2a_status.html | 2 +- lld/ELF/Config.h | 2 + lld/ELF/Driver.cpp | 35 +- lld/ELF/InputFiles.cpp | 114 +- lld/ELF/InputFiles.h | 12 +- lld/ELF/Options.td | 4 + lld/ELF/SyntheticSections.cpp | 29 + lld/ELF/SyntheticSections.h | 7 + lld/ELF/Writer.cpp | 3 + lld/test/ELF/Inputs/i386-cet1.s | 16 + lld/test/ELF/Inputs/i386-cet2.s | 20 + lld/test/ELF/Inputs/i386-cet3.s | 5 + lld/test/ELF/Inputs/i386-cet4.s | 16 + lld/test/ELF/Inputs/x86-64-cet1.s | 17 + lld/test/ELF/Inputs/x86-64-cet2.s | 22 + lld/test/ELF/Inputs/x86-64-cet3.s | 5 + lld/test/ELF/Inputs/x86-64-cet4.s | 17 + lld/test/ELF/i386-cet.s | 47 + lld/test/ELF/x86-64-cet.s | 48 + lld/test/ELF/x86-property-relocatable.s | 36 + lld/test/wasm/lto/comdat.ll | 8 +- lld/test/wasm/pie.ll | 2 +- lld/test/wasm/shared.ll | 2 +- lld/wasm/InputFiles.cpp | 18 +- lld/wasm/InputFiles.h | 11 +- lld/wasm/SymbolTable.cpp | 28 +- lldb/cmake/modules/LLDBStandalone.cmake | 19 +- lldb/lit/SymbolFile/DWARF/split-dwarf-inlining.cpp | 8 + .../POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp | 13 +- .../Plugins/Process/Darwin/NativeProcessDarwin.cpp | 8 - lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 11 + llvm/cmake/modules/LLVMConfig.cmake.in | 1 + llvm/docs/AMDGPUUsage.rst | 2 - llvm/include/llvm/Analysis/LoopInfo.h | 161 +++ llvm/include/llvm/CodeGen/MachineInstr.h | 15 +- llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 17 +- llvm/include/llvm/IR/Argument.h | 2 + llvm/include/llvm/IR/Function.h | 10 +- llvm/include/llvm/IR/InstrTypes.h | 5 +- llvm/include/llvm/InitializePasses.h | 1 + llvm/include/llvm/LinkAllPasses.h | 2 + llvm/include/llvm/MC/MCInstrDesc.h | 6 + llvm/include/llvm/Object/ELFTypes.h | 2 +- llvm/include/llvm/Support/ARMTargetParser.h | 2 + llvm/include/llvm/Target/Target.td | 1 + llvm/include/llvm/Target/TargetSelectionDAG.td | 115 ++ llvm/include/llvm/Transforms/IPO/Attributor.h | 565 ++++++++++ llvm/include/llvm/Transforms/Utils/Cloning.h | 5 +- llvm/include/llvm/Transforms/Utils/LoopUtils.h | 5 +- llvm/lib/Analysis/LoopInfo.cpp | 214 ++++ llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 3 +- llvm/lib/Bitcode/Writer/ValueEnumerator.cpp | 2 +- llvm/lib/CodeGen/ExpandReductions.cpp | 5 +- .../lib/CodeGen/GlobalISel/InstructionSelector.cpp | 4 +- llvm/lib/CodeGen/ImplicitNullChecks.cpp | 3 +- llvm/lib/CodeGen/MIRParser/MILexer.cpp | 1 + llvm/lib/CodeGen/MIRParser/MILexer.h | 1 + llvm/lib/CodeGen/MIRParser/MIParser.cpp | 5 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 + llvm/lib/CodeGen/MachineCSE.cpp | 2 +- llvm/lib/CodeGen/MachineInstr.cpp | 4 +- llvm/lib/CodeGen/MachinePipeliner.cpp | 4 +- llvm/lib/CodeGen/PeepholeOptimizer.cpp | 2 +- llvm/lib/CodeGen/ScheduleDAGInstrs.cpp | 13 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 12 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 3 + .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 18 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 7 +- llvm/lib/CodeGen/TargetInstrInfo.cpp | 3 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 28 + llvm/lib/IR/Function.cpp | 4 + llvm/lib/LTO/LTOCodeGenerator.cpp | 1 + llvm/lib/Passes/PassBuilder.cpp | 1 + llvm/lib/Passes/PassRegistry.def | 1 + llvm/lib/Support/ARMTargetParser.cpp | 79 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 11 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 202 ++-- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 10 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 152 ++- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 18 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 11 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 10 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 61 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 2 - llvm/lib/Target/Mips/MipsInstructionSelector.cpp | 79 ++ llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 4 + llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 11 + llvm/lib/Target/PowerPC/PPCFrameLowering.h | 1 - llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 51 + llvm/lib/Target/SystemZ/SystemZInstrFP.td | 187 ++-- llvm/lib/Target/SystemZ/SystemZInstrVector.td | 181 +-- llvm/lib/Target/SystemZ/SystemZOperators.td | 20 +- .../WebAssembly/WebAssemblyTargetMachine.cpp | 13 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 47 +- llvm/lib/Target/X86/X86InstrAVX512.td | 2 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 84 ++ llvm/lib/Transforms/IPO/Attributor.cpp | 530 +++++++++ llvm/lib/Transforms/IPO/CMakeLists.txt | 1 + llvm/lib/Transforms/IPO/IPO.cpp | 1 + llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 11 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 24 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 9 +- .../Transforms/Instrumentation/MemorySanitizer.cpp | 2 + .../Scalar/CorrelatedValuePropagation.cpp | 117 +- llvm/lib/Transforms/Scalar/NewGVN.cpp | 5 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 10 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 52 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 52 +- llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll | 134 ++- llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 102 +- llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll | 17 +- .../CodeGen/AMDGPU/callee-special-input-sgprs.ll | 8 +- .../CodeGen/AMDGPU/callee-special-input-vgprs.ll | 99 +- .../AMDGPU/cross-block-use-is-not-abi-copy.ll | 16 +- .../test/CodeGen/AMDGPU/frame-index-elimination.ll | 94 +- llvm/test/CodeGen/AMDGPU/function-args.ll | 184 ++-- .../AMDGPU/large-work-group-promote-alloca.ll | 2 +- llvm/test/CodeGen/AMDGPU/load-hi16.ll | 52 +- llvm/test/CodeGen/AMDGPU/load-lo16.ll | 50 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 22 +- llvm/test/CodeGen/AMDGPU/multi-dword-vgpr-spill.ll | 109 +- llvm/test/CodeGen/AMDGPU/nested-calls.ll | 4 +- .../CodeGen/AMDGPU/pei-reg-scavenger-position.mir | 12 +- .../CodeGen/AMDGPU/promote-alloca-calling-conv.ll | 2 +- .../CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir | 52 +- llvm/test/CodeGen/AMDGPU/sibling-call.ll | 78 +- .../test/CodeGen/AMDGPU/sp-too-many-input-sgprs.ll | 102 ++ .../CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll | 6 +- .../CodeGen/AMDGPU/spill-empty-live-interval.mir | 6 +- .../CodeGen/AMDGPU/spill-offset-calculation.ll | 62 +- llvm/test/CodeGen/AMDGPU/stack-realign.ll | 16 +- .../AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir | 8 +- llvm/test/CodeGen/AMDGPU/store-hi16.ll | 14 +- .../CodeGen/AMDGPU/subreg-split-live-in-error.mir | 7 +- llvm/test/CodeGen/Hexagon/isel-prefer.ll | 79 +- llvm/test/CodeGen/Hexagon/ntstbit.ll | 35 +- llvm/test/CodeGen/Hexagon/tstbit.ll | 11 +- .../CodeGen/MIR/AMDGPU/machine-function-info.ll | 4 +- .../Mips/GlobalISel/instruction-select/fcmp.mir | 1152 ++++++++++++++++++++ .../CodeGen/Mips/GlobalISel/legalizer/fcmp.mir | 73 ++ llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fcmp.ll | 438 ++++++++ .../CodeGen/Mips/GlobalISel/regbankselect/fcmp.mir | 75 ++ llvm/test/CodeGen/SystemZ/fp-strict-add-01.ll | 173 +++ llvm/test/CodeGen/SystemZ/fp-strict-add-02.ll | 172 +++ llvm/test/CodeGen/SystemZ/fp-strict-add-03.ll | 25 + llvm/test/CodeGen/SystemZ/fp-strict-add-04.ll | 22 + llvm/test/CodeGen/SystemZ/fp-strict-alias.ll | 140 +++ llvm/test/CodeGen/SystemZ/fp-strict-conv-01.ll | 95 ++ llvm/test/CodeGen/SystemZ/fp-strict-conv-02.ll | 33 + llvm/test/CodeGen/SystemZ/fp-strict-conv-03.ll | 35 + llvm/test/CodeGen/SystemZ/fp-strict-conv-04.ll | 35 + llvm/test/CodeGen/SystemZ/fp-strict-conv-15.ll | 64 ++ llvm/test/CodeGen/SystemZ/fp-strict-div-01.ll | 173 +++ llvm/test/CodeGen/SystemZ/fp-strict-div-02.ll | 173 +++ llvm/test/CodeGen/SystemZ/fp-strict-div-03.ll | 25 + llvm/test/CodeGen/SystemZ/fp-strict-div-04.ll | 22 + llvm/test/CodeGen/SystemZ/fp-strict-mul-01.ll | 173 +++ llvm/test/CodeGen/SystemZ/fp-strict-mul-02.ll | 283 +++++ llvm/test/CodeGen/SystemZ/fp-strict-mul-03.ll | 173 +++ llvm/test/CodeGen/SystemZ/fp-strict-mul-04.ll | 314 ++++++ llvm/test/CodeGen/SystemZ/fp-strict-mul-05.ll | 25 + llvm/test/CodeGen/SystemZ/fp-strict-mul-06.ll | 137 +++ llvm/test/CodeGen/SystemZ/fp-strict-mul-07.ll | 130 +++ llvm/test/CodeGen/SystemZ/fp-strict-mul-08.ll | 145 +++ llvm/test/CodeGen/SystemZ/fp-strict-mul-09.ll | 138 +++ llvm/test/CodeGen/SystemZ/fp-strict-mul-10.ll | 55 + llvm/test/CodeGen/SystemZ/fp-strict-mul-11.ll | 40 + llvm/test/CodeGen/SystemZ/fp-strict-round-01.ll | 250 +++++ llvm/test/CodeGen/SystemZ/fp-strict-round-02.ll | 254 +++++ llvm/test/CodeGen/SystemZ/fp-strict-round-03.ll | 262 +++++ llvm/test/CodeGen/SystemZ/fp-strict-sqrt-01.ll | 94 ++ llvm/test/CodeGen/SystemZ/fp-strict-sqrt-02.ll | 94 ++ llvm/test/CodeGen/SystemZ/fp-strict-sqrt-03.ll | 23 + llvm/test/CodeGen/SystemZ/fp-strict-sqrt-04.ll | 20 + llvm/test/CodeGen/SystemZ/fp-strict-sub-01.ll | 173 +++ llvm/test/CodeGen/SystemZ/fp-strict-sub-02.ll | 173 +++ llvm/test/CodeGen/SystemZ/fp-strict-sub-03.ll | 25 + llvm/test/CodeGen/SystemZ/fp-strict-sub-04.ll | 22 + llvm/test/CodeGen/SystemZ/vec-strict-add-01.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-add-02.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-div-01.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-div-02.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-max-01.ll | 80 ++ llvm/test/CodeGen/SystemZ/vec-strict-min-01.ll | 80 ++ llvm/test/CodeGen/SystemZ/vec-strict-mul-01.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-mul-02.ll | 36 + llvm/test/CodeGen/SystemZ/vec-strict-mul-03.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-mul-04.ll | 37 + llvm/test/CodeGen/SystemZ/vec-strict-mul-05.ll | 75 ++ llvm/test/CodeGen/SystemZ/vec-strict-round-01.ll | 155 +++ llvm/test/CodeGen/SystemZ/vec-strict-round-02.ll | 154 +++ llvm/test/CodeGen/SystemZ/vec-strict-sqrt-01.ll | 29 + llvm/test/CodeGen/SystemZ/vec-strict-sqrt-02.ll | 29 + llvm/test/CodeGen/SystemZ/vec-strict-sub-01.ll | 34 + llvm/test/CodeGen/SystemZ/vec-strict-sub-02.ll | 33 + .../SystemZ/vector-constrained-fp-intrinsics.ll | 334 +++--- llvm/test/CodeGen/WebAssembly/address-offsets.ll | 2 +- llvm/test/CodeGen/WebAssembly/call-pic.ll | 2 +- llvm/test/CodeGen/WebAssembly/load-store-pic.ll | 2 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 25 +- llvm/test/CodeGen/X86/dag-fmf-cse.ll | 13 +- llvm/test/CodeGen/X86/fdiv.ll | 11 + llvm/test/CodeGen/X86/fp-fold.ll | 38 + .../hoist-and-by-const-from-lshr-in-eqcmp-zero.ll | 804 ++++++-------- .../hoist-and-by-const-from-shl-in-eqcmp-zero.ll | 796 ++++++-------- llvm/test/CodeGen/X86/horizontal-reduce-smax.ll | 104 +- llvm/test/CodeGen/X86/horizontal-reduce-smin.ll | 104 +- llvm/test/CodeGen/X86/horizontal-reduce-umax.ll | 120 +- llvm/test/CodeGen/X86/horizontal-reduce-umin.ll | 100 +- llvm/test/CodeGen/X86/machine-combiner-int-vec.ll | 320 +++--- llvm/test/CodeGen/X86/memset-nonzero.ll | 5 +- .../CodeGen/X86/merge-consecutive-stores-nt.ll | 367 +++++++ llvm/test/CodeGen/X86/oddshuffles.ll | 157 ++- llvm/test/CodeGen/X86/pr29112.ll | 54 +- llvm/test/CodeGen/X86/vector-reduce-smax-widen.ll | 148 +-- llvm/test/CodeGen/X86/vector-reduce-smax.ll | 148 +-- llvm/test/CodeGen/X86/vector-reduce-smin-widen.ll | 148 +-- llvm/test/CodeGen/X86/vector-reduce-smin.ll | 148 +-- llvm/test/CodeGen/X86/vector-reduce-umax-widen.ll | 166 +-- llvm/test/CodeGen/X86/vector-reduce-umax.ll | 166 +-- llvm/test/CodeGen/X86/vector-reduce-umin-widen.ll | 146 +-- llvm/test/CodeGen/X86/vector-reduce-umin.ll | 146 +-- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 5 +- llvm/test/CodeGen/X86/x86-interleaved-access.ll | 68 +- .../Instrumentation/MemorySanitizer/msan_basic.ll | 16 + llvm/test/Other/opt-O2-pipeline.ll | 1 + llvm/test/Other/opt-O3-pipeline.ll | 1 + llvm/test/Other/opt-Os-pipeline.ll | 1 + .../CorrelatedValuePropagation/profmd.ll | 119 ++ llvm/test/Transforms/EarlyCSE/commute.ll | 102 ++ .../test/Transforms/FunctionAttrs/arg_nocapture.ll | 446 ++++++++ llvm/test/Transforms/FunctionAttrs/arg_returned.ll | 590 ++++++++++ llvm/test/Transforms/FunctionAttrs/fn_noreturn.ll | 135 +++ .../read_write_returned_arguments_scc.ll | 165 +++ llvm/test/Transforms/FunctionAttrs/readattrs.ll | 31 +- .../IndVarSimplify/infer-poison-flags.ll | 369 +++++++ llvm/test/Transforms/InstCombine/byval.ll | 24 + llvm/test/Transforms/NewGVN/addrspacecast.ll | 108 ++ llvm/test/Transforms/Reassociate/fast-basictest.ll | 97 +- .../test/Transforms/SLPVectorizer/X86/broadcast.ll | 58 +- .../llvm-objdump/X86/section-filter-disasm.test | 43 + .../llvm-objdump/X86/section-filter-relocs.test | 15 +- llvm/test/tools/llvm-readobj/demangle.test | 14 +- llvm/test/tools/llvm-readobj/gnu-hash-symbols.test | 14 +- llvm/test/tools/yaml2obj/implicit-sections.test | 86 ++ llvm/tools/dsymutil/MachOUtils.cpp | 2 +- llvm/tools/dsymutil/MachOUtils.h | 3 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 3 +- llvm/tools/llvm-size/llvm-size.cpp | 58 +- llvm/tools/yaml2obj/yaml2elf.cpp | 181 +-- llvm/unittests/Analysis/LoopInfoTest.cpp | 900 +++++++++++++++ llvm/utils/TableGen/CodeGenInstruction.cpp | 1 + llvm/utils/TableGen/CodeGenInstruction.h | 1 + llvm/utils/TableGen/InstrInfoEmitter.cpp | 1 + llvm/utils/UpdateTestChecks/asm.py | 19 + .../gn/secondary/llvm/lib/Transforms/IPO/BUILD.gn | 1 + openmp/runtime/src/kmp.h | 1 + openmp/runtime/src/kmp_settings.cpp | 14 + openmp/runtime/src/z_Linux_util.cpp | 11 + openmp/runtime/test/misc_bugs/stack-propagate.c | 65 ++ 388 files changed, 18836 insertions(+), 4497 deletions(-) create mode 100644 clang/test/Sema/attr-nothrow.c create mode 100644 clang/test/Sema/pr41027.c create mode 100644 clang/test/SemaOpenCLCXX/address-space-references.cl create mode 100644 compiler-rt/lib/gwp_asan/definitions.h create mode 100644 compiler-rt/lib/gwp_asan/guarded_pool_allocator.cpp create mode 100644 compiler-rt/lib/gwp_asan/guarded_pool_allocator.h create mode 100644 compiler-rt/lib/gwp_asan/platform_specific/guarded_pool_allocat [...] create mode 100644 compiler-rt/lib/gwp_asan/tests/alignment.cpp create mode 100644 compiler-rt/lib/gwp_asan/tests/basic.cpp create mode 100644 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100644 llvm/test/Transforms/CorrelatedValuePropagation/profmd.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/arg_nocapture.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/arg_returned.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/fn_noreturn.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/read_write_returned_argument [...] create mode 100644 llvm/test/Transforms/IndVarSimplify/infer-poison-flags.ll create mode 100644 llvm/test/Transforms/InstCombine/byval.ll create mode 100644 llvm/test/Transforms/NewGVN/addrspacecast.ll create mode 100644 llvm/test/tools/llvm-objdump/X86/section-filter-disasm.test create mode 100644 llvm/test/tools/yaml2obj/implicit-sections.test create mode 100644 openmp/runtime/test/misc_bugs/stack-propagate.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (bfc92c8d -> c85f60a4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards bfc92c8d 0: update: llvm-linux: all new c85f60a4 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (bfc92c8d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-build_llvm/console.log | 11800 ++++++++++++++++++------------------ 03-build_linux/console.log | 638 +- 04-boot_linux/console.log | 2 +- console.log | 12606 ++++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 6 files changed, 12616 insertions(+), 12608 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[gcc] branch master updated (534a047190d -> 26329c24fc2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 534a047190d Daily bump. new 26329c24fc2 compiler: make use of specialized fast map routines The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/go/gofrontend/MERGE | 2 +- gcc/go/gofrontend/escape.cc | 10 ++ gcc/go/gofrontend/expressions.cc | 237 ++++++++++++++++++++++++++++----------- gcc/go/gofrontend/runtime.def | 59 ++++++++++ gcc/go/gofrontend/statements.cc | 145 +++++++++++++++++------- gcc/go/gofrontend/types.cc | 45 +++++++- gcc/go/gofrontend/types.h | 25 ++++- libgo/go/runtime/map_fast32.go | 9 ++ libgo/go/runtime/map_fast64.go | 9 ++ libgo/go/runtime/map_faststr.go | 8 ++ 10 files changed, 435 insertions(+), 114 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-allmodconfig updated (f9e8e1d8 -> 9233a7da)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-allmodconfig in repository toolchain/ci/base-artifacts. discards f9e8e1d8 0: update: llvm-linux: all new 9233a7da 0: update: llvm-0489682ef3b5659eaf05dd7d51ab6c049575ca6b: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f9e8e1d8) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 122 +- 02-build_llvm/console.log | 11625 ++++++++++++++++----------------- 03-build_linux/console.log | 1717 +++-- 04-boot_linux/console.log | 2 +- 06-update_baseline/console.log | 25 + console.log | 13491 +++++++++++++++++++-------------------- jenkins/manifest.sh | 9 +- 7 files changed, 13382 insertions(+), 13609 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-defconfig updated (0489682ef3b -> d95b14d04ee)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-defconfig in repository toolchain/ci/llvm-project. from 0489682ef3b Merging r360405: adds 836f1e2be4c Merging r359891: ------------------------------------------ [...] adds b73bafaff70 Correct test in r362634 adds c8af2415480 Merging r359898: ------------------------------------------ [...] adds 5b37d896a02 Merging r359899: ------------------------------------------ [...] adds d95b14d04ee Merging r360293: ------------------------------------------ [...] No new revisions were added by this update. Summary of changes: llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 68 +++--- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 12 +- llvm/test/CodeGen/AMDGPU/add.ll | 83 ++------ .../ds-negative-offset-addressing-mode-loop.ll | 6 +- llvm/test/CodeGen/AMDGPU/fence-barrier.ll | 3 +- .../test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir | 230 +++++++++++++++++++++ .../AMDGPU/fold-immediate-operand-shrink.mir | 56 +++++ llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll | 3 +- llvm/test/CodeGen/AMDGPU/{add.ll => r600.add.ll} | 56 ----- llvm/test/CodeGen/AMDGPU/{sub.ll => r600.sub.ll} | 95 --------- llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 2 +- llvm/test/CodeGen/AMDGPU/sub.ll | 90 ++++---- .../test/tools/llvm-objdump/AMDGPU/source-lines.ll | 4 +- 13 files changed, 401 insertions(+), 307 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir copy llvm/test/CodeGen/AMDGPU/{add.ll => r600.add.ll} (75%) copy llvm/test/CodeGen/AMDGPU/{sub.ll => r600.sub.ll} (63%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

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Tcwg-commits June 2019