Tcwg-commits June 2019

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15913 discussions

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (577d59bc679 -> 2f94203e23d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/llvm-project. from 577d59bc679 svn propset svn:executable on utils/prepare-code-coverage-a [...] adds 453b7caaf7f PR42111: Use guarded initialization for thread-local variab [...] adds 8ca54557647 Factor out duplicated code building a MemberExpr and markin [...] adds 78fdce25a1b [X86] Cleanup convertIntLogicToFPLogic a little. NFCI adds c012188adaf Changed force build of GWP-ASan options parser to be static [...] adds 2e05045e260 [TargetTransformInfo] assert on nullptr adds fe97754acff Initial support for IBM MASS vector library adds f090e6f7b6b [llvm-objdump/llvm-readobj/obj2yaml/yaml2obj] Support DT_PP [...] adds ff918fb487e Fix -Wsign-compare by explicit cast after r362557 adds 6321c680659 Initial support for vectorization using MASSV (IBM MASS vec [...] adds 4b7bdcd3184 [LLD][COFF] Don't take into account the 'age' when looking [...] adds cfb6c82172e [PowerPC][NFC] Add codegen test for consecutive stores of v [...] adds 1611cc1cba1 [analyzer] exploded-graph-rewriter: Pick up python from cma [...] adds 44fb55bf961 [analyzer] exploded-graph-rewriter: Add the missing license [...] adds 7c842fadf10 [PowerPC] Collapse RLDICL/RLDICR into RLDIC when possible adds 76467c4d7fb [NFC][FnAttrs] Stress tests for attribute deduction adds aade782a98e [Attributor] Pass infrastructure and fixpoint framework adds 2057f8366a4 Read .note.gnu.property sections and emit a merged .note.gn [...] adds 516e6cc1dd9 [Clang] Disable new PM for tests that use optimization leve [...] adds c0eb8a98253 Add __FILE_NAME__ to ReleaseNotes. NFC adds fa449a9bb27 Suppress false-positive GCC -Wreturn-type warning. adds a3e16719c46 Resubmit "[CorrelatedValuePropagation] Fix prof branch_weig [...] adds 4cd07dbeec9 Reduce memory consumption of coverage dumps adds 9d8d0f68fbc [CMake][Fuchsia] Use libc++ ABIv2 for the first stage build adds da7f033693a Ignore DIEs in the skeleton unit in a DWO scenario adds 2ae86d20893 [clang] [test] Add a (xfailing) test for PR41027 adds 3c850ca5603 [CMake] Export CMAKE_CONFIGURATION_TYPES for the LLVM build-tree adds c7694624383 [CMake] Add configuration dirs as potential locations for l [...] adds 6fc4c1cc54a Include what you use in PPCFrameLowering.h adds e12334a0f24 [ELF] Allow reading of more than one FEATURE_1_AND in same object. adds db134aaec24 [IPO] Disabled 'default only' switch statements to fix MSVC [...] adds daeeb33f860 Sanitize llvm-size help adds ddfbfd6172f [X86][SSE] Add some nt-store test cases inspired by PR42123 adds 5a81af547c2 [TargetLowering] SimplifyDemandedBits - pull out shift valu [...] adds b42196661ba [llvm-objdump] - Disassemble non-executable sections if spe [...] adds 9b2b8ad8b18 Revert "Factor out duplicated code building a MemberExpr an [...] adds 2121a4f7335 gn build: Merge r362578 adds 886a55eaa05 [X86][AVX] combineX86ShuffleChain - combine shuffle(extract [...] adds a1bb4fb79d8 [ARM] Allow "-march=foo+fp" to vary with foo adds f95e6c06534 [ARM] Allow "-march=foo+fp" to vary with foo adds 66296dc3e4c [yaml2obj] - Change how we handle implicit sections. adds 22e99c434fb [MIPS GlobalISel] Select fcmp adds 5145b1e4421 [Sema] Prevent binding incompatible addr space ref to temporaries adds 54bd6c840e3 UpdateTestChecks: hexagon support adds 253086230fa [NFC][Codegen][X86] Add AVX2 runline for '(X & (C l>> Y)) = [...] adds da59652c1ba Avoid using NoThrow Exception Specifier in non-C++ Modes. adds d34797dfc26 Title: [LOOPINFO] Extend Loop object to add utilities to ge [...] adds b90b3547988 [LoopInfo] Fix unused variable warning. NFC. adds 7ca9b978c4f [OpenCL][PR42031] Prevent deducing addr space in type alias. adds ad62a3a2992 [LoopUtils][SLPVectorizer] clean up management of fast-math-flags adds 15c657d13d6 [SLP] Fix regression in broadcasts caused by operand reorde [...] adds 5da702308c5 [llvm-readobj] - Remove TODOs from gnu-hash-symbols.test an [...] adds 590b1aee609 Revert "Title: [LOOPINFO] Extend Loop object to add utiliti [...] adds a0e350e640b [X86][SSE] Add additional nt-load test cases as discussed o [...] adds de586bd1fd5 [X86][AVX] Generalize split256BitStore to splitVectorStore. NFCI. adds d47f5488cf0 Added propagation of not big initial stack size of master t [...] adds 5659b36c15b [DynamicLoader] Make sure we always set the rendezvous breakpoint adds 2bf82879bde [x86] split more 256-bit stores of concatenated vectors adds 3027a2999c3 [dsymutil] Support more than 4 architectures adds 77d6adc491a Fix shadow local variable warning. NFCI. adds d97ea1bc1ac [Clang] Fix pretty printing of CUDA address spaces adds b67cb3cda05 Use LTO capable linker adds 579c8df7013 [lld] Explicitly ignore comdat groups when parsing LTO object(s) adds a282a61ba3a [WebAssembly] Handle object parsing more like the ELF backend adds 0a31726d200 [NFC][Reassociate] Regenerate CHECKs for fast-basictest.ll adds 13dd125043f [Tests] Add poison inference tests for indvars showing both [...] adds d0fff89b816 [X86] Add the vector integer min/max instructions to isAsso [...] adds 5162266515e [NFC][Reassociate] Add unary fneg tests to fast-basictest.ll adds 8b83a9c6b13 [NFC][Reassociate] Fix mistake in 468b2ad adds 84cfca0f2b7 [analyzer] PathDiagnosticPopUpPiece: working with CharSourceRange adds 036fa5346f2 [X86][SSE] Add vector tests to cover more isNegatibleForFre [...] adds a95edb9dc1d [GWP-ASan] Core Guarded Pool Allocator [4]. adds e34d1a4e07b [cmake] Remove duplicate TestingSupport library for linking adds 53572d0470c [WebAssembly] Limit PIC support to the Emscripten target adds ecf3ae4a703 [NativeProcessDarwin] Remove dead code. NFCI. adds 0f8a764e8fa AMDGPU: Fix using 2 different enums for same operand flags adds 4fb580c3147 AMDGPU: Remove amdgpu-max-work-group-size attribute adds 607c8a9d148 IR: make getParamByValType Just Work. NFC. adds 8d7f118ab2b InstCombine: correctly change byval type attribute alongsid [...] adds 2d0896c1cb9 [LOOPINFO] Extend Loop object to add utilities to get the l [...] adds ba86f2a22e7 [WebAssembly] Use Emscripten triples in PIC tests. adds a3701caad82 [clang-format][NFC] Fix BS_Allman style example in the head [...] adds 3975b15dbab [X86] Fix mistake that marked VADDSSrrb_Int/VADDSDrrb_Int/V [...] adds 7ce7110e6d9 Speedup to_string and to_wstring for integers using stack b [...] adds 7c663cde14e [WebAssembly] Improve lto/comdat.ll test. NFC. adds 9423f5ef56d Fix FileCheck prefixes in test case. adds c46827c7eda LLVM IR: Generate new-style byval-with-Type from Clang adds 663d762c9a5 NewGVN: Handle addrspacecast adds ac111e526dd [InstCombine] simplify code for bitcast of insertelement; NFC adds e3eeacd70a8 [CallSite removal] Refactoring llvm::InlineFunction APIs adds acb56090639 [EarlyCSE] Add tests for negated min/max/abs [NFC] adds 5347024e283 Update issue statuses. Reviewed as https://reviews.llvm.org/D62932 adds 8f500a6f9ca [libcxx][test] Include test_workarounds.h where needed adds b812b7a45ed AMDGPU: Invert frame index offset interpretation adds 2f94203e23d Revert "[AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pa [...] No new revisions were added by this update. Summary of changes: .../cmake/caches/DistributionExample-stage2.cmake | 2 +- clang/cmake/caches/DistributionExample.cmake | 7 +- clang/cmake/caches/Fuchsia.cmake | 25 +- clang/docs/ClangFormatStyleOptions.rst | 21 +- clang/docs/ReleaseNotes.rst | 6 +- clang/include/clang/AST/Expr.h | 68 +- clang/include/clang/AST/Stmt.h | 1 - clang/include/clang/AST/Type.h | 20 +- clang/include/clang/Basic/CodeGenOptions.h | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 3 + clang/include/clang/Driver/Options.td | 2 +- clang/include/clang/Format/Format.h | 21 +- clang/include/clang/Sema/Initialization.h | 3 + clang/include/clang/Sema/ParsedAttr.h | 2 +- clang/lib/AST/DeclBase.cpp | 1 - clang/lib/AST/Expr.cpp | 72 +- clang/lib/AST/TypePrinter.cpp | 8 +- clang/lib/CodeGen/BackendUtil.cpp | 3 + clang/lib/CodeGen/CGBuiltin.cpp | 2 +- clang/lib/CodeGen/CGCall.cpp | 2 +- clang/lib/CodeGen/CGDeclCXX.cpp | 8 +- clang/lib/CodeGen/CoverageMappingGen.cpp | 17 +- clang/lib/Driver/ToolChains/Arch/ARM.cpp | 72 +- clang/lib/Driver/ToolChains/Arch/ARM.h | 3 + clang/lib/Frontend/CompilerInvocation.cpp | 2 + clang/lib/Frontend/Rewrite/RewriteModernObjC.cpp | 54 +- clang/lib/Frontend/Rewrite/RewriteObjC.cpp | 24 +- clang/lib/Sema/SemaExprCXX.cpp | 9 +- clang/lib/Sema/SemaInit.cpp | 19 +- clang/lib/Sema/SemaType.cpp | 28 +- clang/lib/Serialization/ASTReaderStmt.cpp | 92 +- clang/lib/Serialization/ASTWriterStmt.cpp | 56 +- clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp | 6 +- .../Analysis/exploded-graph-rewriter/lit.local.cfg | 11 +- clang/test/CodeGen/aapcs-align.cpp | 8 +- clang/test/CodeGen/arm-aapcs-vfp.c | 6 +- clang/test/CodeGen/arm-arguments.c | 8 +- clang/test/CodeGen/arm-byval-align.c | 2 +- clang/test/CodeGen/blocks.c | 2 +- clang/test/CodeGen/callback_annotated.c | 6 +- clang/test/CodeGen/cfi-icall-cross-dso.c | 8 +- clang/test/CodeGen/complex-builtins.c | 76 +- clang/test/CodeGen/complex-libcalls.c | 80 +- clang/test/CodeGen/complex-math.c | 16 +- clang/test/CodeGen/dllimport.c | 4 +- clang/test/CodeGen/inline2.c | 4 +- clang/test/CodeGen/le32-arguments.c | 6 +- clang/test/CodeGen/lifetime.c | 6 +- clang/test/CodeGen/mingw-long-double.c | 2 +- clang/test/CodeGen/nvptx-abi.c | 10 +- clang/test/CodeGen/ppc64-align-struct.c | 6 +- clang/test/CodeGen/ppc64le-aggregates.c | 8 +- clang/test/CodeGen/ppc64le-f128Aggregates.c | 4 +- clang/test/CodeGen/regcall.c | 10 +- clang/test/CodeGen/regparm-struct.c | 2 +- clang/test/CodeGen/renderscript.c | 2 +- .../CodeGen/sanitize-address-field-padding.cpp | 2 +- clang/test/CodeGen/sparc-arguments.c | 4 +- clang/test/CodeGen/sparcv8-abi.c | 6 +- clang/test/CodeGen/stdcall-fastcall.c | 4 +- clang/test/CodeGen/struct-passing.c | 4 +- clang/test/CodeGen/tbaa-for-vptr.cpp | 10 +- clang/test/CodeGen/vectorcall.c | 4 +- clang/test/CodeGen/wasm-arguments.c | 12 +- clang/test/CodeGen/x86_32-arguments-darwin.c | 46 +- clang/test/CodeGen/x86_32-arguments-iamcu.c | 6 +- clang/test/CodeGen/x86_32-arguments-linux.c | 28 +- clang/test/CodeGen/x86_32-arguments-realign.c | 2 +- clang/test/CodeGen/x86_64-arguments-nacl.c | 4 +- clang/test/CodeGen/x86_64-arguments.c | 34 +- clang/test/CodeGenCUDA/kernel-args-alignment.cu | 2 +- clang/test/CodeGenCUDA/kernel-args.cu | 8 +- clang/test/CodeGenCXX/amdgcn-func-arg.cpp | 6 +- clang/test/CodeGenCXX/atomicinit.cpp | 2 +- clang/test/CodeGenCXX/cfi-speculative-vtable.cpp | 4 +- clang/test/CodeGenCXX/cxx1y-variable-template.cpp | 17 + clang/test/CodeGenCXX/debug-info-class-optzns.cpp | 2 +- clang/test/CodeGenCXX/dllimport-members.cpp | 4 +- clang/test/CodeGenCXX/dllimport.cpp | 2 +- clang/test/CodeGenCXX/dso-local-executable.cpp | 6 +- clang/test/CodeGenCXX/init-invariant.cpp | 2 +- clang/test/CodeGenCXX/merge-functions.cpp | 2 +- .../CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp | 2 +- .../CodeGenCXX/microsoft-abi-sret-and-byval.cpp | 30 +- clang/test/CodeGenCXX/ms-inline-asm-fields.cpp | 2 +- clang/test/CodeGenCXX/nrvo.cpp | 6 +- clang/test/CodeGenCXX/regcall.cpp | 4 +- clang/test/CodeGenCXX/regparm.cpp | 2 +- .../sanitize-dtor-nontrivial-virtual-base.cpp | 2 +- clang/test/CodeGenCXX/stmtexpr.cpp | 2 +- .../visibility-hidden-extern-templates.cpp | 2 +- clang/test/CodeGenCXX/wasm-args-returns.cpp | 6 +- clang/test/CodeGenCXX/x86_32-arguments.cpp | 4 +- clang/test/CodeGenCXX/x86_64-arguments-avx.cpp | 2 +- .../test/CodeGenCXX/x86_64-arguments-nacl-x32.cpp | 4 +- clang/test/CodeGenCXX/x86_64-arguments.cpp | 16 +- clang/test/CodeGenObjC/local-static-block.m | 14 +- clang/test/CodeGenObjCXX/nrvo.mm | 2 +- clang/test/CodeGenOpenCL/addr-space-struct-arg.cl | 20 +- .../test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl | 16 +- .../test/CodeGenOpenCL/cl20-device-side-enqueue.cl | 6 +- .../kernels-have-spir-cc-by-default.cl | 6 +- clang/test/Driver/armv8.1m.main.c | 35 + clang/test/Driver/armv8.1m.main.s | 24 +- clang/test/Driver/asan.c | 24 +- clang/test/Driver/autocomplete.c | 1 + clang/test/Driver/fveclib.c | 2 + clang/test/Driver/msan.c | 24 +- clang/test/Driver/tsan.c | 10 +- .../test/OpenMP/nvptx_unsupported_type_codegen.cpp | 4 +- clang/test/Sema/attr-nothrow.c | 18 + clang/test/Sema/pr41027.c | 10 + .../test/SemaOpenCLCXX/address-space-deduction.cl | 20 +- .../test/SemaOpenCLCXX/address-space-references.cl | 5 + clang/unittests/Tooling/CMakeLists.txt | 1 - clang/utils/analyzer/exploded-graph-rewriter.py | 9 + compiler-rt/lib/gwp_asan/CMakeLists.txt | 8 +- compiler-rt/lib/gwp_asan/definitions.h | 29 + .../lib/gwp_asan/guarded_pool_allocator.cpp | 433 ++++++ compiler-rt/lib/gwp_asan/guarded_pool_allocator.h | 254 ++++ .../guarded_pool_allocator_posix.cpp | 96 ++ compiler-rt/lib/gwp_asan/tests/CMakeLists.txt | 8 +- compiler-rt/lib/gwp_asan/tests/alignment.cpp | 27 + compiler-rt/lib/gwp_asan/tests/basic.cpp | 60 + compiler-rt/lib/gwp_asan/tests/harness.h | 60 + compiler-rt/lib/gwp_asan/tests/slot_reuse.cpp | 72 + .../lib/gwp_asan/tests/thread_contention.cpp | 69 + libcxx/src/string.cpp | 140 +- .../variant/variant.get/get_index.pass.cpp | 1 + .../variant/variant.get/get_type.pass.cpp | 1 + libcxx/www/cxx1z_status.html | 6 +- libcxx/www/cxx2a_status.html | 2 +- lld/COFF/DebugTypes.cpp | 4 +- lld/ELF/Config.h | 2 + lld/ELF/Driver.cpp | 35 +- lld/ELF/InputFiles.cpp | 114 +- lld/ELF/InputFiles.h | 12 +- lld/ELF/Options.td | 4 + lld/ELF/SyntheticSections.cpp | 29 + lld/ELF/SyntheticSections.h | 7 + lld/ELF/Writer.cpp | 3 + .../Inputs/pdb-type-server-valid-signature.yaml | 2 +- lld/test/ELF/Inputs/i386-cet1.s | 16 + lld/test/ELF/Inputs/i386-cet2.s | 20 + lld/test/ELF/Inputs/i386-cet3.s | 5 + lld/test/ELF/Inputs/i386-cet4.s | 16 + lld/test/ELF/Inputs/x86-64-cet1.s | 17 + lld/test/ELF/Inputs/x86-64-cet2.s | 22 + lld/test/ELF/Inputs/x86-64-cet3.s | 5 + lld/test/ELF/Inputs/x86-64-cet4.s | 17 + lld/test/ELF/i386-cet.s | 47 + lld/test/ELF/x86-64-cet.s | 48 + lld/test/ELF/x86-property-relocatable.s | 36 + lld/test/wasm/lto/comdat.ll | 8 +- lld/test/wasm/pie.ll | 2 +- lld/test/wasm/shared.ll | 2 +- lld/wasm/InputFiles.cpp | 18 +- lld/wasm/InputFiles.h | 11 +- lld/wasm/SymbolTable.cpp | 28 +- lldb/cmake/modules/LLDBStandalone.cmake | 19 +- lldb/lit/SymbolFile/DWARF/split-dwarf-inlining.cpp | 8 + .../POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp | 13 +- .../Plugins/Process/Darwin/NativeProcessDarwin.cpp | 8 - lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 11 + .../x86/x86AssemblyInspectionEngine.cpp | 2 +- llvm/cmake/modules/LLVMConfig.cmake.in | 1 + llvm/docs/AMDGPUUsage.rst | 2 - llvm/include/llvm/Analysis/LoopInfo.h | 161 +++ llvm/include/llvm/Analysis/TargetLibraryInfo.h | 1 + .../llvm/Analysis/TargetTransformInfoImpl.h | 21 +- llvm/include/llvm/Analysis/VecFuncs.def | 79 +- llvm/include/llvm/BinaryFormat/DynamicTags.def | 13 + llvm/include/llvm/IR/Argument.h | 2 + llvm/include/llvm/IR/Function.h | 10 +- llvm/include/llvm/IR/InstrTypes.h | 5 +- llvm/include/llvm/InitializePasses.h | 1 + llvm/include/llvm/LinkAllPasses.h | 2 + llvm/include/llvm/Object/ELFTypes.h | 2 +- llvm/include/llvm/Support/ARMTargetParser.h | 2 + llvm/include/llvm/Transforms/IPO/Attributor.h | 565 ++++++++ llvm/include/llvm/Transforms/Utils/Cloning.h | 5 +- llvm/include/llvm/Transforms/Utils/LoopUtils.h | 5 +- llvm/lib/Analysis/LoopInfo.cpp | 214 +++ llvm/lib/Analysis/TargetLibraryInfo.cpp | 10 + llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 3 +- llvm/lib/Bitcode/Writer/ValueEnumerator.cpp | 2 +- llvm/lib/CodeGen/ExpandReductions.cpp | 5 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 12 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 7 +- llvm/lib/IR/Function.cpp | 4 + llvm/lib/LTO/LTOCodeGenerator.cpp | 1 + llvm/lib/ObjectYAML/ELFYAML.cpp | 9 + llvm/lib/Passes/PassBuilder.cpp | 1 + llvm/lib/Passes/PassRegistry.def | 1 + llvm/lib/Support/ARMTargetParser.cpp | 79 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 104 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 11 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 175 ++- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 10 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 142 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 18 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 11 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 10 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 61 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 2 - llvm/lib/Target/Mips/MipsInstructionSelector.cpp | 79 + llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 4 + llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 11 + llvm/lib/Target/PowerPC/PPCFrameLowering.h | 1 - llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 52 + .../WebAssembly/WebAssemblyTargetMachine.cpp | 13 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 94 +- llvm/lib/Target/X86/X86InstrAVX512.td | 2 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 84 ++ llvm/lib/Transforms/IPO/Attributor.cpp | 530 +++++++ llvm/lib/Transforms/IPO/CMakeLists.txt | 1 + llvm/lib/Transforms/IPO/IPO.cpp | 1 + llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 11 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 24 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 9 +- .../Scalar/CorrelatedValuePropagation.cpp | 117 +- llvm/lib/Transforms/Scalar/NewGVN.cpp | 5 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 10 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 52 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 52 +- .../CodeGen/AArch64/GlobalISel/fold-fp-select.mir | 351 ----- llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll | 18 +- llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 38 +- llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll | 7 +- .../CodeGen/AMDGPU/callee-special-input-sgprs.ll | 6 +- .../CodeGen/AMDGPU/callee-special-input-vgprs.ll | 31 +- .../test/CodeGen/AMDGPU/frame-index-elimination.ll | 22 +- llvm/test/CodeGen/AMDGPU/function-args.ll | 184 +-- .../AMDGPU/large-work-group-promote-alloca.ll | 2 +- llvm/test/CodeGen/AMDGPU/load-hi16.ll | 34 +- llvm/test/CodeGen/AMDGPU/load-lo16.ll | 30 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 22 +- .../CodeGen/AMDGPU/pei-reg-scavenger-position.mir | 12 +- .../CodeGen/AMDGPU/promote-alloca-calling-conv.ll | 2 +- .../CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir | 52 +- llvm/test/CodeGen/AMDGPU/sibling-call.ll | 57 +- .../test/CodeGen/AMDGPU/sp-too-many-input-sgprs.ll | 102 ++ .../CodeGen/AMDGPU/spill-empty-live-interval.mir | 6 +- .../CodeGen/AMDGPU/spill-offset-calculation.ll | 4 +- llvm/test/CodeGen/AMDGPU/stack-realign.ll | 9 +- .../AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir | 8 +- llvm/test/CodeGen/AMDGPU/store-hi16.ll | 8 +- .../CodeGen/AMDGPU/subreg-split-live-in-error.mir | 7 +- llvm/test/CodeGen/Hexagon/isel-prefer.ll | 79 +- llvm/test/CodeGen/Hexagon/ntstbit.ll | 35 +- llvm/test/CodeGen/Hexagon/tstbit.ll | 11 +- .../CodeGen/MIR/AMDGPU/machine-function-info.ll | 4 +- .../Mips/GlobalISel/instruction-select/fcmp.mir | 1152 +++++++++++++++ .../CodeGen/Mips/GlobalISel/legalizer/fcmp.mir | 73 + llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fcmp.ll | 438 ++++++ .../CodeGen/Mips/GlobalISel/regbankselect/fcmp.mir | 75 + llvm/test/CodeGen/PowerPC/collapse-rotates.mir | 65 + llvm/test/CodeGen/PowerPC/extract-and-store.ll | 535 +++++++ .../CodeGen/PowerPC/jump-tables-collapse-rotate.ll | 122 ++ llvm/test/CodeGen/WebAssembly/address-offsets.ll | 2 +- llvm/test/CodeGen/WebAssembly/call-pic.ll | 2 +- llvm/test/CodeGen/WebAssembly/load-store-pic.ll | 2 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 25 +- llvm/test/CodeGen/X86/dag-fmf-cse.ll | 13 +- llvm/test/CodeGen/X86/fdiv.ll | 11 + llvm/test/CodeGen/X86/fp-fold.ll | 38 + .../hoist-and-by-const-from-lshr-in-eqcmp-zero.ll | 804 +++++------ .../hoist-and-by-const-from-shl-in-eqcmp-zero.ll | 796 +++++----- llvm/test/CodeGen/X86/horizontal-reduce-smax.ll | 104 +- llvm/test/CodeGen/X86/horizontal-reduce-smin.ll | 104 +- llvm/test/CodeGen/X86/horizontal-reduce-umax.ll | 120 +- llvm/test/CodeGen/X86/horizontal-reduce-umin.ll | 100 +- llvm/test/CodeGen/X86/machine-combiner-int-vec.ll | 320 ++-- llvm/test/CodeGen/X86/memset-nonzero.ll | 5 +- .../CodeGen/X86/merge-consecutive-stores-nt.ll | 367 +++++ llvm/test/CodeGen/X86/oddshuffles.ll | 157 +- llvm/test/CodeGen/X86/pr29112.ll | 54 +- llvm/test/CodeGen/X86/vector-reduce-smax-widen.ll | 148 +- llvm/test/CodeGen/X86/vector-reduce-smax.ll | 148 +- llvm/test/CodeGen/X86/vector-reduce-smin-widen.ll | 148 +- llvm/test/CodeGen/X86/vector-reduce-smin.ll | 148 +- llvm/test/CodeGen/X86/vector-reduce-umax-widen.ll | 166 +-- llvm/test/CodeGen/X86/vector-reduce-umax.ll | 166 +-- llvm/test/CodeGen/X86/vector-reduce-umin-widen.ll | 146 +- llvm/test/CodeGen/X86/vector-reduce-umin.ll | 146 +- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 5 +- llvm/test/CodeGen/X86/x86-interleaved-access.ll | 68 +- llvm/test/Other/opt-O2-pipeline.ll | 1 + llvm/test/Other/opt-O3-pipeline.ll | 1 + llvm/test/Other/opt-Os-pipeline.ll | 1 + .../CorrelatedValuePropagation/profmd.ll | 119 ++ llvm/test/Transforms/EarlyCSE/commute.ll | 102 ++ .../test/Transforms/FunctionAttrs/arg_nocapture.ll | 446 ++++++ llvm/test/Transforms/FunctionAttrs/arg_returned.ll | 590 ++++++++ llvm/test/Transforms/FunctionAttrs/fn_noreturn.ll | 135 ++ .../read_write_returned_arguments_scc.ll | 165 +++ llvm/test/Transforms/FunctionAttrs/readattrs.ll | 31 +- .../IndVarSimplify/infer-poison-flags.ll | 369 +++++ llvm/test/Transforms/InstCombine/byval.ll | 24 + .../LoopVectorize/PowerPC/massv-altivec.ll | 106 ++ .../LoopVectorize/PowerPC/massv-calls.ll | 1525 ++++++++++++++++++++ .../LoopVectorize/PowerPC/massv-nobuiltin.ll | 56 + .../LoopVectorize/PowerPC/massv-unsupported.ll | 108 ++ llvm/test/Transforms/NewGVN/addrspacecast.ll | 108 ++ llvm/test/Transforms/Reassociate/fast-basictest.ll | 97 +- .../test/Transforms/SLPVectorizer/X86/broadcast.ll | 58 +- .../llvm-objdump/X86/section-filter-disasm.test | 43 + .../llvm-objdump/X86/section-filter-relocs.test | 15 +- .../elf-dynamic-section-machine-specific.test | 23 +- .../Inputs/elf-dynamic-tags-machine-specific.yaml | 38 +- llvm/test/tools/llvm-readobj/demangle.test | 14 +- .../elf-dynamic-tags-machine-specific.test | 45 +- llvm/test/tools/llvm-readobj/gnu-hash-symbols.test | 14 +- .../tools/obj2yaml/dynamic-section-arch-tags.test | 32 +- llvm/test/tools/yaml2obj/implicit-sections.test | 86 ++ llvm/tools/dsymutil/MachOUtils.cpp | 2 +- llvm/tools/dsymutil/MachOUtils.h | 3 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 3 +- llvm/tools/llvm-size/llvm-size.cpp | 58 +- llvm/tools/yaml2obj/yaml2elf.cpp | 181 ++- llvm/unittests/Analysis/LoopInfoTest.cpp | 900 ++++++++++++ llvm/utils/UpdateTestChecks/asm.py | 19 + .../gn/secondary/llvm/lib/Transforms/IPO/BUILD.gn | 1 + openmp/runtime/src/kmp.h | 1 + openmp/runtime/src/kmp_settings.cpp | 14 + openmp/runtime/src/z_Linux_util.cpp | 11 + openmp/runtime/test/misc_bugs/stack-propagate.c | 65 + 331 files changed, 15539 insertions(+), 4288 deletions(-) create mode 100644 clang/test/Sema/attr-nothrow.c create mode 100644 clang/test/Sema/pr41027.c create mode 100644 clang/test/SemaOpenCLCXX/address-space-references.cl create mode 100644 compiler-rt/lib/gwp_asan/definitions.h create mode 100644 compiler-rt/lib/gwp_asan/guarded_pool_allocator.cpp create mode 100644 compiler-rt/lib/gwp_asan/guarded_pool_allocator.h create mode 100644 compiler-rt/lib/gwp_asan/platform_specific/guarded_pool_allocat [...] create mode 100644 compiler-rt/lib/gwp_asan/tests/alignment.cpp create mode 100644 compiler-rt/lib/gwp_asan/tests/basic.cpp create mode 100644 compiler-rt/lib/gwp_asan/tests/harness.h create mode 100644 compiler-rt/lib/gwp_asan/tests/slot_reuse.cpp create mode 100644 compiler-rt/lib/gwp_asan/tests/thread_contention.cpp create mode 100644 lld/test/ELF/Inputs/i386-cet1.s create mode 100644 lld/test/ELF/Inputs/i386-cet2.s create mode 100644 lld/test/ELF/Inputs/i386-cet3.s create mode 100644 lld/test/ELF/Inputs/i386-cet4.s create mode 100644 lld/test/ELF/Inputs/x86-64-cet1.s create mode 100644 lld/test/ELF/Inputs/x86-64-cet2.s create mode 100644 lld/test/ELF/Inputs/x86-64-cet3.s create mode 100644 lld/test/ELF/Inputs/x86-64-cet4.s create mode 100644 lld/test/ELF/i386-cet.s create mode 100644 lld/test/ELF/x86-64-cet.s create mode 100644 lld/test/ELF/x86-property-relocatable.s create mode 100644 lldb/lit/SymbolFile/DWARF/split-dwarf-inlining.cpp create mode 100644 llvm/include/llvm/Transforms/IPO/Attributor.h create mode 100644 llvm/lib/Transforms/IPO/Attributor.cpp delete mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir create mode 100644 llvm/test/CodeGen/AMDGPU/sp-too-many-input-sgprs.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/fcmp.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/fcmp.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fcmp.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/fcmp.mir create mode 100644 llvm/test/CodeGen/PowerPC/collapse-rotates.mir create mode 100644 llvm/test/CodeGen/PowerPC/jump-tables-collapse-rotate.ll create mode 100644 llvm/test/CodeGen/X86/merge-consecutive-stores-nt.ll create mode 100644 llvm/test/Transforms/CorrelatedValuePropagation/profmd.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/arg_nocapture.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/arg_returned.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/fn_noreturn.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/read_write_returned_argument [...] create mode 100644 llvm/test/Transforms/IndVarSimplify/infer-poison-flags.ll create mode 100644 llvm/test/Transforms/InstCombine/byval.ll create mode 100644 llvm/test/Transforms/LoopVectorize/PowerPC/massv-altivec.ll create mode 100644 llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll create mode 100644 llvm/test/Transforms/LoopVectorize/PowerPC/massv-nobuiltin.ll create mode 100644 llvm/test/Transforms/LoopVectorize/PowerPC/massv-unsupported.ll create mode 100644 llvm/test/Transforms/NewGVN/addrspacecast.ll create mode 100644 llvm/test/tools/llvm-objdump/X86/section-filter-disasm.test create mode 100644 llvm/test/tools/yaml2obj/implicit-sections.test create mode 100644 openmp/runtime/test/misc_bugs/stack-propagate.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (72375eae -> 4b76f631)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards 72375eae 6: update: llvm-linux: 17559 new 4b76f631 6: update: llvm-linux: 17559 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (72375eae) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 229 +- 02-build_llvm/console.log | 11987 ++++++++++++------------ 03-build_linux/console.log | 6186 +++++++------ 05-check_regression/console.log | 12 +- 06-update_baseline/console.log | 102 +- console.log | 18516 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 18510 insertions(+), 18530 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig updated (577d59bc679 -> 6c5d5ce5517)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/llvm-project. from 577d59bc679 svn propset svn:executable on utils/prepare-code-coverage-a [...] adds 453b7caaf7f PR42111: Use guarded initialization for thread-local variab [...] adds 8ca54557647 Factor out duplicated code building a MemberExpr and markin [...] adds 78fdce25a1b [X86] Cleanup convertIntLogicToFPLogic a little. NFCI adds c012188adaf Changed force build of GWP-ASan options parser to be static [...] adds 2e05045e260 [TargetTransformInfo] assert on nullptr adds fe97754acff Initial support for IBM MASS vector library adds f090e6f7b6b [llvm-objdump/llvm-readobj/obj2yaml/yaml2obj] Support DT_PP [...] adds ff918fb487e Fix -Wsign-compare by explicit cast after r362557 adds 6321c680659 Initial support for vectorization using MASSV (IBM MASS vec [...] adds 4b7bdcd3184 [LLD][COFF] Don't take into account the 'age' when looking [...] adds cfb6c82172e [PowerPC][NFC] Add codegen test for consecutive stores of v [...] adds 1611cc1cba1 [analyzer] exploded-graph-rewriter: Pick up python from cma [...] adds 44fb55bf961 [analyzer] exploded-graph-rewriter: Add the missing license [...] adds 7c842fadf10 [PowerPC] Collapse RLDICL/RLDICR into RLDIC when possible adds 76467c4d7fb [NFC][FnAttrs] Stress tests for attribute deduction adds aade782a98e [Attributor] Pass infrastructure and fixpoint framework adds 2057f8366a4 Read .note.gnu.property sections and emit a merged .note.gn [...] adds 516e6cc1dd9 [Clang] Disable new PM for tests that use optimization leve [...] adds c0eb8a98253 Add __FILE_NAME__ to ReleaseNotes. NFC adds fa449a9bb27 Suppress false-positive GCC -Wreturn-type warning. adds a3e16719c46 Resubmit "[CorrelatedValuePropagation] Fix prof branch_weig [...] adds 4cd07dbeec9 Reduce memory consumption of coverage dumps adds 9d8d0f68fbc [CMake][Fuchsia] Use libc++ ABIv2 for the first stage build adds da7f033693a Ignore DIEs in the skeleton unit in a DWO scenario adds 2ae86d20893 [clang] [test] Add a (xfailing) test for PR41027 adds 3c850ca5603 [CMake] Export CMAKE_CONFIGURATION_TYPES for the LLVM build-tree adds c7694624383 [CMake] Add configuration dirs as potential locations for l [...] adds 6fc4c1cc54a Include what you use in PPCFrameLowering.h adds e12334a0f24 [ELF] Allow reading of more than one FEATURE_1_AND in same object. adds db134aaec24 [IPO] Disabled 'default only' switch statements to fix MSVC [...] adds daeeb33f860 Sanitize llvm-size help adds ddfbfd6172f [X86][SSE] Add some nt-store test cases inspired by PR42123 adds 5a81af547c2 [TargetLowering] SimplifyDemandedBits - pull out shift valu [...] adds b42196661ba [llvm-objdump] - Disassemble non-executable sections if spe [...] adds 9b2b8ad8b18 Revert "Factor out duplicated code building a MemberExpr an [...] adds 2121a4f7335 gn build: Merge r362578 adds 886a55eaa05 [X86][AVX] combineX86ShuffleChain - combine shuffle(extract [...] adds a1bb4fb79d8 [ARM] Allow "-march=foo+fp" to vary with foo adds f95e6c06534 [ARM] Allow "-march=foo+fp" to vary with foo adds 66296dc3e4c [yaml2obj] - Change how we handle implicit sections. adds 22e99c434fb [MIPS GlobalISel] Select fcmp adds 5145b1e4421 [Sema] Prevent binding incompatible addr space ref to temporaries adds 54bd6c840e3 UpdateTestChecks: hexagon support adds 253086230fa [NFC][Codegen][X86] Add AVX2 runline for '(X & (C l>> Y)) = [...] adds da59652c1ba Avoid using NoThrow Exception Specifier in non-C++ Modes. adds d34797dfc26 Title: [LOOPINFO] Extend Loop object to add utilities to ge [...] adds b90b3547988 [LoopInfo] Fix unused variable warning. NFC. adds 7ca9b978c4f [OpenCL][PR42031] Prevent deducing addr space in type alias. adds ad62a3a2992 [LoopUtils][SLPVectorizer] clean up management of fast-math-flags adds 15c657d13d6 [SLP] Fix regression in broadcasts caused by operand reorde [...] adds 5da702308c5 [llvm-readobj] - Remove TODOs from gnu-hash-symbols.test an [...] adds 590b1aee609 Revert "Title: [LOOPINFO] Extend Loop object to add utiliti [...] adds a0e350e640b [X86][SSE] Add additional nt-load test cases as discussed o [...] adds de586bd1fd5 [X86][AVX] Generalize split256BitStore to splitVectorStore. NFCI. adds d47f5488cf0 Added propagation of not big initial stack size of master t [...] adds 5659b36c15b [DynamicLoader] Make sure we always set the rendezvous breakpoint adds 2bf82879bde [x86] split more 256-bit stores of concatenated vectors adds 3027a2999c3 [dsymutil] Support more than 4 architectures adds 77d6adc491a Fix shadow local variable warning. NFCI. adds d97ea1bc1ac [Clang] Fix pretty printing of CUDA address spaces adds b67cb3cda05 Use LTO capable linker adds 579c8df7013 [lld] Explicitly ignore comdat groups when parsing LTO object(s) adds a282a61ba3a [WebAssembly] Handle object parsing more like the ELF backend adds 0a31726d200 [NFC][Reassociate] Regenerate CHECKs for fast-basictest.ll adds 13dd125043f [Tests] Add poison inference tests for indvars showing both [...] adds d0fff89b816 [X86] Add the vector integer min/max instructions to isAsso [...] adds 5162266515e [NFC][Reassociate] Add unary fneg tests to fast-basictest.ll adds 8b83a9c6b13 [NFC][Reassociate] Fix mistake in 468b2ad adds 84cfca0f2b7 [analyzer] PathDiagnosticPopUpPiece: working with CharSourceRange adds 036fa5346f2 [X86][SSE] Add vector tests to cover more isNegatibleForFre [...] adds a95edb9dc1d [GWP-ASan] Core Guarded Pool Allocator [4]. adds e34d1a4e07b [cmake] Remove duplicate TestingSupport library for linking adds 53572d0470c [WebAssembly] Limit PIC support to the Emscripten target adds ecf3ae4a703 [NativeProcessDarwin] Remove dead code. NFCI. new 0f8a764e8fa AMDGPU: Fix using 2 different enums for same operand flags new 4fb580c3147 AMDGPU: Remove amdgpu-max-work-group-size attribute new 607c8a9d148 IR: make getParamByValType Just Work. NFC. new 8d7f118ab2b InstCombine: correctly change byval type attribute alongsid [...] new 2d0896c1cb9 [LOOPINFO] Extend Loop object to add utilities to get the l [...] new ba86f2a22e7 [WebAssembly] Use Emscripten triples in PIC tests. new a3701caad82 [clang-format][NFC] Fix BS_Allman style example in the head [...] new 3975b15dbab [X86] Fix mistake that marked VADDSSrrb_Int/VADDSDrrb_Int/V [...] new 7ce7110e6d9 Speedup to_string and to_wstring for integers using stack b [...] new 7c663cde14e [WebAssembly] Improve lto/comdat.ll test. NFC. new 9423f5ef56d Fix FileCheck prefixes in test case. new c46827c7eda LLVM IR: Generate new-style byval-with-Type from Clang new 663d762c9a5 NewGVN: Handle addrspacecast new ac111e526dd [InstCombine] simplify code for bitcast of insertelement; NFC new e3eeacd70a8 [CallSite removal] Refactoring llvm::InlineFunction APIs new acb56090639 [EarlyCSE] Add tests for negated min/max/abs [NFC] new 5347024e283 Update issue statuses. Reviewed as https://reviews.llvm.org/D62932 new 8f500a6f9ca [libcxx][test] Include test_workarounds.h where needed new b812b7a45ed AMDGPU: Invert frame index offset interpretation new 2f94203e23d Revert "[AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pa [...] new 6c5d5ce5517 Allow target to handle STRICT floating-point nodes The 21 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../cmake/caches/DistributionExample-stage2.cmake | 2 +- clang/cmake/caches/DistributionExample.cmake | 7 +- clang/cmake/caches/Fuchsia.cmake | 25 +- clang/docs/ClangFormatStyleOptions.rst | 21 +- clang/docs/ReleaseNotes.rst | 6 +- clang/include/clang/AST/Expr.h | 68 +- clang/include/clang/AST/Stmt.h | 1 - clang/include/clang/AST/Type.h | 20 +- clang/include/clang/Basic/CodeGenOptions.h | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 3 + clang/include/clang/Driver/Options.td | 2 +- clang/include/clang/Format/Format.h | 21 +- clang/include/clang/Sema/Initialization.h | 3 + clang/include/clang/Sema/ParsedAttr.h | 2 +- clang/lib/AST/DeclBase.cpp | 1 - clang/lib/AST/Expr.cpp | 72 +- clang/lib/AST/TypePrinter.cpp | 8 +- clang/lib/CodeGen/BackendUtil.cpp | 3 + clang/lib/CodeGen/CGBuiltin.cpp | 2 +- clang/lib/CodeGen/CGCall.cpp | 2 +- clang/lib/CodeGen/CGDeclCXX.cpp | 8 +- clang/lib/CodeGen/CoverageMappingGen.cpp | 17 +- clang/lib/Driver/ToolChains/Arch/ARM.cpp | 72 +- clang/lib/Driver/ToolChains/Arch/ARM.h | 3 + clang/lib/Frontend/CompilerInvocation.cpp | 2 + clang/lib/Frontend/Rewrite/RewriteModernObjC.cpp | 54 +- clang/lib/Frontend/Rewrite/RewriteObjC.cpp | 24 +- clang/lib/Sema/SemaExprCXX.cpp | 9 +- clang/lib/Sema/SemaInit.cpp | 19 +- clang/lib/Sema/SemaType.cpp | 28 +- clang/lib/Serialization/ASTReaderStmt.cpp | 92 +- clang/lib/Serialization/ASTWriterStmt.cpp | 56 +- clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp | 6 +- .../Analysis/exploded-graph-rewriter/lit.local.cfg | 11 +- clang/test/CodeGen/aapcs-align.cpp | 8 +- clang/test/CodeGen/arm-aapcs-vfp.c | 6 +- clang/test/CodeGen/arm-arguments.c | 8 +- clang/test/CodeGen/arm-byval-align.c | 2 +- clang/test/CodeGen/blocks.c | 2 +- clang/test/CodeGen/callback_annotated.c | 6 +- clang/test/CodeGen/cfi-icall-cross-dso.c | 8 +- clang/test/CodeGen/complex-builtins.c | 76 +- clang/test/CodeGen/complex-libcalls.c | 80 +- clang/test/CodeGen/complex-math.c | 16 +- clang/test/CodeGen/dllimport.c | 4 +- clang/test/CodeGen/inline2.c | 4 +- clang/test/CodeGen/le32-arguments.c | 6 +- clang/test/CodeGen/lifetime.c | 6 +- clang/test/CodeGen/mingw-long-double.c | 2 +- clang/test/CodeGen/nvptx-abi.c | 10 +- clang/test/CodeGen/ppc64-align-struct.c | 6 +- clang/test/CodeGen/ppc64le-aggregates.c | 8 +- clang/test/CodeGen/ppc64le-f128Aggregates.c | 4 +- clang/test/CodeGen/regcall.c | 10 +- clang/test/CodeGen/regparm-struct.c | 2 +- clang/test/CodeGen/renderscript.c | 2 +- .../CodeGen/sanitize-address-field-padding.cpp | 2 +- clang/test/CodeGen/sparc-arguments.c | 4 +- clang/test/CodeGen/sparcv8-abi.c | 6 +- clang/test/CodeGen/stdcall-fastcall.c | 4 +- clang/test/CodeGen/struct-passing.c | 4 +- clang/test/CodeGen/tbaa-for-vptr.cpp | 10 +- clang/test/CodeGen/vectorcall.c | 4 +- clang/test/CodeGen/wasm-arguments.c | 12 +- clang/test/CodeGen/x86_32-arguments-darwin.c | 46 +- clang/test/CodeGen/x86_32-arguments-iamcu.c | 6 +- clang/test/CodeGen/x86_32-arguments-linux.c | 28 +- clang/test/CodeGen/x86_32-arguments-realign.c | 2 +- clang/test/CodeGen/x86_64-arguments-nacl.c | 4 +- clang/test/CodeGen/x86_64-arguments.c | 34 +- clang/test/CodeGenCUDA/kernel-args-alignment.cu | 2 +- clang/test/CodeGenCUDA/kernel-args.cu | 8 +- clang/test/CodeGenCXX/amdgcn-func-arg.cpp | 6 +- clang/test/CodeGenCXX/atomicinit.cpp | 2 +- clang/test/CodeGenCXX/cfi-speculative-vtable.cpp | 4 +- clang/test/CodeGenCXX/cxx1y-variable-template.cpp | 17 + clang/test/CodeGenCXX/debug-info-class-optzns.cpp | 2 +- clang/test/CodeGenCXX/dllimport-members.cpp | 4 +- clang/test/CodeGenCXX/dllimport.cpp | 2 +- clang/test/CodeGenCXX/dso-local-executable.cpp | 6 +- clang/test/CodeGenCXX/init-invariant.cpp | 2 +- clang/test/CodeGenCXX/merge-functions.cpp | 2 +- .../CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp | 2 +- .../CodeGenCXX/microsoft-abi-sret-and-byval.cpp | 30 +- clang/test/CodeGenCXX/ms-inline-asm-fields.cpp | 2 +- clang/test/CodeGenCXX/nrvo.cpp | 6 +- clang/test/CodeGenCXX/regcall.cpp | 4 +- clang/test/CodeGenCXX/regparm.cpp | 2 +- .../sanitize-dtor-nontrivial-virtual-base.cpp | 2 +- clang/test/CodeGenCXX/stmtexpr.cpp | 2 +- .../visibility-hidden-extern-templates.cpp | 2 +- clang/test/CodeGenCXX/wasm-args-returns.cpp | 6 +- clang/test/CodeGenCXX/x86_32-arguments.cpp | 4 +- clang/test/CodeGenCXX/x86_64-arguments-avx.cpp | 2 +- .../test/CodeGenCXX/x86_64-arguments-nacl-x32.cpp | 4 +- clang/test/CodeGenCXX/x86_64-arguments.cpp | 16 +- clang/test/CodeGenObjC/local-static-block.m | 14 +- clang/test/CodeGenObjCXX/nrvo.mm | 2 +- clang/test/CodeGenOpenCL/addr-space-struct-arg.cl | 20 +- .../test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl | 16 +- .../test/CodeGenOpenCL/cl20-device-side-enqueue.cl | 6 +- .../kernels-have-spir-cc-by-default.cl | 6 +- clang/test/Driver/armv8.1m.main.c | 35 + clang/test/Driver/armv8.1m.main.s | 24 +- clang/test/Driver/asan.c | 24 +- clang/test/Driver/autocomplete.c | 1 + clang/test/Driver/fveclib.c | 2 + clang/test/Driver/msan.c | 24 +- clang/test/Driver/tsan.c | 10 +- .../test/OpenMP/nvptx_unsupported_type_codegen.cpp | 4 +- clang/test/Sema/attr-nothrow.c | 18 + clang/test/Sema/pr41027.c | 10 + .../test/SemaOpenCLCXX/address-space-deduction.cl | 20 +- .../test/SemaOpenCLCXX/address-space-references.cl | 5 + clang/unittests/Tooling/CMakeLists.txt | 1 - clang/utils/analyzer/exploded-graph-rewriter.py | 9 + compiler-rt/lib/gwp_asan/CMakeLists.txt | 8 +- compiler-rt/lib/gwp_asan/definitions.h | 29 + .../lib/gwp_asan/guarded_pool_allocator.cpp | 433 ++++++ compiler-rt/lib/gwp_asan/guarded_pool_allocator.h | 254 ++++ .../guarded_pool_allocator_posix.cpp | 96 ++ compiler-rt/lib/gwp_asan/tests/CMakeLists.txt | 8 +- compiler-rt/lib/gwp_asan/tests/alignment.cpp | 27 + compiler-rt/lib/gwp_asan/tests/basic.cpp | 60 + compiler-rt/lib/gwp_asan/tests/harness.h | 60 + compiler-rt/lib/gwp_asan/tests/slot_reuse.cpp | 72 + .../lib/gwp_asan/tests/thread_contention.cpp | 69 + libcxx/src/string.cpp | 140 +- .../variant/variant.get/get_index.pass.cpp | 1 + .../variant/variant.get/get_type.pass.cpp | 1 + libcxx/www/cxx1z_status.html | 6 +- libcxx/www/cxx2a_status.html | 2 +- lld/COFF/DebugTypes.cpp | 4 +- lld/ELF/Config.h | 2 + lld/ELF/Driver.cpp | 35 +- lld/ELF/InputFiles.cpp | 114 +- lld/ELF/InputFiles.h | 12 +- lld/ELF/Options.td | 4 + lld/ELF/SyntheticSections.cpp | 29 + lld/ELF/SyntheticSections.h | 7 + lld/ELF/Writer.cpp | 3 + .../Inputs/pdb-type-server-valid-signature.yaml | 2 +- lld/test/ELF/Inputs/i386-cet1.s | 16 + lld/test/ELF/Inputs/i386-cet2.s | 20 + lld/test/ELF/Inputs/i386-cet3.s | 5 + lld/test/ELF/Inputs/i386-cet4.s | 16 + lld/test/ELF/Inputs/x86-64-cet1.s | 17 + lld/test/ELF/Inputs/x86-64-cet2.s | 22 + lld/test/ELF/Inputs/x86-64-cet3.s | 5 + lld/test/ELF/Inputs/x86-64-cet4.s | 17 + lld/test/ELF/i386-cet.s | 47 + lld/test/ELF/x86-64-cet.s | 48 + lld/test/ELF/x86-property-relocatable.s | 36 + lld/test/wasm/lto/comdat.ll | 8 +- lld/test/wasm/pie.ll | 2 +- lld/test/wasm/shared.ll | 2 +- lld/wasm/InputFiles.cpp | 18 +- lld/wasm/InputFiles.h | 11 +- lld/wasm/SymbolTable.cpp | 28 +- lldb/cmake/modules/LLDBStandalone.cmake | 19 +- lldb/lit/SymbolFile/DWARF/split-dwarf-inlining.cpp | 8 + .../POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp | 13 +- .../Plugins/Process/Darwin/NativeProcessDarwin.cpp | 8 - lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 11 + .../x86/x86AssemblyInspectionEngine.cpp | 2 +- llvm/cmake/modules/LLVMConfig.cmake.in | 1 + llvm/docs/AMDGPUUsage.rst | 2 - llvm/include/llvm/Analysis/LoopInfo.h | 161 +++ llvm/include/llvm/Analysis/TargetLibraryInfo.h | 1 + .../llvm/Analysis/TargetTransformInfoImpl.h | 21 +- llvm/include/llvm/Analysis/VecFuncs.def | 79 +- llvm/include/llvm/BinaryFormat/DynamicTags.def | 13 + llvm/include/llvm/CodeGen/MachineInstr.h | 15 +- llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 17 +- llvm/include/llvm/IR/Argument.h | 2 + llvm/include/llvm/IR/Function.h | 10 +- llvm/include/llvm/IR/InstrTypes.h | 5 +- llvm/include/llvm/InitializePasses.h | 1 + llvm/include/llvm/LinkAllPasses.h | 2 + llvm/include/llvm/MC/MCInstrDesc.h | 6 + llvm/include/llvm/Object/ELFTypes.h | 2 +- llvm/include/llvm/Support/ARMTargetParser.h | 2 + llvm/include/llvm/Target/Target.td | 1 + llvm/include/llvm/Target/TargetSelectionDAG.td | 115 ++ llvm/include/llvm/Transforms/IPO/Attributor.h | 565 ++++++++ llvm/include/llvm/Transforms/Utils/Cloning.h | 5 +- llvm/include/llvm/Transforms/Utils/LoopUtils.h | 5 +- llvm/lib/Analysis/LoopInfo.cpp | 214 +++ llvm/lib/Analysis/TargetLibraryInfo.cpp | 10 + llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 3 +- llvm/lib/Bitcode/Writer/ValueEnumerator.cpp | 2 +- llvm/lib/CodeGen/ExpandReductions.cpp | 5 +- .../lib/CodeGen/GlobalISel/InstructionSelector.cpp | 4 +- llvm/lib/CodeGen/ImplicitNullChecks.cpp | 3 +- llvm/lib/CodeGen/MIRParser/MILexer.cpp | 1 + llvm/lib/CodeGen/MIRParser/MILexer.h | 1 + llvm/lib/CodeGen/MIRParser/MIParser.cpp | 5 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 + llvm/lib/CodeGen/MachineCSE.cpp | 2 +- llvm/lib/CodeGen/MachineInstr.cpp | 4 +- llvm/lib/CodeGen/MachinePipeliner.cpp | 4 +- llvm/lib/CodeGen/PeepholeOptimizer.cpp | 2 +- llvm/lib/CodeGen/ScheduleDAGInstrs.cpp | 13 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 12 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 3 + .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 18 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 7 +- llvm/lib/CodeGen/TargetInstrInfo.cpp | 3 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 28 + llvm/lib/IR/Function.cpp | 4 + llvm/lib/LTO/LTOCodeGenerator.cpp | 1 + llvm/lib/ObjectYAML/ELFYAML.cpp | 9 + llvm/lib/Passes/PassBuilder.cpp | 1 + llvm/lib/Passes/PassRegistry.def | 1 + llvm/lib/Support/ARMTargetParser.cpp | 79 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 104 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 11 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 175 ++- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 10 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 142 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 18 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 11 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 10 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 61 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 2 - llvm/lib/Target/Mips/MipsInstructionSelector.cpp | 79 + llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 4 + llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 11 + llvm/lib/Target/PowerPC/PPCFrameLowering.h | 1 - llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 52 + llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 51 + llvm/lib/Target/SystemZ/SystemZInstrFP.td | 187 +-- llvm/lib/Target/SystemZ/SystemZInstrVector.td | 181 +-- llvm/lib/Target/SystemZ/SystemZOperators.td | 20 +- .../WebAssembly/WebAssemblyTargetMachine.cpp | 13 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 94 +- llvm/lib/Target/X86/X86InstrAVX512.td | 2 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 84 ++ llvm/lib/Transforms/IPO/Attributor.cpp | 530 +++++++ llvm/lib/Transforms/IPO/CMakeLists.txt | 1 + llvm/lib/Transforms/IPO/IPO.cpp | 1 + llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 11 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 24 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 9 +- .../Scalar/CorrelatedValuePropagation.cpp | 117 +- llvm/lib/Transforms/Scalar/NewGVN.cpp | 5 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 10 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 52 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 52 +- .../CodeGen/AArch64/GlobalISel/fold-fp-select.mir | 351 ----- llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll | 18 +- llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 38 +- llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll | 7 +- .../CodeGen/AMDGPU/callee-special-input-sgprs.ll | 6 +- .../CodeGen/AMDGPU/callee-special-input-vgprs.ll | 31 +- .../test/CodeGen/AMDGPU/frame-index-elimination.ll | 22 +- llvm/test/CodeGen/AMDGPU/function-args.ll | 184 +-- .../AMDGPU/large-work-group-promote-alloca.ll | 2 +- llvm/test/CodeGen/AMDGPU/load-hi16.ll | 34 +- llvm/test/CodeGen/AMDGPU/load-lo16.ll | 30 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 22 +- .../CodeGen/AMDGPU/pei-reg-scavenger-position.mir | 12 +- .../CodeGen/AMDGPU/promote-alloca-calling-conv.ll | 2 +- .../CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir | 52 +- llvm/test/CodeGen/AMDGPU/sibling-call.ll | 57 +- .../test/CodeGen/AMDGPU/sp-too-many-input-sgprs.ll | 102 ++ .../CodeGen/AMDGPU/spill-empty-live-interval.mir | 6 +- .../CodeGen/AMDGPU/spill-offset-calculation.ll | 4 +- llvm/test/CodeGen/AMDGPU/stack-realign.ll | 9 +- .../AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir | 8 +- llvm/test/CodeGen/AMDGPU/store-hi16.ll | 8 +- .../CodeGen/AMDGPU/subreg-split-live-in-error.mir | 7 +- llvm/test/CodeGen/Hexagon/isel-prefer.ll | 79 +- llvm/test/CodeGen/Hexagon/ntstbit.ll | 35 +- llvm/test/CodeGen/Hexagon/tstbit.ll | 11 +- .../CodeGen/MIR/AMDGPU/machine-function-info.ll | 4 +- .../Mips/GlobalISel/instruction-select/fcmp.mir | 1152 +++++++++++++++ .../CodeGen/Mips/GlobalISel/legalizer/fcmp.mir | 73 + llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fcmp.ll | 438 ++++++ .../CodeGen/Mips/GlobalISel/regbankselect/fcmp.mir | 75 + llvm/test/CodeGen/PowerPC/collapse-rotates.mir | 65 + llvm/test/CodeGen/PowerPC/extract-and-store.ll | 535 +++++++ .../CodeGen/PowerPC/jump-tables-collapse-rotate.ll | 122 ++ llvm/test/CodeGen/SystemZ/fp-strict-add-01.ll | 173 +++ llvm/test/CodeGen/SystemZ/fp-strict-add-02.ll | 172 +++ llvm/test/CodeGen/SystemZ/fp-strict-add-03.ll | 25 + llvm/test/CodeGen/SystemZ/fp-strict-add-04.ll | 22 + llvm/test/CodeGen/SystemZ/fp-strict-alias.ll | 140 ++ llvm/test/CodeGen/SystemZ/fp-strict-conv-01.ll | 95 ++ llvm/test/CodeGen/SystemZ/fp-strict-conv-02.ll | 33 + llvm/test/CodeGen/SystemZ/fp-strict-conv-03.ll | 35 + llvm/test/CodeGen/SystemZ/fp-strict-conv-04.ll | 35 + llvm/test/CodeGen/SystemZ/fp-strict-conv-15.ll | 64 + llvm/test/CodeGen/SystemZ/fp-strict-div-01.ll | 173 +++ llvm/test/CodeGen/SystemZ/fp-strict-div-02.ll | 173 +++ llvm/test/CodeGen/SystemZ/fp-strict-div-03.ll | 25 + llvm/test/CodeGen/SystemZ/fp-strict-div-04.ll | 22 + llvm/test/CodeGen/SystemZ/fp-strict-mul-01.ll | 173 +++ llvm/test/CodeGen/SystemZ/fp-strict-mul-02.ll | 283 ++++ llvm/test/CodeGen/SystemZ/fp-strict-mul-03.ll | 173 +++ llvm/test/CodeGen/SystemZ/fp-strict-mul-04.ll | 314 ++++ llvm/test/CodeGen/SystemZ/fp-strict-mul-05.ll | 25 + llvm/test/CodeGen/SystemZ/fp-strict-mul-06.ll | 137 ++ llvm/test/CodeGen/SystemZ/fp-strict-mul-07.ll | 130 ++ llvm/test/CodeGen/SystemZ/fp-strict-mul-08.ll | 145 ++ llvm/test/CodeGen/SystemZ/fp-strict-mul-09.ll | 138 ++ llvm/test/CodeGen/SystemZ/fp-strict-mul-10.ll | 55 + llvm/test/CodeGen/SystemZ/fp-strict-mul-11.ll | 40 + llvm/test/CodeGen/SystemZ/fp-strict-round-01.ll | 250 ++++ llvm/test/CodeGen/SystemZ/fp-strict-round-02.ll | 254 ++++ llvm/test/CodeGen/SystemZ/fp-strict-round-03.ll | 262 ++++ llvm/test/CodeGen/SystemZ/fp-strict-sqrt-01.ll | 94 ++ llvm/test/CodeGen/SystemZ/fp-strict-sqrt-02.ll | 94 ++ llvm/test/CodeGen/SystemZ/fp-strict-sqrt-03.ll | 23 + llvm/test/CodeGen/SystemZ/fp-strict-sqrt-04.ll | 20 + llvm/test/CodeGen/SystemZ/fp-strict-sub-01.ll | 173 +++ llvm/test/CodeGen/SystemZ/fp-strict-sub-02.ll | 173 +++ llvm/test/CodeGen/SystemZ/fp-strict-sub-03.ll | 25 + llvm/test/CodeGen/SystemZ/fp-strict-sub-04.ll | 22 + llvm/test/CodeGen/SystemZ/vec-strict-add-01.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-add-02.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-div-01.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-div-02.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-max-01.ll | 80 + llvm/test/CodeGen/SystemZ/vec-strict-min-01.ll | 80 + llvm/test/CodeGen/SystemZ/vec-strict-mul-01.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-mul-02.ll | 36 + llvm/test/CodeGen/SystemZ/vec-strict-mul-03.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-mul-04.ll | 37 + llvm/test/CodeGen/SystemZ/vec-strict-mul-05.ll | 75 + llvm/test/CodeGen/SystemZ/vec-strict-round-01.ll | 155 ++ llvm/test/CodeGen/SystemZ/vec-strict-round-02.ll | 154 ++ llvm/test/CodeGen/SystemZ/vec-strict-sqrt-01.ll | 29 + llvm/test/CodeGen/SystemZ/vec-strict-sqrt-02.ll | 29 + llvm/test/CodeGen/SystemZ/vec-strict-sub-01.ll | 34 + llvm/test/CodeGen/SystemZ/vec-strict-sub-02.ll | 33 + .../SystemZ/vector-constrained-fp-intrinsics.ll | 334 ++--- llvm/test/CodeGen/WebAssembly/address-offsets.ll | 2 +- llvm/test/CodeGen/WebAssembly/call-pic.ll | 2 +- llvm/test/CodeGen/WebAssembly/load-store-pic.ll | 2 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 25 +- llvm/test/CodeGen/X86/dag-fmf-cse.ll | 13 +- llvm/test/CodeGen/X86/fdiv.ll | 11 + llvm/test/CodeGen/X86/fp-fold.ll | 38 + .../hoist-and-by-const-from-lshr-in-eqcmp-zero.ll | 804 +++++------ .../hoist-and-by-const-from-shl-in-eqcmp-zero.ll | 796 +++++----- llvm/test/CodeGen/X86/horizontal-reduce-smax.ll | 104 +- llvm/test/CodeGen/X86/horizontal-reduce-smin.ll | 104 +- llvm/test/CodeGen/X86/horizontal-reduce-umax.ll | 120 +- llvm/test/CodeGen/X86/horizontal-reduce-umin.ll | 100 +- llvm/test/CodeGen/X86/machine-combiner-int-vec.ll | 320 ++-- llvm/test/CodeGen/X86/memset-nonzero.ll | 5 +- .../CodeGen/X86/merge-consecutive-stores-nt.ll | 367 +++++ llvm/test/CodeGen/X86/oddshuffles.ll | 157 +- llvm/test/CodeGen/X86/pr29112.ll | 54 +- llvm/test/CodeGen/X86/vector-reduce-smax-widen.ll | 148 +- llvm/test/CodeGen/X86/vector-reduce-smax.ll | 148 +- llvm/test/CodeGen/X86/vector-reduce-smin-widen.ll | 148 +- llvm/test/CodeGen/X86/vector-reduce-smin.ll | 148 +- llvm/test/CodeGen/X86/vector-reduce-umax-widen.ll | 166 +-- llvm/test/CodeGen/X86/vector-reduce-umax.ll | 166 +-- llvm/test/CodeGen/X86/vector-reduce-umin-widen.ll | 146 +- llvm/test/CodeGen/X86/vector-reduce-umin.ll | 146 +- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 5 +- llvm/test/CodeGen/X86/x86-interleaved-access.ll | 68 +- llvm/test/Other/opt-O2-pipeline.ll | 1 + llvm/test/Other/opt-O3-pipeline.ll | 1 + llvm/test/Other/opt-Os-pipeline.ll | 1 + .../CorrelatedValuePropagation/profmd.ll | 119 ++ llvm/test/Transforms/EarlyCSE/commute.ll | 102 ++ .../test/Transforms/FunctionAttrs/arg_nocapture.ll | 446 ++++++ llvm/test/Transforms/FunctionAttrs/arg_returned.ll | 590 ++++++++ llvm/test/Transforms/FunctionAttrs/fn_noreturn.ll | 135 ++ .../read_write_returned_arguments_scc.ll | 165 +++ llvm/test/Transforms/FunctionAttrs/readattrs.ll | 31 +- .../IndVarSimplify/infer-poison-flags.ll | 369 +++++ llvm/test/Transforms/InstCombine/byval.ll | 24 + .../LoopVectorize/PowerPC/massv-altivec.ll | 106 ++ .../LoopVectorize/PowerPC/massv-calls.ll | 1525 ++++++++++++++++++++ .../LoopVectorize/PowerPC/massv-nobuiltin.ll | 56 + .../LoopVectorize/PowerPC/massv-unsupported.ll | 108 ++ llvm/test/Transforms/NewGVN/addrspacecast.ll | 108 ++ llvm/test/Transforms/Reassociate/fast-basictest.ll | 97 +- .../test/Transforms/SLPVectorizer/X86/broadcast.ll | 58 +- .../llvm-objdump/X86/section-filter-disasm.test | 43 + .../llvm-objdump/X86/section-filter-relocs.test | 15 +- .../elf-dynamic-section-machine-specific.test | 23 +- .../Inputs/elf-dynamic-tags-machine-specific.yaml | 38 +- llvm/test/tools/llvm-readobj/demangle.test | 14 +- .../elf-dynamic-tags-machine-specific.test | 45 +- llvm/test/tools/llvm-readobj/gnu-hash-symbols.test | 14 +- .../tools/obj2yaml/dynamic-section-arch-tags.test | 32 +- llvm/test/tools/yaml2obj/implicit-sections.test | 86 ++ llvm/tools/dsymutil/MachOUtils.cpp | 2 +- llvm/tools/dsymutil/MachOUtils.h | 3 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 3 +- llvm/tools/llvm-size/llvm-size.cpp | 58 +- llvm/tools/yaml2obj/yaml2elf.cpp | 181 ++- llvm/unittests/Analysis/LoopInfoTest.cpp | 900 ++++++++++++ llvm/utils/TableGen/CodeGenInstruction.cpp | 1 + llvm/utils/TableGen/CodeGenInstruction.h | 1 + llvm/utils/TableGen/InstrInfoEmitter.cpp | 1 + llvm/utils/UpdateTestChecks/asm.py | 19 + .../gn/secondary/llvm/lib/Transforms/IPO/BUILD.gn | 1 + openmp/runtime/src/kmp.h | 1 + openmp/runtime/src/kmp_settings.cpp | 14 + openmp/runtime/src/z_Linux_util.cpp | 11 + openmp/runtime/test/misc_bugs/stack-propagate.c | 65 + 412 files changed, 21327 insertions(+), 4660 deletions(-) create mode 100644 clang/test/Sema/attr-nothrow.c create mode 100644 clang/test/Sema/pr41027.c create mode 100644 clang/test/SemaOpenCLCXX/address-space-references.cl create mode 100644 compiler-rt/lib/gwp_asan/definitions.h create mode 100644 compiler-rt/lib/gwp_asan/guarded_pool_allocator.cpp create mode 100644 compiler-rt/lib/gwp_asan/guarded_pool_allocator.h create mode 100644 compiler-rt/lib/gwp_asan/platform_specific/guarded_pool_allocat [...] create mode 100644 compiler-rt/lib/gwp_asan/tests/alignment.cpp create mode 100644 compiler-rt/lib/gwp_asan/tests/basic.cpp create mode 100644 compiler-rt/lib/gwp_asan/tests/harness.h create mode 100644 compiler-rt/lib/gwp_asan/tests/slot_reuse.cpp create mode 100644 compiler-rt/lib/gwp_asan/tests/thread_contention.cpp create mode 100644 lld/test/ELF/Inputs/i386-cet1.s create mode 100644 lld/test/ELF/Inputs/i386-cet2.s create mode 100644 lld/test/ELF/Inputs/i386-cet3.s create mode 100644 lld/test/ELF/Inputs/i386-cet4.s create mode 100644 lld/test/ELF/Inputs/x86-64-cet1.s create mode 100644 lld/test/ELF/Inputs/x86-64-cet2.s create mode 100644 lld/test/ELF/Inputs/x86-64-cet3.s create mode 100644 lld/test/ELF/Inputs/x86-64-cet4.s create mode 100644 lld/test/ELF/i386-cet.s create mode 100644 lld/test/ELF/x86-64-cet.s create mode 100644 lld/test/ELF/x86-property-relocatable.s create mode 100644 lldb/lit/SymbolFile/DWARF/split-dwarf-inlining.cpp create mode 100644 llvm/include/llvm/Transforms/IPO/Attributor.h create mode 100644 llvm/lib/Transforms/IPO/Attributor.cpp delete mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir create mode 100644 llvm/test/CodeGen/AMDGPU/sp-too-many-input-sgprs.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/fcmp.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/fcmp.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fcmp.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/fcmp.mir create mode 100644 llvm/test/CodeGen/PowerPC/collapse-rotates.mir create mode 100644 llvm/test/CodeGen/PowerPC/jump-tables-collapse-rotate.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-add-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-add-02.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-add-03.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-add-04.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-alias.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-02.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-03.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-04.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-15.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-div-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-div-02.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-div-03.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-div-04.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-mul-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-mul-02.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-mul-03.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-mul-04.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-mul-05.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-mul-06.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-mul-07.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-mul-08.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-mul-09.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-mul-10.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-mul-11.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-round-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-round-02.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-round-03.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-sqrt-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-sqrt-02.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-sqrt-03.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-sqrt-04.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-sub-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-sub-02.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-sub-03.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-sub-04.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-add-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-add-02.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-div-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-div-02.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-max-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-min-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-mul-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-mul-02.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-mul-03.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-mul-04.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-mul-05.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-round-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-round-02.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-sqrt-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-sqrt-02.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-sub-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-sub-02.ll create mode 100644 llvm/test/CodeGen/X86/merge-consecutive-stores-nt.ll create mode 100644 llvm/test/Transforms/CorrelatedValuePropagation/profmd.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/arg_nocapture.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/arg_returned.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/fn_noreturn.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/read_write_returned_argument [...] create mode 100644 llvm/test/Transforms/IndVarSimplify/infer-poison-flags.ll create mode 100644 llvm/test/Transforms/InstCombine/byval.ll create mode 100644 llvm/test/Transforms/LoopVectorize/PowerPC/massv-altivec.ll create mode 100644 llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll create mode 100644 llvm/test/Transforms/LoopVectorize/PowerPC/massv-nobuiltin.ll create mode 100644 llvm/test/Transforms/LoopVectorize/PowerPC/massv-unsupported.ll create mode 100644 llvm/test/Transforms/NewGVN/addrspacecast.ll create mode 100644 llvm/test/tools/llvm-objdump/X86/section-filter-disasm.test create mode 100644 llvm/test/tools/yaml2obj/implicit-sections.test create mode 100644 openmp/runtime/test/misc_bugs/stack-propagate.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig updated (fd4e815d -> d9c410a5)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards fd4e815d 0: update: llvm-linux: boot new d9c410a5 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (fd4e815d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 139 +- 02-build_llvm/console.log | 11858 ++++++++++++++++---------------- 03-build_linux/console.log | 1808 +++-- 04-boot_linux/console.log | 466 +- 06-update_baseline/console.log | 8 +- console.log | 14279 ++++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 14292 insertions(+), 14274 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[llvm] branch master updated (ef541629986 -> 3abdc6d0731)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from ef541629986 Allow target to handle STRICT floating-point nodes new 2b65b0f314f [MSAN] Add unary FNeg visitor to the MemorySanitizer new 3abdc6d0731 AMDGPU: Don't fix emergency stack slot at offset 0 The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AMDGPU/SIFrameLowering.cpp | 27 ++-- lib/Target/AMDGPU/SIISelLowering.cpp | 10 -- lib/Transforms/Instrumentation/MemorySanitizer.cpp | 2 + test/CodeGen/AMDGPU/byval-frame-setup.ll | 132 ++++++++-------- test/CodeGen/AMDGPU/call-argument-types.ll | 96 ++++++------ test/CodeGen/AMDGPU/callee-frame-setup.ll | 16 +- test/CodeGen/AMDGPU/callee-special-input-sgprs.ll | 6 +- test/CodeGen/AMDGPU/callee-special-input-vgprs.ll | 94 +++++------ .../AMDGPU/cross-block-use-is-not-abi-copy.ll | 16 +- test/CodeGen/AMDGPU/frame-index-elimination.ll | 74 ++++++--- test/CodeGen/AMDGPU/function-args.ll | 174 ++++++++++----------- test/CodeGen/AMDGPU/load-hi16.ll | 22 +-- test/CodeGen/AMDGPU/load-lo16.ll | 20 +-- test/CodeGen/AMDGPU/multi-dword-vgpr-spill.ll | 109 ++++++------- test/CodeGen/AMDGPU/nested-calls.ll | 4 +- test/CodeGen/AMDGPU/sibling-call.ll | 55 ++++--- .../CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll | 6 +- test/CodeGen/AMDGPU/spill-offset-calculation.ll | 58 ++++++- test/CodeGen/AMDGPU/stack-realign.ll | 13 +- test/CodeGen/AMDGPU/store-hi16.ll | 6 +- test/Instrumentation/MemorySanitizer/msan_basic.ll | 16 ++ 21 files changed, 514 insertions(+), 442 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[gcc] branch master updated (e3d09834af8 -> 445c52a4e13)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from e3d09834af8 compiler: inline call expressions and function references new 445c52a4e13 * config/ia64/crtbegin.S (__dso_handle): Put in .sdata/.sb [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: libgcc/ChangeLog | 6 ++++++ libgcc/config/ia64/crtbegin.S | 4 ++-- 2 files changed, 8 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[llvm] branch master updated (63ff74f3d09 -> ef541629986)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 63ff74f3d09 AMDGPU: Invert frame index offset interpretation new 6d04641df08 Revert "[AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pa [...] new ef541629986 Allow target to handle STRICT floating-point nodes The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/llvm/CodeGen/MachineInstr.h | 15 +- include/llvm/CodeGen/SelectionDAGNodes.h | 17 +- include/llvm/MC/MCInstrDesc.h | 6 + include/llvm/Target/Target.td | 1 + include/llvm/Target/TargetSelectionDAG.td | 115 +++++++ lib/CodeGen/GlobalISel/InstructionSelector.cpp | 4 +- lib/CodeGen/ImplicitNullChecks.cpp | 3 +- lib/CodeGen/MIRParser/MILexer.cpp | 1 + lib/CodeGen/MIRParser/MILexer.h | 1 + lib/CodeGen/MIRParser/MIParser.cpp | 5 +- lib/CodeGen/MIRPrinter.cpp | 2 + lib/CodeGen/MachineCSE.cpp | 2 +- lib/CodeGen/MachineInstr.cpp | 4 +- lib/CodeGen/MachinePipeliner.cpp | 4 +- lib/CodeGen/PeepholeOptimizer.cpp | 2 +- lib/CodeGen/ScheduleDAGInstrs.cpp | 13 + lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 3 + lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 7 + lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 18 +- lib/CodeGen/TargetInstrInfo.cpp | 3 +- lib/CodeGen/TargetLoweringBase.cpp | 28 ++ lib/Target/AArch64/AArch64InstructionSelector.cpp | 104 +----- lib/Target/SystemZ/SystemZISelLowering.cpp | 51 +++ lib/Target/SystemZ/SystemZInstrFP.td | 187 +++++------ lib/Target/SystemZ/SystemZInstrVector.td | 181 +++++------ lib/Target/SystemZ/SystemZOperators.td | 20 +- test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir | 351 --------------------- test/CodeGen/SystemZ/fp-strict-add-01.ll | 173 ++++++++++ test/CodeGen/SystemZ/fp-strict-add-02.ll | 172 ++++++++++ test/CodeGen/SystemZ/fp-strict-add-03.ll | 25 ++ test/CodeGen/SystemZ/fp-strict-add-04.ll | 22 ++ test/CodeGen/SystemZ/fp-strict-alias.ll | 140 ++++++++ test/CodeGen/SystemZ/fp-strict-conv-01.ll | 95 ++++++ test/CodeGen/SystemZ/fp-strict-conv-02.ll | 33 ++ test/CodeGen/SystemZ/fp-strict-conv-03.ll | 35 ++ test/CodeGen/SystemZ/fp-strict-conv-04.ll | 35 ++ test/CodeGen/SystemZ/fp-strict-conv-15.ll | 64 ++++ test/CodeGen/SystemZ/fp-strict-div-01.ll | 173 ++++++++++ test/CodeGen/SystemZ/fp-strict-div-02.ll | 173 ++++++++++ test/CodeGen/SystemZ/fp-strict-div-03.ll | 25 ++ test/CodeGen/SystemZ/fp-strict-div-04.ll | 22 ++ test/CodeGen/SystemZ/fp-strict-mul-01.ll | 173 ++++++++++ test/CodeGen/SystemZ/fp-strict-mul-02.ll | 283 +++++++++++++++++ test/CodeGen/SystemZ/fp-strict-mul-03.ll | 173 ++++++++++ test/CodeGen/SystemZ/fp-strict-mul-04.ll | 314 ++++++++++++++++++ test/CodeGen/SystemZ/fp-strict-mul-05.ll | 25 ++ test/CodeGen/SystemZ/fp-strict-mul-06.ll | 137 ++++++++ test/CodeGen/SystemZ/fp-strict-mul-07.ll | 130 ++++++++ test/CodeGen/SystemZ/fp-strict-mul-08.ll | 145 +++++++++ test/CodeGen/SystemZ/fp-strict-mul-09.ll | 138 ++++++++ test/CodeGen/SystemZ/fp-strict-mul-10.ll | 55 ++++ test/CodeGen/SystemZ/fp-strict-mul-11.ll | 40 +++ test/CodeGen/SystemZ/fp-strict-round-01.ll | 250 +++++++++++++++ test/CodeGen/SystemZ/fp-strict-round-02.ll | 254 +++++++++++++++ test/CodeGen/SystemZ/fp-strict-round-03.ll | 262 +++++++++++++++ test/CodeGen/SystemZ/fp-strict-sqrt-01.ll | 94 ++++++ test/CodeGen/SystemZ/fp-strict-sqrt-02.ll | 94 ++++++ test/CodeGen/SystemZ/fp-strict-sqrt-03.ll | 23 ++ test/CodeGen/SystemZ/fp-strict-sqrt-04.ll | 20 ++ test/CodeGen/SystemZ/fp-strict-sub-01.ll | 173 ++++++++++ test/CodeGen/SystemZ/fp-strict-sub-02.ll | 173 ++++++++++ test/CodeGen/SystemZ/fp-strict-sub-03.ll | 25 ++ test/CodeGen/SystemZ/fp-strict-sub-04.ll | 22 ++ test/CodeGen/SystemZ/vec-strict-add-01.ll | 33 ++ test/CodeGen/SystemZ/vec-strict-add-02.ll | 33 ++ test/CodeGen/SystemZ/vec-strict-div-01.ll | 33 ++ test/CodeGen/SystemZ/vec-strict-div-02.ll | 33 ++ test/CodeGen/SystemZ/vec-strict-max-01.ll | 80 +++++ test/CodeGen/SystemZ/vec-strict-min-01.ll | 80 +++++ test/CodeGen/SystemZ/vec-strict-mul-01.ll | 33 ++ test/CodeGen/SystemZ/vec-strict-mul-02.ll | 36 +++ test/CodeGen/SystemZ/vec-strict-mul-03.ll | 33 ++ test/CodeGen/SystemZ/vec-strict-mul-04.ll | 37 +++ test/CodeGen/SystemZ/vec-strict-mul-05.ll | 75 +++++ test/CodeGen/SystemZ/vec-strict-round-01.ll | 155 +++++++++ test/CodeGen/SystemZ/vec-strict-round-02.ll | 154 +++++++++ test/CodeGen/SystemZ/vec-strict-sqrt-01.ll | 29 ++ test/CodeGen/SystemZ/vec-strict-sqrt-02.ll | 29 ++ test/CodeGen/SystemZ/vec-strict-sub-01.ll | 34 ++ test/CodeGen/SystemZ/vec-strict-sub-02.ll | 33 ++ .../SystemZ/vector-constrained-fp-intrinsics.ll | 334 ++++++++++---------- utils/TableGen/CodeGenInstruction.cpp | 1 + utils/TableGen/CodeGenInstruction.h | 1 + utils/TableGen/InstrInfoEmitter.cpp | 1 + 84 files changed, 5796 insertions(+), 819 deletions(-) delete mode 100644 test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir create mode 100644 test/CodeGen/SystemZ/fp-strict-add-01.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-add-02.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-add-03.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-add-04.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-alias.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-conv-01.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-conv-02.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-conv-03.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-conv-04.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-conv-15.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-div-01.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-div-02.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-div-03.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-div-04.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-mul-01.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-mul-02.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-mul-03.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-mul-04.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-mul-05.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-mul-06.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-mul-07.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-mul-08.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-mul-09.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-mul-10.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-mul-11.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-round-01.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-round-02.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-round-03.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-sqrt-01.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-sqrt-02.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-sqrt-03.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-sqrt-04.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-sub-01.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-sub-02.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-sub-03.ll create mode 100644 test/CodeGen/SystemZ/fp-strict-sub-04.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-add-01.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-add-02.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-div-01.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-div-02.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-max-01.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-min-01.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-mul-01.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-mul-02.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-mul-03.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-mul-04.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-mul-05.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-round-01.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-round-02.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-sqrt-01.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-sqrt-02.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-sub-01.ll create mode 100644 test/CodeGen/SystemZ/vec-strict-sub-02.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig updated (b006a589d3f -> e3d09834af8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig in repository toolchain/ci/gcc. from b006a589d3f [gcc] adds 0547517941c /cp 2019-06-04 Paolo Carlini <paolo.carlini(a)oracle.com> adds 95ae63d5168 rs6000: Simplify VS[ra]* for VSX_[BDF] adds bd3d6b8d477 rs6000: Simplify <VSa> for VSX_W adds 05208189a4f rs6000: Remove Ftrad, Fvsx, Fs; add s and sd adds da49cef63da rs6000: ww -> wa adds 3b61eab576b rs6000: Simplify <VSa> for VSX_TI adds 1c55c657a8b rs6000: VSa->wa for some more cases adds f5f3a7dcbe4 rs6000: ww->wa in testsuite adds 402d38eed18 rs6000: <VSs> -> <sd>p adds 809d6ce03ab rs6000: More simplification adds 0ca174a9357 rs6000: Add p9kf and p9tf isa values adds d496c37d6f5 rs6000: Remove wp and wq adds a705da5fa21 rs6000: Update direct-move* testcases adds 497eca91b24 Daily bump. adds e47edcf78cf compiler: statically allocate constant interface data adds 25b39f1f906 gcc/ 2019-06-05 Hongtao Liu <hongtao.liu(a)intel.com> adds e32d171e4bb * omp-low.c (lower_rec_input_clauses): Force max_vf if is_ [...] adds 8259fae168a * omp-low.c (lower_rec_input_clauses): For lastprivate con [...] adds 0365070ccd0 * omp-expand.c (struct omp_region): Add has_lastprivate_co [...] adds c16eb7019be 2019-06-05 Richard Biener <rguenther(a)suse.de> adds 602b2fd3af5 PR debug/90733 * var-tracking.c (vt_expand_loc_callback): [...] adds 2a5690bb6c5 [PATCH][GCC][AARCH64] Add tests for pointer authentication B-key adds b0c02f9dc94 * fold-const.c (extract_muldiv_1) <PLUS_EXPR>: Do not dist [...] adds b1d1ac23bf6 gcc/c-family/ChangeLog: adds 0da1e8b7874 rs6000: Fix new testcase adds 15fa0a8947a * config/rs6000/aix-unwind.h (LR_REGNO): Rename to R_LR. (C [...] adds 6dcfb2f2641 PR c++/63149 - wrong auto deduction from braced-init-list adds f68dfb14553 ChangeLog for PR c++/63149 adds d4a2b9e3fdd * config/alpha/alpha.c (direct_return): Move down after s [...] adds 62c34df8620 gcc/c/ChangeLog: adds bd17a04e5c9 /cp 2019-06-05 Paolo Carlini <paolo.carlini(a)oracle.com> adds e11ce677187 gcc/testsuite/ChangeLog: new e3d09834af8 compiler: inline call expressions and function references The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 189 +++++++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 16 + gcc/c-family/c-attribs.c | 23 +- gcc/c-family/c-pragma.c | 2 +- gcc/c-family/c-warn.c | 15 +- gcc/c-family/c.opt | 2 +- gcc/c/ChangeLog | 11 + gcc/c/c-decl.c | 16 +- gcc/c/c-parser.c | 20 +- gcc/cfghooks.c | 10 + gcc/cfgloop.c | 15 +- gcc/cfgrtl.c | 10 + gcc/cgraph.c | 13 + gcc/config/alpha/alpha-protos.h | 3 +- gcc/config/alpha/alpha.c | 293 ++++------- gcc/config/i386/avx512dqintrin.h | 38 +- gcc/config/i386/i386-builtin-types.def | 2 - gcc/config/i386/i386-builtin.def | 4 +- gcc/config/i386/i386-expand.c | 2 - gcc/config/i386/i386-features.c | 2 +- gcc/config/i386/sse.md | 4 +- gcc/config/rs6000/constraints.md | 9 - gcc/config/rs6000/rs6000.c | 19 - gcc/config/rs6000/rs6000.h | 3 - gcc/config/rs6000/rs6000.md | 105 ++-- gcc/config/rs6000/vsx.md | 561 ++++++++++----------- gcc/configure | 4 +- gcc/configure.ac | 7 +- gcc/convert.c | 6 +- gcc/cp/ChangeLog | 40 ++ gcc/cp/call.c | 16 +- gcc/cp/constexpr.c | 4 +- gcc/cp/constraint.cc | 6 +- gcc/cp/cvt.c | 2 +- gcc/cp/decl.c | 67 ++- gcc/cp/parser.c | 2 +- gcc/cp/pt.c | 2 +- gcc/cp/typeck.c | 8 +- gcc/diagnostic-show-locus.c | 11 + gcc/diagnostic.c | 11 + gcc/doc/md.texi | 14 +- gcc/fold-const.c | 22 +- gcc/gcc.c | 6 +- gcc/gimple-pretty-print.c | 11 + gcc/gimple-ssa-nonnull-compare.c | 2 +- gcc/go/gofrontend/MERGE | 2 +- gcc/go/gofrontend/export.cc | 43 +- gcc/go/gofrontend/expressions.cc | 251 +++++++-- gcc/go/gofrontend/expressions.h | 22 + gcc/go/gofrontend/gogo.cc | 44 +- gcc/go/gofrontend/gogo.h | 6 +- gcc/go/gofrontend/import.cc | 34 +- gcc/graph.c | 13 +- gcc/lto/ChangeLog | 4 + gcc/lto/lto-common.c | 3 +- gcc/objc/ChangeLog | 5 + gcc/objc/objc-act.c | 2 +- gcc/objc/objc-encoding.c | 2 +- gcc/omp-expand.c | 24 +- gcc/omp-low.c | 114 ++++- gcc/opts-common.c | 6 +- gcc/opts-global.c | 10 +- gcc/print-rtl.c | 11 + gcc/sched-rgn.c | 11 + gcc/symtab.c | 13 + gcc/testsuite/ChangeLog | 97 ++++ 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gcc/varasm.c | 8 +- libgcc/ChangeLog | 9 + libgcc/config/rs6000/aix-unwind.h | 28 +- libgo/go/go/internal/gccgoimporter/parser.go | 17 +- libgomp/ChangeLog | 5 + .../libgomp.c++/lastprivate-conditional-1.C | 62 +++ .../libgomp.c++/lastprivate-conditional-2.C | 104 ++++ 201 files changed, 3020 insertions(+), 1028 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/initlist-deduce2.C create mode 100644 gcc/testsuite/g++.dg/diagnostic/return-type-invalid-1.C create mode 100644 gcc/testsuite/g++.dg/vect/simd-1.cc create mode 100644 gcc/testsuite/g++.target/aarch64/return_address_sign_ab_exception.C create mode 100644 gcc/testsuite/g++.target/aarch64/return_address_sign_b_exception.C create mode 100644 gcc/testsuite/gcc.dg/format/gcc_diag-11.c create mode 100644 gcc/testsuite/gcc.dg/pr90733.c create mode 100644 gcc/testsuite/gcc.dg/weak/weak-19.c create mode 100644 gcc/testsuite/gcc.target/aarch64/return_address_sign_b_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/return_address_sign_b_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/return_address_sign_b_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/return_address_sign_builtin.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512dq-vfpclasssd-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512dq-vfpclassss-2.c create mode 100644 gcc/testsuite/gnat.dg/specs/discr6.ads create mode 100644 libgomp/testsuite/libgomp.c++/lastprivate-conditional-1.C create mode 100644 libgomp/testsuite/libgomp.c++/lastprivate-conditional-2.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig updated (b02f78f928 -> 12efd68d15)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig in repository toolchain/ci/binutils-gdb. from b02f78f928 Introduce and use make_unique_xstrdup adds fbe4d6650d Automatic date update in version.in adds 312617a3d0 gdb/riscv: Don't error when decoding a 6 or 8 byte instruction adds 0088ba596b gdb/testsuite: Improve comments in recently added test adds 62d8e3b731 libctf: eschew %zi format specifier adds 12efd68d15 i386: Check vector length for EVEX vextractfXX and vinsertfXX No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gas/ChangeLog | 9 +++ gas/testsuite/gas/i386/disassem.d | 5 +- gas/testsuite/gas/i386/disassem.s | 2 + gas/testsuite/gas/i386/x86-64-disassem.d | 5 +- gas/testsuite/gas/i386/x86-64-disassem.s | 2 + gdb/ChangeLog | 5 ++ gdb/riscv-tdep.c | 10 +-- gdb/testsuite/ChangeLog | 13 ++++ .../riscv-unwind-long-insn-6.s} | 60 +++++++++--------- .../riscv-unwind-long-insn-8.s} | 60 +++++++++--------- .../riscv-unwind-long-insn.c} | 8 ++- gdb/testsuite/gdb.arch/riscv-unwind-long-insn.exp | 61 ++++++++++++++++++ libctf/ChangeLog | 6 ++ libctf/ctf-archive.c | 7 ++- libctf/ctf-create.c | 7 ++- opcodes/ChangeLog | 19 ++++++ opcodes/i386-dis-evex.h | 72 +++++++++++++++++++--- opcodes/i386-dis.c | 10 ++- 19 files changed, 280 insertions(+), 83 deletions(-) copy gdb/testsuite/{gdb.modula2/max-depth.c => gdb.arch/riscv-unwind-long-insn-6.s} (51%) copy gdb/testsuite/{gdb.modula2/max-depth.c => gdb.arch/riscv-unwind-long-insn-8.s} (50%) copy gdb/testsuite/{gdb.dwarf2/dw2-ranges-main.c => gdb.arch/riscv-unwind-long-ins [...] create mode 100644 gdb/testsuite/gdb.arch/riscv-unwind-long-insn.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig updated (e6c5da43 -> 13cf3e2d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards e6c5da43 0: update: binutils-gcc-linux: boot new 13cf3e2d 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e6c5da43) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-lt [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 78 +- 02-prepare_abe/console.log | 236 +- 03-build_abe-binutils/console.log | 11036 ++++--- 04-build_abe-stage1/console.log | 19069 ++++++------ 05-build_linux/console.log | 27318 +++++++++-------- 06-boot_linux/console.log | 386 +- console.log | 58179 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 8 files changed, 58122 insertions(+), 58192 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

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