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from 114ca002d Cleanup: llvm::bsearch -> llvm::partition_point after r364719
new 89214e88f [ELF][RISCV] Support PLT, GOT, copy and relative relocations
new 23c2ee520 [ELF][RISCV] Support GD/LD/IE/LE TLS models
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Summary of changes:
ELF/Arch/RISCV.cpp | 154 ++++++++++++++++++++-
ELF/InputSection.cpp | 5 +-
ELF/Relocations.cpp | 2 +-
test/ELF/riscv-plt.s | 103 ++++++++++++++
test/ELF/riscv-reloc-64-pic.s | 10 ++
test/ELF/riscv-reloc-copy.s | 23 +++
test/ELF/riscv-reloc-got.s | 65 +++++++++
test/ELF/riscv-tls-gd.s | 124 +++++++++++++++++
test/ELF/riscv-tls-ie.s | 82 +++++++++++
test/ELF/riscv-tls-ld.s | 90 ++++++++++++
test/ELF/riscv-tls-le.s | 41 ++++++
.../{ppc32-abs-pic.s => riscv32-reloc-32-pic.s} | 12 +-
.../{ppc32-abs-pic.s => riscv64-reloc-64-pic.s} | 16 +--
13 files changed, 708 insertions(+), 19 deletions(-)
create mode 100644 test/ELF/riscv-plt.s
create mode 100644 test/ELF/riscv-reloc-64-pic.s
create mode 100644 test/ELF/riscv-reloc-copy.s
create mode 100644 test/ELF/riscv-reloc-got.s
create mode 100644 test/ELF/riscv-tls-gd.s
create mode 100644 test/ELF/riscv-tls-ie.s
create mode 100644 test/ELF/riscv-tls-ld.s
create mode 100644 test/ELF/riscv-tls-le.s
copy test/ELF/{ppc32-abs-pic.s => riscv32-reloc-32-pic.s} (59%)
copy test/ELF/{ppc32-abs-pic.s => riscv64-reloc-64-pic.s} (55%)
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unknown user pushed a change to branch master
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from d9f9a289e04 PR middle-end/64242 * config/sparc/sparc.md (nonlocal_got [...]
new b031d0ddbe3 PR target/90963 * config/pa/pa.md (builtin_longjmp): Rest [...]
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gcc/ChangeLog | 7 +++++++
gcc/config/pa/pa.md | 6 ++----
2 files changed, 9 insertions(+), 4 deletions(-)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allyesconfig
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discards eb25f95d8 0: update: binutils-65392b3edd1f6873204a4890efc286c8970abf4e: all
new 8a58a5461 0: update: gcc-e967dff897f2a4e579149c0e3de2b9381e1f99f5: all
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01-reset_artifacts/console.log | 14 +-
02-prepare_abe/console.log | 98 +-
03-build_abe-binutils/console.log | 11059 +++++++--------
04-build_abe-stage1/console.log | 15227 ++++++++++----------
05-build_linux/console.log | 364 +-
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console.log | 26797 ++++++++++++++++++------------------
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discards e067ef240 0: update: binutils-gcc-linux: all
new aaf1fe407 0: update: binutils-gcc-linux: all
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03-build_abe-binutils/console.log | 11125 ++++----
04-build_abe-stage1/console.log | 20053 +++++++-------
05-build_linux/console.log | 22014 +++++++--------
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console.log | 53824 ++++++++++++++++++------------------
jenkins/manifest.sh | 12 +-
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from a8c26b26121 AMDGPU/GlobalISel: RegBankSelect for amdgcn.writelane
new 914425994ea AArch64/GlobalISel: Fix trying to select invalid MIR
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lib/Target/AArch64/AArch64InstructionSelector.cpp | 33 +++++++++++------------
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from 513fc2c0 [clangd] No longer getting template instantiations from heade [...]
new 4f5f8d58 Summary: [Clangd] Added hidden command line option -tweaks to [...]
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clangd/ClangdServer.cpp | 3 ++-
clangd/ClangdServer.h | 7 ++++++-
clangd/test/fixits-duplication.test | 2 +-
clangd/tool/ClangdMain.cpp | 11 +++++++++++
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from a7bea5605ca AMDGPU/GlobalISel: Try to select VOP3 form of add
new b1c22290afc AMDGPU/GlobalISel: Select G_PHI
new 50601824402 AMDGPU/GlobalISel: Complete implementation of G_GEP
new 87f9f81250e AMDGPU/GlobalISel: Fail instead of assert when selecting loads
new a8c26b26121 AMDGPU/GlobalISel: RegBankSelect for amdgcn.writelane
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lib/Target/AMDGPU/AMDGPUGISel.td | 23 --
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 161 +++++++--
lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 5 +-
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 63 +++-
test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir | 16 +-
test/CodeGen/AMDGPU/GlobalISel/inst-select-gep.mir | 354 +++++++++++++++++++
.../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 44 +--
.../AMDGPU/GlobalISel/inst-select-phi-invalid.mir | 31 ++
test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir | 385 +++++++++++++++++++++
.../GlobalISel/regbankselect-amdgcn.writelane.mir | 98 ++++++
10 files changed, 1087 insertions(+), 93 deletions(-)
create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-gep.mir
create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-phi-invalid.mir
create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.writelane.mir
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