Tcwg-commits January 2020

tcwg-commits@lists.linaro.org

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12654 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig updated (f27a2dd -> 1bd6e30)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig in repository toolchain/ci/base-artifacts. discards f27a2dd 0: update: llvm-linux: boot new 1bd6e30 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f27a2dd) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 184 +- 02-build_llvm/console.log | 11902 +++++++++++++++++----------------- 03-build_linux/console.log | 538 +- 04-boot_linux/console.log | 412 +- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 10 +- console.log | 13056 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 13060 insertions(+), 13060 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_ubsan updated (d070e948237 -> cacdc768c9d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_ubsan in repository toolchain/ci/gcc. from d070e948237 Daily bump. adds 0b0383fab94 Daily bump. adds cacdc768c9d * config/pa/pa.md: Revert change to use ordered_comparison [...] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 7 +++++++ gcc/DATESTAMP | 2 +- gcc/config/pa/pa.md | 4 ++-- gcc/config/pa/predicates.md | 6 ++++++ 4 files changed, 16 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_ubsan updated (40ddb51 -> 4481f87)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_ubsan in repository toolchain/ci/base-artifacts. discards 40ddb51 0: update: gcc-d070e94823706b56902d1ab799af8605c956cd3f: 1 new 4481f87 0: update: gcc-cacdc768c9d3ed5d7dad8734ddd2707df841ffa3: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (40ddb51) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-release-aarch64- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 178 +- 02-prepare_abe/console.log | 430 +- 03-build_abe-bootstrap_ubsan/console.log | 70696 ++++++++++++++-------------- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 2 +- console.log | 71308 +++++++++++++++-------------- jenkins/manifest.sh | 8 +- 7 files changed, 71326 insertions(+), 71298 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (c79f46a28239 -> ae6088216ce4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/linux. from c79f46a28239 Linux 5.5-rc5 adds 24cecc377463 arm64: Revert support for execute-only user mappings adds 1928b36cfa4d arc: eznps: fix allmodconfig kconfig warning adds cd4c2493fa58 ARC: mm: drop stale define of __ARCH_USE_5LEVEL_HACK adds 833a20b8d492 ARC: asm-offsets: remove duplicate entry adds 7ecc6c1d5c8d ARC: pt_regs: remove hardcoded registers offset adds 8f8b69aa501e Merge tag 'arc-5.5-rc6' of git://git.kernel.org/pub/scm/li [...] adds 111bf02b8f54 rtc: sun6i: Add support for RTC clocks on R40 adds 653997eeecef rtc: mt6397: fix alarm register overwrite adds f01f4ffdfb70 rtc: cmos: Revert "rtc: Fix the AltCentury value on AMD/Hy [...] adds b967793c96dd Merge tag 'rtc-5.5-2' of git://git.kernel.org/pub/scm/linu [...] adds f40ddaa059fd regulator: axp20x: Fix AXP22x ELDO2 regulator enable bitmask adds 71dd2fe5dec1 regulator: axp20x: Fix axp20x_set_ramp_delay adds 6f1ff76154b8 regulator: bd70528: Remove .set_ramp_delay for bd70528_ldo_ops adds 5acefdc27b73 Merge tag 'regulator-fix-v5.5-rc5' of git://git.kernel.org [...] adds 9cd34efbd301 spi: uniphier: Fix FIFO threshold adds 862dd2a946aa spi: Don't look at TX buffer for PTP system timestamping adds ca59d5a51690 spi: spi-fsl-dspi: Fix 16-bit word order in 32-bit XSPI mode adds 19b61392c5a8 spi: spi-dw: Add lock protect dw_spi rx/tx to prevent conc [...] adds 09b6636cea4f spi: Document Octal mode as valid SPI bus width adds ec7b3f5372e2 Merge tag 'spi-fix-v5.5-rc5' of git://git.kernel.org/pub/s [...] adds afcd5b9be566 watchdog: w83627hf_wdt: Fix support NCT6116D adds 91ced83c6eab watchdog: imx7ulp: Fix missing conversion of imx7ulp_wdt_enable() adds da9e3f4e30a5 watchdog: max77620_wdt: fix potential build errors adds 9a6c274ac1c4 watchdog: tqmx86_wdt: Fix build error adds a76dfb859cd4 watchdog: rn5t618_wdt: fix module aliases adds dcbce5fbcc69 watchdog: orion: fix platform_get_irq() complaints adds baf4dc829574 Merge tag 'linux-watchdog-5.5-fixes' of git://www.linux-wa [...] adds 9550f210492c tpm: Revert "tpm_tis: reserve chip for duration of tpm_tis [...] adds dda8b2af395b tpm: Revert "tpm_tis_core: Set TPM_CHIP_FLAG_IRQ before pr [...] adds aa4a63dd9816 tpm: Revert "tpm_tis_core: Turn on the TPM before probing IRQ's" adds 7ae564122f75 Merge tag 'tpmdd-next-20200106' of git://git.infradead.org [...] adds 02f4e01ce710 tracing: Initialize val to zero in parse_entry of inject code adds d2ccbccb5444 tracing: Define MCOUNT_INSN_SIZE when not defined without [...] adds b8299d362d08 tracing: Have stack tracer compile when MCOUNT_INSN_SIZE i [...] adds e31f7939c1c2 ftrace: Avoid potential division by zero in function profiler adds bf44f488e168 tracing: Change offset type to s32 in preempt/irq tracepoints adds 50f9ad607ea8 kernel/trace: Fix do not unregister tracepoints when regis [...] adds 72879ee0c53e tracing: Fix indentation issue adds ae6088216ce4 Merge tag 'trace-v5.5-rc5' of git://git.kernel.org/pub/scm [...] No new revisions were added by this update. Summary of changes: .../devicetree/bindings/spi/spi-controller.yaml | 4 +-- arch/arc/include/asm/entry-arcv2.h | 8 ++--- arch/arc/include/asm/hugepage.h | 1 - arch/arc/kernel/asm-offsets.c | 10 +++++- arch/arc/plat-eznps/Kconfig | 2 +- arch/arm64/include/asm/pgtable-prot.h | 5 ++- arch/arm64/include/asm/pgtable.h | 10 ++---- arch/arm64/mm/fault.c | 2 +- drivers/char/tpm/tpm_tis_core.c | 34 +++++++++---------- drivers/regulator/axp20x-regulator.c | 11 +++--- drivers/regulator/bd70528-regulator.c | 1 - drivers/rtc/rtc-mc146818-lib.c | 15 +-------- drivers/rtc/rtc-mt6397.c | 39 ++++++++++++++-------- drivers/rtc/rtc-sun6i.c | 16 +++++++++ drivers/spi/spi-dw.c | 15 +++++++-- drivers/spi/spi-dw.h | 1 + drivers/spi/spi-fsl-dspi.c | 24 ++++++------- drivers/spi/spi-uniphier.c | 31 ++++++++++------- drivers/spi/spi.c | 22 +++++------- drivers/watchdog/Kconfig | 2 ++ drivers/watchdog/imx7ulp_wdt.c | 2 +- drivers/watchdog/orion_wdt.c | 4 +-- drivers/watchdog/rn5t618_wdt.c | 1 + drivers/watchdog/w83627hf_wdt.c | 2 +- include/linux/mfd/mt6397/rtc.h | 8 +++++ include/linux/spi/spi.h | 4 +-- include/trace/events/preemptirq.h | 8 ++--- kernel/trace/fgraph.c | 14 ++++++++ kernel/trace/ftrace.c | 6 ++-- kernel/trace/trace_events_inject.c | 2 +- kernel/trace/trace_sched_wakeup.c | 4 ++- kernel/trace/trace_seq.c | 2 +- kernel/trace/trace_stack.c | 5 +++ mm/mmap.c | 6 ---- 34 files changed, 184 insertions(+), 137 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (2e466950031 -> 6598af4a54b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/llvm-project. from 2e466950031 [MC] Reorder members of MCFragment's subclasses to decrease [...] adds 8aae6455c07 [mlir][spirv] Update SPIR-V documentation with information [...] adds 19ace449a3d [TargetLowering] Use SETCC input type to call getBooleanCon [...] adds ce67db41853 [Clang] Force rtlib=platform in test to avoid fails with CL [...] adds a7929533300 [Metadata] Add TBAA struct metadata to `AAMDNode` adds c5fb73c5d1b [APFloat] Add recoverable string parsing errors to APFloat adds 103a58c8f2b Add ExternalAAWrapperPass to createLegacyPMAAResults. adds aab72f89b19 [mlir] Update mlir/CMakeLists.txt to install *.def files adds f3f7dc3d299 [APFloat] Fix compilation warnings adds 5173bfcbc48 Add interface emitPrefix for MCCodeEmitter adds 0efc9e5a8cc [ARM][MVE] More MVETailPredication debug messages. NFC. adds 7180d9568df Fix MSVC "not all control paths return a value" warning. NFCI. adds d68904f957a [NFC] Fix trivial typos in comments adds 89b11843254 [test][DebugInfo][NFC] Rename method for clarity adds 6fa6000e3e2 [DAG] DAGCombiner::XformToShuffleWithZero - use APInt::extr [...] adds 5d986a68a59 [CostModel][X86] Add missing scalar i64->f32 uitofp costs adds de735247c8b [X86] Add extra PR43971 test case mentioned in D70267 adds d45aafa2fbc [clang-format] fix conflict between FormatStyle::BWACS_Mult [...] adds d67c4cc2eb4 [mlir][Linalg] Reimplement and extend getStridesAndOffset adds f1c85ecdfcc AMDGPU/GlobalISel: Select more G_EXTRACTs correctly adds bc763c42bbc [lldb] [Process/NetBSD] Remove unused orig_*ax use adds e4464bf3d45 AMDGPU/GlobalISel: Select scalar v2s16 G_BUILD_VECTOR adds b99ef32d041 [ARM,MVE] Generate the right instruction for vmaxnmq_m_f16. adds 4978296cd8e [ARM,MVE] Support -ve offsets in gather-load intrinsics. adds 34817e04fee [ARM,MVE] Fix many signedness errors in MVE intrinsics. adds ea5abf14530 Fix "use of uninitialized variable" static analyzer warning. NFCI. adds 5bcc747393b Fix "use of uninitialized variable" static analyzer warning [...] adds ea2c159f966 [AMDGPU] Fix "use of uninitialized variable" static analyze [...] adds 1d549cff48c [NFC] Fixes -Wrange-loop-analysis warnings adds eec0240f971 Adds -Wrange-loop-analysis to -Wall adds 61b5e727b7c [AIX] Use csect reference for function address constants adds 0eb981b8ce7 [ARM] Use correct TRAP opcode for thumb in FastISel adds f88d52728b9 [ARM] Use the correct opcodes for Thumb2 segmented stack fr [...] adds 3e1f3b164cc [llvm-libc] Fix missing virtual destructor adds 83ec9b51ed2 [AIX] Use csect reference for function address constants adds b3757f3091d [lldb/CMake] Autodetect Python dependency adds 8eba3fbb12f [lldb/Test] Temporarily skip TestFoundationDisassembly on t [...] adds 350da402ef6 [clang-tidy] new check: bugprone-signed-char-misuse adds ba4ca37b814 [gn build] Port 350da402ef6 adds 896b84ac2c7 [llvm-readelf] Print EI_ABIVERSION as decimal instead of he [...] adds 3abc2927cb2 [lldb/Test] Move @skipIfAsan from test class to test methods. adds f6544934b94 Make check-llvm run 50% faster on macOS, 18% faster on Windows. adds bbfebd7b8a6 [CMake] Add $ORIGIN/../../../../lib to rpath if BUILD_SHARE [...] adds 8c8ffd461d1 [lldb/CMake] Only set PYTHON_HOME on Windows adds 0239526cccf [lldb/Docs] Fix capitalization typo. adds 5b24c088171 [libc] Move all tests to a top level `test` directory. adds 7ae3d335467 [lld] Fix trivial typos in comments adds e29a2e6be4e [PowerPC][LoopVectorize] Extend getRegisterClassForType to [...] adds df3f4e0d77e [X86] Fix an 8 bit testb being selected when folding a vola [...] adds 40a80a0a19f Lower TAGPstack with negative offset to SUBG. adds 19433b199d1 [OpenMP] Fix incorrect property of __has_attribute() macro adds 22cec48dacc [x86] add tests for concat self + shuffle; NFC adds b73fea6a7cf [NFC] Test commit, whitespace change adds 02f694b69a8 [NFC] Test commit, revert whitespace change adds 7b518dcb291 [OPENMP50]Support lastprivate conditional updates in inc/de [...] adds ca868002d31 [X86] Rename vec-strict-*-cmp.ll to vec-strict-cmp-*.ll to [...] adds 62f3403bfc1 [LegalizeTypes] Add widening support for STRICT_FSETCC/FSETCCS adds 317cbdad4d1 [lldb/Docs] Describe optional dependencies on build page. adds 6a0564adcfe [X86] Improve v4i32->v4f64 uint_to_fp for AVX1/AVX2 targets. adds 5518a02a83e llc/MIR: Fix setFunctionAttributes for MIR functions adds 14d25052a29 AMDGPU: Use ImmLeaf for inline immediate predicates adds a506efff182 AMDGPU: Use ImmLeaf adds 7f2db2917da AMDGPU: Fix legalizing f16 fpow adds 0b093f02120 GlobalISel: Start adding computeNumSignBits to GISelKnownBits adds 1060b9e23b8 GlobalISel: Correct result type for G_FCMP in lowerFPTOUI adds ee6b8722ffa GlobalISel: Fix unsupported legalize action adds f5329bfc76b [Diagnostic] make Wmisleading-indendation not warn about labels adds 24ee4edee8e [PowerPC][NFC] Rename record instructions to use _rec suffi [...] adds d8fd92eaaa3 [FileCheck] Remove FileCheck prefix in API adds 83d690a1498 Don't rely on 'l'(ell) modifiers to indicate a label reference adds 71a2a62163c [CMake] Pass symlink dependency to add_llvm_install_targets [...] adds 59fadc14eeb [NSArray] Remove a very old and deprecated formatter. adds b5e7f95cfbe [msan] Check qsort input. adds 08d17cb065d [X86] Move an enum definition into a header to simplify fut [...] adds 450073c639d Change the patterns to include the prefix '= ' so we don't [...] adds f3de8ab5cce GlobalISel: Implement lower for G_INTRINSIC_ROUND adds 26f714ff43e TableGen/GlobalISel: Handle default operands that are used adds 4e85ca9562a AMDGPU/GlobalISel: Replace handling of boolean values adds d4c9e133244 AMDGPU/GlobalISel: Select G_UADDE/G_USUBE adds c6fd16af2be Use FileCheck instead of grep adds 6904cd94867 Add Triple::isX86() adds 5e0e0e3ff05 [NFC] Fixes -Wrange-loop-analysis warnings adds 7ba4595c86b [msan] Fix underflow in qsort interceptor. adds 20f005d25f4 [CodeGen][ObjC] Push the properties of a protocol before pu [...] adds 52afc93c38c AMDGPU/GlobalISel: Legalize G_READCYCLECOUNTER adds 21f7b362095 [WebAssembly] Fix landingpad-only case in Emscripten EH adds e93b1ffc849 AMDGPU: Use default operands for clamp/omod adds 907cefe7214 Always deduce the lengths of contained parameter packs when [...] adds 452f6243c9b AMDGPU: Select llvm.amdgcn.interp.p2.f16 directly adds e8d9d202bc9 AMDGPU: Add run line to int_to_fp tests adds d877229b5b2 [NFC][Test] Add a test to verify the DAGCombine of fma adds e3750cafdb1 [mlir][Linalg] Add a linalg.reshape op adds dc7b84c66c1 AMDGPU/GlobalISel: Fix unused variable warning in release adds aa708763d30 [MC] Add parameter `Address` to MCInstPrinter::printInst adds 3d87d0b9257 [MC] Add parameter `Address` to MCInstrPrinter::printInstruction adds ff554a91790 Let PassBuilder Expose PassInstrumentationCallbacks adds 6598af4a54b [libc] Add __attribute__((always_inline)) to x86_64 syscall [...] No new revisions were added by this update. Summary of changes: .../clang-tidy/bugprone/BugproneTidyModule.cpp | 3 + .../clang-tidy/bugprone/CMakeLists.txt | 1 + .../clang-tidy/bugprone/SignedCharMisuseCheck.cpp | 104 +++ .../clang-tidy/bugprone/SignedCharMisuseCheck.h | 44 + .../clang-tidy/readability/MagicNumbersCheck.cpp | 8 +- .../clang-tidy/utils/FixItHintUtils.cpp | 1 + clang-tools-extra/docs/ReleaseNotes.rst | 6 + .../checks/bugprone-signed-char-misuse.rst | 76 ++ clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../bugprone-signed-char-misuse-fsigned-char.cpp | 9 + .../bugprone-signed-char-misuse-funsigned-char.cpp | 17 + .../bugprone-signed-char-misuse-with-option.cpp | 74 ++ .../checkers/bugprone-signed-char-misuse.cpp | 123 +++ clang/include/clang/Basic/DiagnosticGroups.td | 2 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 8 +- clang/include/clang/Basic/arm_mve.td | 75 +- clang/include/clang/Basic/arm_mve_defs.td | 5 +- clang/lib/AST/MicrosoftMangle.cpp | 4 +- clang/lib/CodeGen/CGBuiltin.cpp | 3 +- clang/lib/CodeGen/CGExpr.cpp | 3 + clang/lib/CodeGen/CGExprScalar.cpp | 21 +- clang/lib/CodeGen/CGObjCMac.cpp | 6 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 36 +- clang/lib/CodeGen/CGOpenMPRuntime.h | 5 + clang/lib/CodeGen/CGStmtOpenMP.cpp | 6 + clang/lib/Driver/ToolChains/Darwin.cpp | 2 +- clang/lib/Driver/ToolChains/FreeBSD.cpp | 7 +- clang/lib/Format/UnwrappedLineFormatter.cpp | 13 + clang/lib/Frontend/CompilerInvocation.cpp | 2 +- clang/lib/Lex/LiteralSupport.cpp | 8 +- clang/lib/Parse/ParseStmt.cpp | 10 +- clang/lib/Parse/ParseStmtAsm.cpp | 5 +- clang/lib/Sema/SemaOverload.cpp | 16 + clang/lib/Sema/SemaTemplateDeduction.cpp | 39 +- clang/test/CXX/drs/dr13xx.cpp | 4 +- .../temp.deduct/temp.deduct.type/p5-0x.cpp | 31 + .../CodeGen/arm-mve-intrinsics/scatter-gather.c | 60 +- clang/test/CodeGen/arm-mve-intrinsics/vabdq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vhaddq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vhsubq.c | 12 +- clang/test/CodeGen/arm-mve-intrinsics/vmaxnmq.c | 8 +- clang/test/CodeGen/arm-mve-intrinsics/vmaxq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vminnmq.c | 8 +- clang/test/CodeGen/arm-mve-intrinsics/vminq.c | 14 +- clang/test/CodeGen/arm-mve-intrinsics/vmulhq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vmullbq.c | 24 +- clang/test/CodeGen/arm-mve-intrinsics/vmulltq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vqaddq.c | 6 +- clang/test/CodeGen/arm-mve-intrinsics/vqsubq.c | 6 +- clang/test/CodeGen/arm-mve-intrinsics/vrhaddq.c | 20 +- clang/test/CodeGen/arm-mve-intrinsics/vrmulhq.c | 18 +- clang/test/CodeGenObjC/encode-test-2.m | 31 +- clang/test/Driver/cross-linux.c | 3 + clang/test/Misc/warning-wall.c | 4 +- clang/test/OpenMP/for_lastprivate_codegen.cpp | 15 +- clang/test/OpenMP/sections_lastprivate_codegen.cpp | 65 +- clang/test/Parser/warn-misleading-indentation.cpp | 7 + clang/test/Sema/arm-mve-immediates.c | 28 +- clang/test/SemaCXX/warn-range-loop-analysis.cpp | 1 + clang/test/SemaTemplate/alias-templates.cpp | 6 +- clang/test/SemaTemplate/deduction.cpp | 4 +- clang/test/SemaTemplate/pack-deduction.cpp | 4 +- clang/unittests/Format/FormatTest.cpp | 37 +- clang/utils/TableGen/MveEmitter.cpp | 11 +- .../sanitizer_common_interceptors.inc | 18 + compiler-rt/test/msan/qsort.cpp | 12 + libc/CMakeLists.txt | 7 +- libc/config/linux/x86_64/CMakeLists.txt | 10 - libc/config/linux/x86_64/syscall.h.inc | 24 +- libc/docs/source_layout.rst | 10 + libc/src/errno/CMakeLists.txt | 12 - libc/src/string/CMakeLists.txt | 2 - libc/src/string/strcat/CMakeLists.txt | 11 - libc/src/string/strcpy/CMakeLists.txt | 10 - libc/src/sys/mman/CMakeLists.txt | 14 - libc/test/CMakeLists.txt | 4 + libc/{ => test}/config/CMakeLists.txt | 0 libc/test/config/linux/CMakeLists.txt | 4 + libc/test/config/linux/x86_64/CMakeLists.txt | 11 + .../config/linux/x86_64/syscall_test.cpp | 0 libc/test/src/CMakeLists.txt | 3 + libc/{ => test}/src/errno/CMakeLists.txt | 9 +- libc/{ => test}/src/errno/errno_test.cpp | 0 libc/test/src/string/CMakeLists.txt | 23 + .../strcat => test/src/string}/strcat_test.cpp | 0 .../strcpy => test/src/string}/strcpy_test.cpp | 0 libc/{ => test}/src/sys/CMakeLists.txt | 0 libc/test/src/sys/mman/CMakeLists.txt | 14 + libc/{ => test}/src/sys/mman/mmap_test.cpp | 0 libc/utils/HdrGen/CMakeLists.txt | 1 + .../errno_test.cpp => utils/HdrGen/Command.cpp} | 14 +- libc/utils/HdrGen/Command.h | 2 + lld/Common/Filesystem.cpp | 2 +- lld/ELF/Arch/X86.cpp | 2 +- lld/ELF/ICF.cpp | 2 +- lld/ELF/InputFiles.cpp | 2 +- lld/ELF/InputSection.cpp | 2 +- lld/ELF/OutputSections.cpp | 2 +- lld/docs/WebAssembly.rst | 2 +- lld/docs/windows_support.rst | 2 +- lld/include/lld/Core/Atom.h | 2 +- lld/include/lld/Core/Instrumentation.h | 2 +- lld/include/lld/Core/Reference.h | 2 +- lld/include/lld/ReaderWriter/MachOLinkingContext.h | 2 +- lld/lib/Core/Resolver.cpp | 2 +- lld/lib/Driver/DarwinLdDriver.cpp | 8 +- lld/lib/ReaderWriter/MachO/CompactUnwindPass.cpp | 2 +- lld/lib/ReaderWriter/MachO/File.h | 2 +- lld/lib/ReaderWriter/MachO/GOTPass.cpp | 2 +- lld/lib/ReaderWriter/MachO/MachOLinkingContext.cpp | 2 +- .../MachO/MachONormalizedFileBinaryWriter.cpp | 4 +- .../MachO/MachONormalizedFileToAtoms.cpp | 8 +- lld/lib/ReaderWriter/YAML/ReaderWriterYAML.cpp | 4 +- lld/test/ELF/aarch64-movw-tprel.s | 2 +- lld/test/ELF/linkerscript/assert.s | 2 +- lld/test/ELF/mips-n32-rels.s | 2 +- lld/test/ELF/ppc64-bsymbolic-toc-restore.s | 2 +- lld/test/wasm/export-optional-lazy.ll | 2 +- lld/test/wasm/signature-mismatch-unknown.ll | 2 +- lld/wasm/Config.h | 2 +- lld/wasm/InputChunks.h | 4 +- lld/wasm/InputFiles.cpp | 3 +- lld/wasm/SymbolTable.cpp | 11 +- lld/wasm/Symbols.h | 4 +- lldb/cmake/modules/FindPythonInterpAndLibs.cmake | 51 ++ lldb/cmake/modules/LLDBConfig.cmake | 53 +- lldb/docs/resources/build.rst | 38 +- .../cmake/modules/FindPythonInterpAndLibs.cmake | 51 ++ .../TestCallOverriddenMethod.py | 10 +- .../objc/foundation/TestFoundationDisassembly.py | 2 + lldb/source/API/CMakeLists.txt | 8 + lldb/source/Plugins/Language/ObjC/NSArray.cpp | 27 - .../NetBSD/NativeRegisterContextNetBSD_x86_64.cpp | 5 - llvm/bindings/ocaml/llvm/llvm.mli | 2 +- llvm/cmake/modules/AddLLVM.cmake | 17 +- llvm/include/llvm/ADT/APFloat.h | 11 +- llvm/include/llvm/ADT/PointerUnion.h | 2 +- llvm/include/llvm/ADT/Triple.h | 5 + llvm/include/llvm/Analysis/ValueTracking.h | 4 +- llvm/include/llvm/CodeGen/CommandFlags.inc | 82 +- .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 2 +- .../llvm/CodeGen/GlobalISel/GISelKnownBits.h | 4 + .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 1 + .../llvm/CodeGen/GlobalISel/LegalizerInfo.h | 1 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 6 + llvm/include/llvm/CodeGen/MIRParser/MIRParser.h | 14 +- llvm/include/llvm/DebugInfo/GSYM/FunctionInfo.h | 2 +- llvm/include/llvm/DebugInfo/GSYM/GsymCreator.h | 6 +- .../llvm/ExecutionEngine/Orc/OrcABISupport.h | 2 +- llvm/include/llvm/IR/InstrTypes.h | 2 +- llvm/include/llvm/IR/IntrinsicsARM.td | 61 +- llvm/include/llvm/IR/Metadata.h | 28 +- llvm/include/llvm/MC/MCCodeEmitter.h | 6 + llvm/include/llvm/MC/MCInstPrinter.h | 4 +- llvm/include/llvm/MC/MCStreamer.h | 5 +- llvm/include/llvm/Passes/PassBuilder.h | 7 + llvm/include/llvm/Support/Allocator.h | 2 +- .../llvm/Target/GlobalISel/SelectionDAGCompat.td | 1 + llvm/include/llvm/Target/Target.td | 2 +- llvm/include/llvm/Transforms/IPO/Attributor.h | 6 +- llvm/lib/Analysis/AliasAnalysis.cpp | 5 + llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp | 17 +- llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 2 +- llvm/lib/CodeGen/Analysis.cpp | 2 +- .../lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 35 +- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 70 ++ llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 33 +- llvm/lib/CodeGen/LiveDebugVariables.cpp | 2 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 45 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 12 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 2 + .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 84 ++ .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 +- llvm/lib/CodeGen/TwoAddressInstructionPass.cpp | 2 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 2 +- llvm/lib/IR/AutoUpgrade.cpp | 4 +- llvm/lib/IR/Metadata.cpp | 1 + llvm/lib/MC/MCAsmStreamer.cpp | 4 +- llvm/lib/MC/MCAssembler.cpp | 6 +- llvm/lib/MC/MCDisassembler/Disassembler.cpp | 3 +- llvm/lib/MC/MCExpr.cpp | 2 +- llvm/lib/MC/MCParser/AsmParser.cpp | 3 +- llvm/lib/MC/MCParser/COFFAsmParser.cpp | 2 +- llvm/lib/MC/MCStreamer.cpp | 7 +- llvm/lib/ProfileData/GCOV.cpp | 2 +- llvm/lib/Support/APFloat.cpp | 155 ++-- llvm/lib/Support/FileCheck.cpp | 272 +++--- llvm/lib/Support/FileCheckImpl.h | 163 ++-- llvm/lib/Support/StringRef.cpp | 10 +- llvm/lib/Target/AArch64/AArch64CallLowering.cpp | 2 +- .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 6 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 9 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.td | 2 +- .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 14 +- .../AArch64/MCTargetDesc/AArch64InstPrinter.cpp | 15 +- .../AArch64/MCTargetDesc/AArch64InstPrinter.h | 16 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 2 +- .../Target/AMDGPU/AMDGPUGenRegisterBankInfo.def | 110 ++- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 16 + .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 221 ++--- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 12 +- llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 22 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 36 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 389 ++++++--- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 4 + llvm/lib/Target/AMDGPU/AMDGPURegisterBanks.td | 2 - .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 4 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 14 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 14 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 1 + llvm/lib/Target/AMDGPU/R600AsmPrinter.cpp | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 17 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 4 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 63 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 52 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 8 - llvm/lib/Target/AMDGPU/VOP3Instructions.td | 22 +- .../lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp | 7 +- llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h | 6 +- llvm/lib/Target/ARM/ARMCallingConv.cpp | 2 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 8 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 6 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMInstrMVE.td | 81 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 4 + llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 2 +- .../lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp | 11 +- llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h | 8 +- .../lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.cpp | 2 +- llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.h | 2 +- llvm/lib/Target/ARM/MVETailPredication.cpp | 157 ++-- .../lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp | 7 +- llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h | 6 +- .../lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp | 7 +- llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h | 6 +- llvm/lib/Target/Hexagon/HexagonRegisterInfo.td | 2 +- .../Hexagon/MCTargetDesc/HexagonInstPrinter.cpp | 11 +- .../Hexagon/MCTargetDesc/HexagonInstPrinter.h | 6 +- .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp | 7 +- .../Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp | 7 +- .../Target/Lanai/MCTargetDesc/LanaiInstPrinter.h | 6 +- .../MSP430/MCTargetDesc/MSP430InstPrinter.cpp | 7 +- .../Target/MSP430/MCTargetDesc/MSP430InstPrinter.h | 6 +- .../Target/Mips/MCTargetDesc/MipsInstPrinter.cpp | 7 +- .../lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h | 6 +- llvm/lib/Target/Mips/MipsInstrFPU.td | 2 +- .../Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp | 7 +- .../Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h | 6 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 88 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp | 8 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.h | 6 +- llvm/lib/Target/PowerPC/P9InstrResources.td | 216 ++--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 22 + llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 77 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 31 +- llvm/lib/Target/PowerPC/PPCISelLowering.h | 923 +++++++++++---------- llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 14 +- llvm/lib/Target/PowerPC/PPCInstrAltivec.td | 70 +- llvm/lib/Target/PowerPC/PPCInstrFormats.td | 38 +- llvm/lib/Target/PowerPC/PPCInstrHTM.td | 16 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 284 ++++--- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 238 +++--- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 20 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 42 +- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 2 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 12 +- .../Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp | 7 +- .../Target/RISCV/MCTargetDesc/RISCVInstPrinter.h | 8 +- .../Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp | 7 +- .../Target/Sparc/MCTargetDesc/SparcInstPrinter.h | 8 +- .../SystemZ/MCTargetDesc/SystemZInstPrinter.cpp | 8 +- .../SystemZ/MCTargetDesc/SystemZInstPrinter.h | 6 +- .../MCTargetDesc/WebAssemblyInstPrinter.cpp | 7 +- .../MCTargetDesc/WebAssemblyInstPrinter.h | 6 +- .../WebAssemblyLowerEmscriptenEHSjLj.cpp | 2 +- .../Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp | 7 +- .../Target/X86/MCTargetDesc/X86ATTInstPrinter.h | 6 +- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 39 +- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 11 + .../X86/MCTargetDesc/X86IntelInstPrinter.cpp | 8 +- .../Target/X86/MCTargetDesc/X86IntelInstPrinter.h | 6 +- .../Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 222 +++-- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 11 + llvm/lib/Target/X86/X86ISelLowering.cpp | 15 + llvm/lib/Target/X86/X86InstrAVX512.td | 2 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 2 + llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 4 + .../Target/XCore/MCTargetDesc/XCoreInstPrinter.cpp | 7 +- .../Target/XCore/MCTargetDesc/XCoreInstPrinter.h | 6 +- llvm/lib/Transforms/IPO/Attributor.cpp | 6 +- llvm/lib/Transforms/IPO/PartialInlining.cpp | 2 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 3 +- llvm/lib/Transforms/Utils/AddDiscriminators.cpp | 2 +- llvm/test/Analysis/CostModel/X86/uitofp.ll | 22 +- llvm/test/CodeGen/AArch64/addg_subg.mir | 37 + .../CodeGen/AMDGPU/GlobalISel/bool-legalization.ll | 105 +++ .../CodeGen/AMDGPU/GlobalISel/inst-select-and.mir | 85 +- .../AMDGPU/GlobalISel/inst-select-anyext.mir | 152 ++-- .../AMDGPU/GlobalISel/inst-select-brcond.mir | 8 +- .../GlobalISel/inst-select-build-vector.v2s16.mir | 239 ++++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir | 113 +-- .../AMDGPU/GlobalISel/inst-select-extract.mir | 20 + .../CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir | 28 + .../CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir | 44 +- .../AMDGPU/GlobalISel/inst-select-icmp.s64.mir | 309 +++---- .../AMDGPU/GlobalISel/inst-select-implicit-def.mir | 19 - .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 79 +- .../AMDGPU/GlobalISel/inst-select-phi-invalid.mir | 31 - .../CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir | 36 +- .../AMDGPU/GlobalISel/inst-select-select.mir | 16 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir | 92 +- .../AMDGPU/GlobalISel/inst-select-trunc.mir | 16 + .../AMDGPU/GlobalISel/inst-select-uadde.gfx10.mir | 70 ++ .../AMDGPU/GlobalISel/inst-select-uadde.mir | 89 ++ .../AMDGPU/GlobalISel/inst-select-uaddo.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-usube.gfx10.mir | 70 ++ .../AMDGPU/GlobalISel/inst-select-usube.mir | 89 ++ .../AMDGPU/GlobalISel/inst-select-usubo.mir | 10 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir | 80 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir | 92 +- .../CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir | 57 +- .../AMDGPU/GlobalISel/legalize-intrinsic-round.mir | 802 +++++++++++++++++- .../AMDGPU/GlobalISel/legalize-jump-table.mir | 78 ++ .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll | 3 + .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll | 3 + .../AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll | 1 + .../AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll | 1 + .../AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll | 6 + .../AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll | 6 + .../CodeGen/AMDGPU/GlobalISel/readcyclecounter.ll | 3 + .../GlobalISel/regbankselect-amdgcn.div.fmas.mir | 5 +- .../GlobalISel/regbankselect-amdgcn.kill.mir | 5 +- .../GlobalISel/regbankselect-amdgcn.wqm.vote.mir | 5 +- .../AMDGPU/GlobalISel/regbankselect-and-s1.mir | 519 ++++-------- .../AMDGPU/GlobalISel/regbankselect-anyext.mir | 21 +- .../AMDGPU/GlobalISel/regbankselect-brcond.mir | 30 +- .../AMDGPU/GlobalISel/regbankselect-icmp.mir | 12 +- .../GlobalISel/regbankselect-intrinsic-round.mir | 31 - .../CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir | 38 +- .../AMDGPU/GlobalISel/regbankselect-phi-s1.mir | 628 ++++++++------ .../AMDGPU/GlobalISel/regbankselect-phi.mir | 686 +++++++++------ .../AMDGPU/GlobalISel/regbankselect-sadde.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-select.mir | 334 +++++--- .../AMDGPU/GlobalISel/regbankselect-sext.mir | 61 +- .../AMDGPU/GlobalISel/regbankselect-smax.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-smin.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-ssube.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-trunc.mir | 4 +- .../AMDGPU/GlobalISel/regbankselect-uadde.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-uaddo.mir | 3 +- .../AMDGPU/GlobalISel/regbankselect-umax.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-umin.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-usube.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-usubo.mir | 3 +- .../AMDGPU/GlobalISel/regbankselect-xor.mir | 61 +- .../AMDGPU/GlobalISel/regbankselect-zext.mir | 60 +- llvm/test/CodeGen/AMDGPU/fpow.ll | 562 +++++++++++++ llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll | 69 +- llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll | 97 ++- .../CodeGen/ARM/load_store_opt_clobber_cpsr.mir | 2 +- .../AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir | 55 ++ .../AMDGPU/llc-target-cpu-attr-from-cmdline.mir | 23 + .../GlobalISel/legalizer/fptosi_and_fptoui.mir | 108 ++- .../Mips/GlobalISel/llvm-ir/fptosi_and_fptoui.ll | 9 + .../PowerPC/aix-reference-func-addr-const.ll | 32 + llvm/test/CodeGen/PowerPC/block-placement.mir | 2 +- .../convert-rr-to-ri-instrs-out-of-range.mir | 100 +-- .../CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 170 ++-- llvm/test/CodeGen/PowerPC/fma-combine.ll | 143 ++++ llvm/test/CodeGen/PowerPC/fold-rlwinm.mir | 8 +- llvm/test/CodeGen/PowerPC/ifcvt-diamond-ret.mir | 4 +- llvm/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll | 16 +- .../test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir | 2 +- .../PowerPC/peephole-miscompile-extswsli.mir | 6 +- .../test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir | 24 +- .../Thumb2/mve-intrinsics/scatter-gather.ll | 48 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vabdq.ll | 42 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vhaddq.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vhsubq.ll | 30 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxnmq.ll | 16 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxq.ll | 26 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vminnmq.ll | 16 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vminq.ll | 22 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmulhq.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmullbq.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmulltq.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vqaddq.ll | 14 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vqsubq.ll | 14 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vrhaddq.ll | 42 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vrmulhq.ll | 40 +- llvm/test/CodeGen/Thumb2/segmented-stacks.ll | 86 +- .../WebAssembly/lower-em-exceptions-lpad-only.ll | 25 + .../CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll | 2 +- .../CodeGen/X86/DynamicCalleeSavedRegisters.ll | 2 +- llvm/test/CodeGen/X86/callbr-asm.ll | 30 +- llvm/test/CodeGen/X86/extractelement-load.ll | 45 + llvm/test/CodeGen/X86/lea.ll | 2 +- llvm/test/CodeGen/X86/masked_gather_scatter.ll | 2 +- .../test/CodeGen/X86/select-testb-volatile-load.ll | 33 + llvm/test/CodeGen/X86/swifterror.ll | 2 +- ...vec-strict-128-cmp.ll => vec-strict-cmp-128.ll} | 0 ...vec-strict-256-cmp.ll => vec-strict-cmp-256.ll} | 0 ...vec-strict-512-cmp.ll => vec-strict-cmp-512.ll} | 0 llvm/test/CodeGen/X86/vec-strict-cmp-sub128.ll | 308 +++++++ llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll | 43 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 109 ++- llvm/test/CodeGen/X86/vec_uint_to_fp.ll | 4 +- .../X86/vector-constrained-fp-intrinsics.ll | 12 +- .../CodeGen/X86/vector-shuffle-combining-avx.ll | 64 ++ llvm/test/LTO/X86/parallel.ll | 2 +- llvm/test/MC/AArch64/arm64-directive_loh.s | 4 +- llvm/test/MC/ARM/misaligned-blx.s | 2 +- llvm/test/TableGen/DefaultOpsGlobalISel.td | 144 ++++ .../test/Transforms/DeadArgElim/naked_functions.ll | 2 +- .../Transforms/LoopVectorize/PowerPC/reg-usage.ll | 15 +- llvm/test/Transforms/SCCP/apint-basictest3.ll | 2 +- llvm/test/Transforms/SLPVectorizer/X86/align.ll | 2 +- llvm/test/Transforms/SROA/tbaa-struct.ll | 2 +- llvm/test/tools/llvm-objcopy/ELF/partitions.test | 6 +- .../llvm-readobj/ELF/file-header-abi-version.test | 6 +- .../tools/llvm-readobj/ELF/gnu-file-headers.test | 6 +- llvm/tools/llc/llc.cpp | 11 +- llvm/tools/llvm-c-test/echo.cpp | 4 +- llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp | 2 +- llvm/tools/llvm-exegesis/lib/Analysis.cpp | 2 +- llvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp | 2 +- llvm/tools/llvm-mca/Views/InstructionInfoView.cpp | 2 +- llvm/tools/llvm-mca/Views/ResourcePressureView.cpp | 2 +- llvm/tools/llvm-mca/Views/TimelineView.cpp | 4 +- llvm/tools/llvm-mca/llvm-mca.cpp | 2 +- llvm/tools/llvm-objdump/MachODump.cpp | 9 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 8 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 4 +- llvm/unittests/ADT/APFloatTest.cpp | 278 +++---- llvm/unittests/Analysis/VectorFunctionABITest.cpp | 2 +- llvm/unittests/Analysis/VectorUtilsTest.cpp | 2 +- .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 78 ++ .../DebugInfo/DWARF/DWARFDebugLineTest.cpp | 38 +- llvm/unittests/IR/PassBuilderCallbacksTest.cpp | 3 + llvm/unittests/Support/FileCheckTest.cpp | 144 ++-- llvm/unittests/Support/ReverseIterationTest.cpp | 4 +- .../WebAssembly/WebAssemblyExceptionInfoTest.cpp | 2 +- llvm/utils/TableGen/AsmWriterEmitter.cpp | 15 +- llvm/utils/TableGen/CodeGenTarget.cpp | 4 +- llvm/utils/TableGen/CodeGenTarget.h | 4 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 44 +- llvm/utils/bugpoint/RemoteRunSafely.sh | 2 +- .../clang-tools-extra/clang-tidy/bugprone/BUILD.gn | 1 + llvm/utils/lit/lit/TestRunner.py | 36 +- mlir/CMakeLists.txt | 1 + mlir/docs/Dialects/SPIR-V.md | 119 ++- mlir/include/mlir/Dialect/Linalg/EDSC/Intrinsics.h | 1 + mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 52 ++ mlir/include/mlir/IR/AffineExpr.h | 19 +- mlir/include/mlir/IR/StandardTypes.h | 14 + mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 203 ++++- mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 2 +- mlir/lib/IR/StandardTypes.cpp | 276 +++--- mlir/test/AffineOps/memref-stride-calculation.mlir | 10 + mlir/test/Dialect/Linalg/invalid.mlir | 46 + mlir/test/Dialect/Linalg/roundtrip.mlir | 100 ++- openmp/runtime/src/kmp_os.h | 2 +- polly/lib/Analysis/ScopGraphPrinter.cpp | 2 +- 466 files changed, 11347 insertions(+), 5906 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/bugprone/SignedCharMisuseCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/bugprone/SignedCharMisuseCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/bugprone-signed-char-m [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-signed-char [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-signed-char [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-signed-char [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-signed-char [...] create mode 100644 libc/test/CMakeLists.txt copy libc/{ => test}/config/CMakeLists.txt (100%) create mode 100644 libc/test/config/linux/CMakeLists.txt create mode 100644 libc/test/config/linux/x86_64/CMakeLists.txt rename libc/{ => test}/config/linux/x86_64/syscall_test.cpp (100%) create mode 100644 libc/test/src/CMakeLists.txt copy libc/{ => test}/src/errno/CMakeLists.txt (61%) copy libc/{ => test}/src/errno/errno_test.cpp (100%) create mode 100644 libc/test/src/string/CMakeLists.txt rename libc/{src/string/strcat => test/src/string}/strcat_test.cpp (100%) rename libc/{src/string/strcpy => test/src/string}/strcpy_test.cpp (100%) copy libc/{ => test}/src/sys/CMakeLists.txt (100%) create mode 100644 libc/test/src/sys/mman/CMakeLists.txt rename libc/{ => test}/src/sys/mman/mmap_test.cpp (100%) rename libc/{src/errno/errno_test.cpp => utils/HdrGen/Command.cpp} (52%) create mode 100644 lldb/cmake/modules/FindPythonInterpAndLibs.cmake create mode 100644 lldb/lldb/cmake/modules/FindPythonInterpAndLibs.cmake create mode 100644 llvm/test/CodeGen/AArch64/addg_subg.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector.v2s16.mir delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi-invalid.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.gfx10.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.gfx10.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/readcyclecounter.ll delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-intrinsic-round.mir create mode 100644 llvm/test/CodeGen/AMDGPU/fpow.ll create mode 100644 llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir create mode 100644 llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline.mir create mode 100644 llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll create mode 100644 llvm/test/CodeGen/PowerPC/fma-combine.ll create mode 100644 llvm/test/CodeGen/WebAssembly/lower-em-exceptions-lpad-only.ll create mode 100644 llvm/test/CodeGen/X86/select-testb-volatile-load.ll rename llvm/test/CodeGen/X86/{vec-strict-128-cmp.ll => vec-strict-cmp-128.ll} (100%) rename llvm/test/CodeGen/X86/{vec-strict-256-cmp.ll => vec-strict-cmp-256.ll} (100%) rename llvm/test/CodeGen/X86/{vec-strict-512-cmp.ll => vec-strict-cmp-512.ll} (100%) create mode 100644 llvm/test/CodeGen/X86/vec-strict-cmp-sub128.ll create mode 100644 llvm/test/TableGen/DefaultOpsGlobalISel.td -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (88c6d7b -> 2f052d9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 88c6d7b 0: update: llvm-linux: boot new 2f052d9 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (88c6d7b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 184 +- 02-build_llvm/console.log | 12464 +++++++++++++++++----------------- 03-build_linux/console.log | 684 +- 04-boot_linux/console.log | 480 +- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 16 +- console.log | 13851 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 8 files changed, 13836 insertions(+), 13865 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (62a72308e1c -> 3b6f08b5069)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/gcc. from 62a72308e1c New bitfield testcases. adds c4d2abc10cc Mark param_max_combine_insns with Optimization keyword. adds 6e5b09153e4 libstdc++: Define __cpp_lib_three_way_comparison conditionally adds cc42b6f61b5 libstdc++: Remove redundant inequality operators in <stop_token> adds 79aaafc4532 Fix amdgcn inline immediate range adds d6fdeb0888f [AArch64] Fix constraints for CPY /M adds caae97af7b9 [AArch64] Use move-if-change for aarch64-tune.md adds bf1cb6edc84 PR c++/79592 adjust testcase adds ac5110146f3 Fix early-clobber in amdgcn vec_extract adds 1415d87843a 2020-01-06 Bryan Stenson <bryan(a)siliconvortex.com> adds a6b8833f34a Fix amdgcn issue with '0' constraints adds fb9c849560f Check mask argument's type when vectorising conditional functions adds 69ffead97a2 Require equal shift amounts for IFN_DIV_POW2 adds 4560be9ac2e * config/pa/pa.md: Revert change to use ordered_comparison [...] adds fe956f6730e Daily bump. adds b0f2d29e594 PR c++/92739 - parsing requires clause with attributes. adds fc9c2085956 PR c++/92552 - ICE with inherited constrained default ctor. adds 23fef3f90fb Add support for large prefixed address in adjusting a vecto [...] adds 035a09d2159 Fix bad code of vector extract of PC-relative address with [...] adds 3ae257f8984 Update 'Q' constraint documentation. adds beb5d2f74d2 Update ChangeLog for last change adds e4aa03ead2a Refactor some code for a future change. adds 3b6f08b5069 ipa-inline: Adjust condition for caller_growth_limits No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 89 ++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/aarch64/aarch64-sve.md | 2 +- gcc/config/aarch64/t-aarch64 | 6 +- gcc/config/gcn/gcn-valu.md | 32 ++++---- gcc/config/gcn/gcn.c | 2 +- gcc/config/mips/mips.c | 2 +- gcc/config/pa/pa.md | 4 +- gcc/config/pa/predicates.md | 6 ++ gcc/config/rs6000/constraints.md | 3 +- gcc/config/rs6000/rs6000.c | 57 ++++++++++---- gcc/config/rs6000/vsx.md | 8 +- gcc/cp/ChangeLog | 13 ++++ gcc/cp/class.c | 1 - gcc/cp/parser.c | 8 ++ gcc/cp/pt.c | 1 + gcc/doc/md.texi | 5 +- gcc/ipa-inline-analysis.c | 2 +- gcc/ipa-inline.c | 4 +- gcc/params.opt | 2 +- gcc/testsuite/ChangeLog | 20 +++++ gcc/testsuite/g++.dg/concepts/inherit-ctor3.C | 4 +- gcc/testsuite/g++.dg/cpp2a/concepts-attrib1.C | 15 ++++ .../g++.dg/cpp2a/concepts-inherit-ctor2.C | 4 +- .../g++.dg/cpp2a/concepts-inherit-ctor7.C | 14 ++++ gcc/testsuite/g++.dg/template/crash7.C | 4 +- gcc/testsuite/g++.dg/ubsan/vptr-4.C | 2 +- gcc/testsuite/g++.old-deja/g++.pt/error2.C | 2 +- gcc/testsuite/gcc.dg/vect/vect-cond-arith-8.c | 8 ++ .../gcc.target/aarch64/sve/acle/general/cpy_1.c | 42 ++++++++++ gcc/testsuite/gcc.target/aarch64/sve/asrdiv_1.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve/asrdiv_2.c | 19 +++++ gcc/testsuite/gcc.target/aarch64/sve/asrdiv_3.c | 19 +++++ gcc/testsuite/gcc.target/aarch64/sve/cond_fmul_5.c | 9 +++ gcc/tree-vect-slp.c | 30 +++++--- gcc/tree-vect-stmts.c | 35 ++++----- libstdc++-v3/ChangeLog | 14 ++++ libstdc++-v3/include/bits/stl_algobase.h | 8 +- libstdc++-v3/include/std/stop_token | 18 +---- libstdc++-v3/include/std/version | 2 +- libstdc++-v3/libsupc++/compare | 6 +- .../testsuite/30_threads/stop_token/stop_source.cc | 35 +++++++++ 42 files changed, 447 insertions(+), 120 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-attrib1.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-inherit-ctor7.C create mode 100644 gcc/testsuite/gcc.dg/vect/vect-cond-arith-8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/cpy_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/asrdiv_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/asrdiv_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fmul_5.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (01335edbac -> ef95444455)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/binutils-gdb. from 01335edbac Automatic date update in version.in adds 660e62b1d9 PR25344, z80 disassembler recursion adds 3e6aa7751a Basic error checking for mach-o adds 85d8681747 som_bfd_fill_in_ar_symbols buffer overflow adds cc6aa1a6e0 ubsan: m32c: left shift of negative value adds ab356be74c alpha-vms: don't exit on stack underflow/overflow adds 49078ece04 bfd_check_format: ignore errors from coff_real_object_p adds 559e7e5056 Improve process exit status macros on MinGW adds a61b4f6997 GDB: Remove trailing spaces in tui-disasm.c adds d2dbcb18c6 Fix test of the fix for PR19579 when compiling with gcc-10. adds 8b7fcda274 Fix search in TUI adds 0e1f1593bc Add -fcommon compiler command line option to linker tests th [...] adds 89a65580f4 Fix a typo in gdb/windows-tdep.c adds a08c904d4e Fix a crash with a malformed PE header adds 3f6028216b Mention the recent fix of $_exitsignal on MS-Windows in gdb/NEWS adds cbfa858117 GDB: Fix the overflow in addr/line_is_displayed() adds 66182876b4 Fix MinGW native compilation of gdb/gdbsupport/gdb_wait.c adds 153d79c451 gdb: Fix backtrace with disassemble-next-line on adds 85e290dc12 Re: Prefer object over notype symbols when disassembling adds 85f7836470 RISC-V: Fix weak function call reloc overflow on llvm build. adds ef95444455 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 44 ++++++ bfd/elfnn-riscv.c | 9 +- bfd/format.c | 8 -- bfd/mach-o.c | 83 ++++++++--- bfd/som.c | 23 ++- bfd/version.h | 2 +- bfd/vms-alpha.c | 155 ++++++++++++++------- cpu/ChangeLog | 11 +- cpu/m32c.cpu | 105 +++++++------- gdb/ChangeLog | 57 ++++++++ gdb/Makefile.in | 1 + gdb/NEWS | 3 + gdb/cli/cli-cmds.c | 12 ++ gdb/coff-pe-read.c | 6 + gdb/gdbserver/ChangeLog | 9 ++ gdb/gdbserver/Makefile.in | 2 + gdb/gdbserver/win32-low.c | 22 ++- gdb/gdbsupport/gdb_wait.c | 83 +++++++++++ gdb/gdbsupport/gdb_wait.h | 34 ++++- gdb/source.c | 1 + gdb/stack.c | 10 +- gdb/testsuite/ChangeLog | 5 + .../gdb.base/{start-cpp.cc => backtrace.c} | 19 ++- gdb/testsuite/gdb.base/backtrace.exp | 48 +++++++ gdb/tui/tui-disasm.c | 22 ++- gdb/tui/tui-source.c | 17 ++- gdb/windows-nat.c | 20 ++- gdb/windows-tdep.c | 130 +++++++++++++++++ ld/ChangeLog | 36 +++++ ld/testsuite/ld-elf/shared.exp | 18 +-- ld/testsuite/ld-mips-elf/eh-frame5.s | 11 -- ld/testsuite/ld-mips-elf/ehdr_start-new.s | 1 - ld/testsuite/ld-mips-elf/ehdr_start-o32.s | 1 - ld/testsuite/ld-mips-elf/mips16-call-global-1.s | 1 - ld/testsuite/ld-mips-elf/mips16-intermix-1.s | 1 - ld/testsuite/ld-mips-elf/mips16-pic-1b.s | 1 - ld/testsuite/ld-mips-elf/mips16-pic-4c.s | 2 - ld/testsuite/ld-mips-elf/no-shared-1-n64.s | 1 - ld/testsuite/ld-mips-elf/no-shared-1-o32.s | 1 - .../ld-mips-elf/pic-and-nonpic-1b-micromips.s | 1 - ld/testsuite/ld-mips-elf/pic-and-nonpic-1b.s | 1 - ld/testsuite/ld-mips-elf/pic-and-nonpic-2a.s | 1 - ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.s | 2 - ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.s | 1 - ld/testsuite/ld-mips-elf/pic-and-nonpic-5a.s | 1 - ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32c.s | 1 - ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64c.s | 1 - ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32c.s | 1 - ld/testsuite/ld-mips-elf/pie.s | 1 - ld/testsuite/ld-mips-elf/relax-jalr.s | 7 +- ld/testsuite/ld-plugin/lto.exp | 20 +-- opcodes/ChangeLog | 13 ++ opcodes/m32c-ibld.c | 122 ++++++++-------- opcodes/z80-dis.c | 60 ++++---- 54 files changed, 922 insertions(+), 326 deletions(-) create mode 100644 gdb/gdbsupport/gdb_wait.c copy gdb/testsuite/gdb.base/{start-cpp.cc => backtrace.c} (77%) create mode 100644 gdb/testsuite/gdb.base/backtrace.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (1430d6d -> cf9ff37)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 1430d6d 0: update: binutils-gcc-linux: boot new cf9ff37 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1430d6d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-st [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 66 +- 03-build_abe-binutils/console.log | 11290 ++++++------ 04-build_abe-stage1/console.log | 20292 ++++++++++---------- 05-build_linux/console.log | 3590 ++-- 06-boot_linux/console.log | 416 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 35784 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 10 files changed, 35809 insertions(+), 35773 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (2e466950031 -> 4c6a098ad52)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig in repository toolchain/ci/llvm-project. from 2e466950031 [MC] Reorder members of MCFragment's subclasses to decrease [...] adds 8aae6455c07 [mlir][spirv] Update SPIR-V documentation with information [...] adds 19ace449a3d [TargetLowering] Use SETCC input type to call getBooleanCon [...] adds ce67db41853 [Clang] Force rtlib=platform in test to avoid fails with CL [...] adds a7929533300 [Metadata] Add TBAA struct metadata to `AAMDNode` adds c5fb73c5d1b [APFloat] Add recoverable string parsing errors to APFloat adds 103a58c8f2b Add ExternalAAWrapperPass to createLegacyPMAAResults. adds aab72f89b19 [mlir] Update mlir/CMakeLists.txt to install *.def files adds f3f7dc3d299 [APFloat] Fix compilation warnings adds 5173bfcbc48 Add interface emitPrefix for MCCodeEmitter adds 0efc9e5a8cc [ARM][MVE] More MVETailPredication debug messages. NFC. adds 7180d9568df Fix MSVC "not all control paths return a value" warning. NFCI. adds d68904f957a [NFC] Fix trivial typos in comments adds 89b11843254 [test][DebugInfo][NFC] Rename method for clarity adds 6fa6000e3e2 [DAG] DAGCombiner::XformToShuffleWithZero - use APInt::extr [...] adds 5d986a68a59 [CostModel][X86] Add missing scalar i64->f32 uitofp costs adds de735247c8b [X86] Add extra PR43971 test case mentioned in D70267 adds d45aafa2fbc [clang-format] fix conflict between FormatStyle::BWACS_Mult [...] adds d67c4cc2eb4 [mlir][Linalg] Reimplement and extend getStridesAndOffset adds f1c85ecdfcc AMDGPU/GlobalISel: Select more G_EXTRACTs correctly adds bc763c42bbc [lldb] [Process/NetBSD] Remove unused orig_*ax use adds e4464bf3d45 AMDGPU/GlobalISel: Select scalar v2s16 G_BUILD_VECTOR adds b99ef32d041 [ARM,MVE] Generate the right instruction for vmaxnmq_m_f16. adds 4978296cd8e [ARM,MVE] Support -ve offsets in gather-load intrinsics. adds 34817e04fee [ARM,MVE] Fix many signedness errors in MVE intrinsics. adds ea5abf14530 Fix "use of uninitialized variable" static analyzer warning. NFCI. adds 5bcc747393b Fix "use of uninitialized variable" static analyzer warning [...] adds ea2c159f966 [AMDGPU] Fix "use of uninitialized variable" static analyze [...] adds 1d549cff48c [NFC] Fixes -Wrange-loop-analysis warnings adds eec0240f971 Adds -Wrange-loop-analysis to -Wall adds 61b5e727b7c [AIX] Use csect reference for function address constants adds 0eb981b8ce7 [ARM] Use correct TRAP opcode for thumb in FastISel adds f88d52728b9 [ARM] Use the correct opcodes for Thumb2 segmented stack fr [...] adds 3e1f3b164cc [llvm-libc] Fix missing virtual destructor adds 83ec9b51ed2 [AIX] Use csect reference for function address constants adds b3757f3091d [lldb/CMake] Autodetect Python dependency adds 8eba3fbb12f [lldb/Test] Temporarily skip TestFoundationDisassembly on t [...] adds 350da402ef6 [clang-tidy] new check: bugprone-signed-char-misuse adds ba4ca37b814 [gn build] Port 350da402ef6 adds 896b84ac2c7 [llvm-readelf] Print EI_ABIVERSION as decimal instead of he [...] adds 3abc2927cb2 [lldb/Test] Move @skipIfAsan from test class to test methods. adds f6544934b94 Make check-llvm run 50% faster on macOS, 18% faster on Windows. adds bbfebd7b8a6 [CMake] Add $ORIGIN/../../../../lib to rpath if BUILD_SHARE [...] adds 8c8ffd461d1 [lldb/CMake] Only set PYTHON_HOME on Windows adds 0239526cccf [lldb/Docs] Fix capitalization typo. adds 5b24c088171 [libc] Move all tests to a top level `test` directory. adds 7ae3d335467 [lld] Fix trivial typos in comments adds e29a2e6be4e [PowerPC][LoopVectorize] Extend getRegisterClassForType to [...] adds df3f4e0d77e [X86] Fix an 8 bit testb being selected when folding a vola [...] adds 40a80a0a19f Lower TAGPstack with negative offset to SUBG. adds 19433b199d1 [OpenMP] Fix incorrect property of __has_attribute() macro adds 22cec48dacc [x86] add tests for concat self + shuffle; NFC adds b73fea6a7cf [NFC] Test commit, whitespace change adds 02f694b69a8 [NFC] Test commit, revert whitespace change adds 7b518dcb291 [OPENMP50]Support lastprivate conditional updates in inc/de [...] adds ca868002d31 [X86] Rename vec-strict-*-cmp.ll to vec-strict-cmp-*.ll to [...] adds 62f3403bfc1 [LegalizeTypes] Add widening support for STRICT_FSETCC/FSETCCS adds 317cbdad4d1 [lldb/Docs] Describe optional dependencies on build page. adds 6a0564adcfe [X86] Improve v4i32->v4f64 uint_to_fp for AVX1/AVX2 targets. adds 5518a02a83e llc/MIR: Fix setFunctionAttributes for MIR functions adds 14d25052a29 AMDGPU: Use ImmLeaf for inline immediate predicates adds a506efff182 AMDGPU: Use ImmLeaf adds 7f2db2917da AMDGPU: Fix legalizing f16 fpow adds 0b093f02120 GlobalISel: Start adding computeNumSignBits to GISelKnownBits adds 1060b9e23b8 GlobalISel: Correct result type for G_FCMP in lowerFPTOUI adds ee6b8722ffa GlobalISel: Fix unsupported legalize action adds f5329bfc76b [Diagnostic] make Wmisleading-indendation not warn about labels adds 24ee4edee8e [PowerPC][NFC] Rename record instructions to use _rec suffi [...] adds d8fd92eaaa3 [FileCheck] Remove FileCheck prefix in API adds 83d690a1498 Don't rely on 'l'(ell) modifiers to indicate a label reference adds 71a2a62163c [CMake] Pass symlink dependency to add_llvm_install_targets [...] adds 59fadc14eeb [NSArray] Remove a very old and deprecated formatter. adds b5e7f95cfbe [msan] Check qsort input. adds 08d17cb065d [X86] Move an enum definition into a header to simplify fut [...] adds 450073c639d Change the patterns to include the prefix '= ' so we don't [...] adds f3de8ab5cce GlobalISel: Implement lower for G_INTRINSIC_ROUND adds 26f714ff43e TableGen/GlobalISel: Handle default operands that are used adds 4e85ca9562a AMDGPU/GlobalISel: Replace handling of boolean values adds d4c9e133244 AMDGPU/GlobalISel: Select G_UADDE/G_USUBE adds c6fd16af2be Use FileCheck instead of grep adds 6904cd94867 Add Triple::isX86() adds 5e0e0e3ff05 [NFC] Fixes -Wrange-loop-analysis warnings adds 7ba4595c86b [msan] Fix underflow in qsort interceptor. adds 20f005d25f4 [CodeGen][ObjC] Push the properties of a protocol before pu [...] adds 52afc93c38c AMDGPU/GlobalISel: Legalize G_READCYCLECOUNTER adds 21f7b362095 [WebAssembly] Fix landingpad-only case in Emscripten EH adds e93b1ffc849 AMDGPU: Use default operands for clamp/omod adds 907cefe7214 Always deduce the lengths of contained parameter packs when [...] adds 452f6243c9b AMDGPU: Select llvm.amdgcn.interp.p2.f16 directly adds e8d9d202bc9 AMDGPU: Add run line to int_to_fp tests adds d877229b5b2 [NFC][Test] Add a test to verify the DAGCombine of fma adds e3750cafdb1 [mlir][Linalg] Add a linalg.reshape op adds dc7b84c66c1 AMDGPU/GlobalISel: Fix unused variable warning in release new aa708763d30 [MC] Add parameter `Address` to MCInstPrinter::printInst new 3d87d0b9257 [MC] Add parameter `Address` to MCInstrPrinter::printInstruction new ff554a91790 Let PassBuilder Expose PassInstrumentationCallbacks new 6598af4a54b [libc] Add __attribute__((always_inline)) to x86_64 syscall [...] new 4c6a098ad52 [OpenMP] NFC: Fix trivial typos in comments The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../clang-tidy/bugprone/BugproneTidyModule.cpp | 3 + .../clang-tidy/bugprone/CMakeLists.txt | 1 + .../clang-tidy/bugprone/SignedCharMisuseCheck.cpp | 104 +++ .../clang-tidy/bugprone/SignedCharMisuseCheck.h | 44 + .../clang-tidy/readability/MagicNumbersCheck.cpp | 8 +- .../clang-tidy/utils/FixItHintUtils.cpp | 1 + clang-tools-extra/docs/ReleaseNotes.rst | 6 + .../checks/bugprone-signed-char-misuse.rst | 76 ++ clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../bugprone-signed-char-misuse-fsigned-char.cpp | 9 + .../bugprone-signed-char-misuse-funsigned-char.cpp | 17 + .../bugprone-signed-char-misuse-with-option.cpp | 74 ++ .../checkers/bugprone-signed-char-misuse.cpp | 123 +++ clang/include/clang/Basic/DiagnosticGroups.td | 2 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 8 +- clang/include/clang/Basic/arm_mve.td | 75 +- clang/include/clang/Basic/arm_mve_defs.td | 5 +- clang/lib/AST/MicrosoftMangle.cpp | 4 +- clang/lib/CodeGen/CGBuiltin.cpp | 3 +- clang/lib/CodeGen/CGExpr.cpp | 3 + clang/lib/CodeGen/CGExprScalar.cpp | 21 +- clang/lib/CodeGen/CGObjCMac.cpp | 6 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 36 +- clang/lib/CodeGen/CGOpenMPRuntime.h | 5 + clang/lib/CodeGen/CGStmtOpenMP.cpp | 6 + clang/lib/Driver/ToolChains/Darwin.cpp | 2 +- clang/lib/Driver/ToolChains/FreeBSD.cpp | 7 +- clang/lib/Format/UnwrappedLineFormatter.cpp | 13 + clang/lib/Frontend/CompilerInvocation.cpp | 2 +- clang/lib/Lex/LiteralSupport.cpp | 8 +- clang/lib/Parse/ParseStmt.cpp | 10 +- clang/lib/Parse/ParseStmtAsm.cpp | 5 +- clang/lib/Sema/SemaOverload.cpp | 16 + clang/lib/Sema/SemaTemplateDeduction.cpp | 39 +- clang/test/CXX/drs/dr13xx.cpp | 4 +- .../temp.deduct/temp.deduct.type/p5-0x.cpp | 31 + .../CodeGen/arm-mve-intrinsics/scatter-gather.c | 60 +- clang/test/CodeGen/arm-mve-intrinsics/vabdq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vhaddq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vhsubq.c | 12 +- clang/test/CodeGen/arm-mve-intrinsics/vmaxnmq.c | 8 +- clang/test/CodeGen/arm-mve-intrinsics/vmaxq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vminnmq.c | 8 +- clang/test/CodeGen/arm-mve-intrinsics/vminq.c | 14 +- clang/test/CodeGen/arm-mve-intrinsics/vmulhq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vmullbq.c | 24 +- clang/test/CodeGen/arm-mve-intrinsics/vmulltq.c | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vqaddq.c | 6 +- clang/test/CodeGen/arm-mve-intrinsics/vqsubq.c | 6 +- clang/test/CodeGen/arm-mve-intrinsics/vrhaddq.c | 20 +- clang/test/CodeGen/arm-mve-intrinsics/vrmulhq.c | 18 +- clang/test/CodeGenObjC/encode-test-2.m | 31 +- clang/test/Driver/cross-linux.c | 3 + clang/test/Misc/warning-wall.c | 4 +- clang/test/OpenMP/for_lastprivate_codegen.cpp | 15 +- clang/test/OpenMP/sections_lastprivate_codegen.cpp | 65 +- clang/test/Parser/warn-misleading-indentation.cpp | 7 + clang/test/Sema/arm-mve-immediates.c | 28 +- clang/test/SemaCXX/warn-range-loop-analysis.cpp | 1 + clang/test/SemaTemplate/alias-templates.cpp | 6 +- clang/test/SemaTemplate/deduction.cpp | 4 +- clang/test/SemaTemplate/pack-deduction.cpp | 4 +- clang/unittests/Format/FormatTest.cpp | 37 +- clang/utils/TableGen/MveEmitter.cpp | 11 +- .../sanitizer_common_interceptors.inc | 18 + compiler-rt/test/msan/qsort.cpp | 12 + libc/CMakeLists.txt | 7 +- libc/config/linux/x86_64/CMakeLists.txt | 10 - libc/config/linux/x86_64/syscall.h.inc | 24 +- libc/docs/source_layout.rst | 10 + libc/src/errno/CMakeLists.txt | 12 - libc/src/string/CMakeLists.txt | 2 - libc/src/string/strcat/CMakeLists.txt | 11 - libc/src/string/strcpy/CMakeLists.txt | 10 - libc/src/sys/mman/CMakeLists.txt | 14 - libc/test/CMakeLists.txt | 4 + libc/{ => test}/config/CMakeLists.txt | 0 libc/test/config/linux/CMakeLists.txt | 4 + libc/test/config/linux/x86_64/CMakeLists.txt | 11 + .../config/linux/x86_64/syscall_test.cpp | 0 libc/test/src/CMakeLists.txt | 3 + libc/{ => test}/src/errno/CMakeLists.txt | 9 +- libc/{ => test}/src/errno/errno_test.cpp | 0 libc/test/src/string/CMakeLists.txt | 23 + .../strcat => test/src/string}/strcat_test.cpp | 0 .../strcpy => test/src/string}/strcpy_test.cpp | 0 libc/{ => test}/src/sys/CMakeLists.txt | 0 libc/test/src/sys/mman/CMakeLists.txt | 14 + libc/{ => test}/src/sys/mman/mmap_test.cpp | 0 libc/utils/HdrGen/CMakeLists.txt | 1 + .../errno_test.cpp => utils/HdrGen/Command.cpp} | 14 +- libc/utils/HdrGen/Command.h | 2 + lld/Common/Filesystem.cpp | 2 +- lld/ELF/Arch/X86.cpp | 2 +- lld/ELF/ICF.cpp | 2 +- lld/ELF/InputFiles.cpp | 2 +- lld/ELF/InputSection.cpp | 2 +- lld/ELF/OutputSections.cpp | 2 +- lld/docs/WebAssembly.rst | 2 +- lld/docs/windows_support.rst | 2 +- lld/include/lld/Core/Atom.h | 2 +- lld/include/lld/Core/Instrumentation.h | 2 +- lld/include/lld/Core/Reference.h | 2 +- lld/include/lld/ReaderWriter/MachOLinkingContext.h | 2 +- lld/lib/Core/Resolver.cpp | 2 +- lld/lib/Driver/DarwinLdDriver.cpp | 8 +- lld/lib/ReaderWriter/MachO/CompactUnwindPass.cpp | 2 +- lld/lib/ReaderWriter/MachO/File.h | 2 +- lld/lib/ReaderWriter/MachO/GOTPass.cpp | 2 +- lld/lib/ReaderWriter/MachO/MachOLinkingContext.cpp | 2 +- .../MachO/MachONormalizedFileBinaryWriter.cpp | 4 +- .../MachO/MachONormalizedFileToAtoms.cpp | 8 +- lld/lib/ReaderWriter/YAML/ReaderWriterYAML.cpp | 4 +- lld/test/ELF/aarch64-movw-tprel.s | 2 +- lld/test/ELF/linkerscript/assert.s | 2 +- lld/test/ELF/mips-n32-rels.s | 2 +- lld/test/ELF/ppc64-bsymbolic-toc-restore.s | 2 +- lld/test/wasm/export-optional-lazy.ll | 2 +- lld/test/wasm/signature-mismatch-unknown.ll | 2 +- lld/wasm/Config.h | 2 +- lld/wasm/InputChunks.h | 4 +- lld/wasm/InputFiles.cpp | 3 +- lld/wasm/SymbolTable.cpp | 11 +- lld/wasm/Symbols.h | 4 +- lldb/cmake/modules/FindPythonInterpAndLibs.cmake | 51 ++ lldb/cmake/modules/LLDBConfig.cmake | 53 +- lldb/docs/resources/build.rst | 38 +- .../cmake/modules/FindPythonInterpAndLibs.cmake | 51 ++ .../TestCallOverriddenMethod.py | 10 +- .../objc/foundation/TestFoundationDisassembly.py | 2 + lldb/source/API/CMakeLists.txt | 8 + lldb/source/Plugins/Language/ObjC/NSArray.cpp | 27 - .../NetBSD/NativeRegisterContextNetBSD_x86_64.cpp | 5 - llvm/bindings/ocaml/llvm/llvm.mli | 2 +- llvm/cmake/modules/AddLLVM.cmake | 17 +- llvm/include/llvm/ADT/APFloat.h | 11 +- llvm/include/llvm/ADT/PointerUnion.h | 2 +- llvm/include/llvm/ADT/Triple.h | 5 + llvm/include/llvm/Analysis/ValueTracking.h | 4 +- llvm/include/llvm/CodeGen/CommandFlags.inc | 82 +- .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 2 +- .../llvm/CodeGen/GlobalISel/GISelKnownBits.h | 4 + .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 1 + .../llvm/CodeGen/GlobalISel/LegalizerInfo.h | 1 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 6 + llvm/include/llvm/CodeGen/MIRParser/MIRParser.h | 14 +- llvm/include/llvm/DebugInfo/GSYM/FunctionInfo.h | 2 +- llvm/include/llvm/DebugInfo/GSYM/GsymCreator.h | 6 +- .../llvm/ExecutionEngine/Orc/OrcABISupport.h | 2 +- llvm/include/llvm/IR/InstrTypes.h | 2 +- llvm/include/llvm/IR/IntrinsicsARM.td | 61 +- llvm/include/llvm/IR/Metadata.h | 28 +- llvm/include/llvm/MC/MCCodeEmitter.h | 6 + llvm/include/llvm/MC/MCInstPrinter.h | 4 +- llvm/include/llvm/MC/MCStreamer.h | 5 +- llvm/include/llvm/Passes/PassBuilder.h | 7 + llvm/include/llvm/Support/Allocator.h | 2 +- .../llvm/Target/GlobalISel/SelectionDAGCompat.td | 1 + llvm/include/llvm/Target/Target.td | 2 +- llvm/include/llvm/Transforms/IPO/Attributor.h | 6 +- llvm/lib/Analysis/AliasAnalysis.cpp | 5 + llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp | 17 +- llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 2 +- llvm/lib/CodeGen/Analysis.cpp | 2 +- .../lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 35 +- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 70 ++ llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 33 +- llvm/lib/CodeGen/LiveDebugVariables.cpp | 2 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 45 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 12 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 2 + .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 84 ++ .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 +- llvm/lib/CodeGen/TwoAddressInstructionPass.cpp | 2 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 2 +- llvm/lib/IR/AutoUpgrade.cpp | 4 +- llvm/lib/IR/Metadata.cpp | 1 + llvm/lib/MC/MCAsmStreamer.cpp | 4 +- llvm/lib/MC/MCAssembler.cpp | 6 +- llvm/lib/MC/MCDisassembler/Disassembler.cpp | 3 +- llvm/lib/MC/MCExpr.cpp | 2 +- llvm/lib/MC/MCParser/AsmParser.cpp | 3 +- llvm/lib/MC/MCParser/COFFAsmParser.cpp | 2 +- llvm/lib/MC/MCStreamer.cpp | 7 +- llvm/lib/ProfileData/GCOV.cpp | 2 +- llvm/lib/Support/APFloat.cpp | 155 ++-- llvm/lib/Support/FileCheck.cpp | 272 +++--- llvm/lib/Support/FileCheckImpl.h | 163 ++-- llvm/lib/Support/StringRef.cpp | 10 +- llvm/lib/Target/AArch64/AArch64CallLowering.cpp | 2 +- .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 6 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 9 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.td | 2 +- .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 14 +- .../AArch64/MCTargetDesc/AArch64InstPrinter.cpp | 15 +- .../AArch64/MCTargetDesc/AArch64InstPrinter.h | 16 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 2 +- .../Target/AMDGPU/AMDGPUGenRegisterBankInfo.def | 110 ++- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 16 + .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 221 ++--- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 12 +- llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 22 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 36 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 389 ++++++--- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 4 + llvm/lib/Target/AMDGPU/AMDGPURegisterBanks.td | 2 - .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 4 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 14 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 14 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 1 + llvm/lib/Target/AMDGPU/R600AsmPrinter.cpp | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 17 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 4 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 63 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 52 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 8 - llvm/lib/Target/AMDGPU/VOP3Instructions.td | 22 +- .../lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp | 7 +- llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h | 6 +- llvm/lib/Target/ARM/ARMCallingConv.cpp | 2 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 8 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 6 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMInstrMVE.td | 81 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 4 + llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 2 +- .../lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp | 11 +- llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h | 8 +- .../lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.cpp | 2 +- llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.h | 2 +- llvm/lib/Target/ARM/MVETailPredication.cpp | 157 ++-- .../lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp | 7 +- llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h | 6 +- .../lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp | 7 +- llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h | 6 +- llvm/lib/Target/Hexagon/HexagonRegisterInfo.td | 2 +- .../Hexagon/MCTargetDesc/HexagonInstPrinter.cpp | 11 +- .../Hexagon/MCTargetDesc/HexagonInstPrinter.h | 6 +- .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp | 7 +- .../Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp | 7 +- .../Target/Lanai/MCTargetDesc/LanaiInstPrinter.h | 6 +- .../MSP430/MCTargetDesc/MSP430InstPrinter.cpp | 7 +- .../Target/MSP430/MCTargetDesc/MSP430InstPrinter.h | 6 +- .../Target/Mips/MCTargetDesc/MipsInstPrinter.cpp | 7 +- .../lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h | 6 +- llvm/lib/Target/Mips/MipsInstrFPU.td | 2 +- .../Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp | 7 +- .../Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h | 6 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 88 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp | 8 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.h | 6 +- llvm/lib/Target/PowerPC/P9InstrResources.td | 216 ++--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 22 + llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 77 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 31 +- llvm/lib/Target/PowerPC/PPCISelLowering.h | 923 +++++++++++---------- llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 14 +- llvm/lib/Target/PowerPC/PPCInstrAltivec.td | 70 +- llvm/lib/Target/PowerPC/PPCInstrFormats.td | 38 +- llvm/lib/Target/PowerPC/PPCInstrHTM.td | 16 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 284 ++++--- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 238 +++--- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 20 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 42 +- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 2 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 12 +- .../Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp | 7 +- .../Target/RISCV/MCTargetDesc/RISCVInstPrinter.h | 8 +- .../Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp | 7 +- .../Target/Sparc/MCTargetDesc/SparcInstPrinter.h | 8 +- .../SystemZ/MCTargetDesc/SystemZInstPrinter.cpp | 8 +- .../SystemZ/MCTargetDesc/SystemZInstPrinter.h | 6 +- .../MCTargetDesc/WebAssemblyInstPrinter.cpp | 7 +- .../MCTargetDesc/WebAssemblyInstPrinter.h | 6 +- .../WebAssemblyLowerEmscriptenEHSjLj.cpp | 2 +- .../Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp | 7 +- .../Target/X86/MCTargetDesc/X86ATTInstPrinter.h | 6 +- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 39 +- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 11 + .../X86/MCTargetDesc/X86IntelInstPrinter.cpp | 8 +- .../Target/X86/MCTargetDesc/X86IntelInstPrinter.h | 6 +- .../Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 222 +++-- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 11 + llvm/lib/Target/X86/X86ISelLowering.cpp | 15 + llvm/lib/Target/X86/X86InstrAVX512.td | 2 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 2 + llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 4 + .../Target/XCore/MCTargetDesc/XCoreInstPrinter.cpp | 7 +- .../Target/XCore/MCTargetDesc/XCoreInstPrinter.h | 6 +- llvm/lib/Transforms/IPO/Attributor.cpp | 6 +- llvm/lib/Transforms/IPO/PartialInlining.cpp | 2 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 3 +- llvm/lib/Transforms/Utils/AddDiscriminators.cpp | 2 +- llvm/test/Analysis/CostModel/X86/uitofp.ll | 22 +- llvm/test/CodeGen/AArch64/addg_subg.mir | 37 + .../CodeGen/AMDGPU/GlobalISel/bool-legalization.ll | 105 +++ .../CodeGen/AMDGPU/GlobalISel/inst-select-and.mir | 85 +- .../AMDGPU/GlobalISel/inst-select-anyext.mir | 152 ++-- .../AMDGPU/GlobalISel/inst-select-brcond.mir | 8 +- .../GlobalISel/inst-select-build-vector.v2s16.mir | 239 ++++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir | 113 +-- .../AMDGPU/GlobalISel/inst-select-extract.mir | 20 + .../CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir | 28 + .../CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir | 44 +- .../AMDGPU/GlobalISel/inst-select-icmp.s64.mir | 309 +++---- .../AMDGPU/GlobalISel/inst-select-implicit-def.mir | 19 - .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 79 +- .../AMDGPU/GlobalISel/inst-select-phi-invalid.mir | 31 - .../CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir | 36 +- .../AMDGPU/GlobalISel/inst-select-select.mir | 16 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir | 92 +- .../AMDGPU/GlobalISel/inst-select-trunc.mir | 16 + .../AMDGPU/GlobalISel/inst-select-uadde.gfx10.mir | 70 ++ .../AMDGPU/GlobalISel/inst-select-uadde.mir | 89 ++ .../AMDGPU/GlobalISel/inst-select-uaddo.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-usube.gfx10.mir | 70 ++ .../AMDGPU/GlobalISel/inst-select-usube.mir | 89 ++ .../AMDGPU/GlobalISel/inst-select-usubo.mir | 10 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir | 80 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir | 92 +- .../CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir | 57 +- .../AMDGPU/GlobalISel/legalize-intrinsic-round.mir | 802 +++++++++++++++++- .../AMDGPU/GlobalISel/legalize-jump-table.mir | 78 ++ .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll | 3 + .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll | 3 + .../AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll | 1 + .../AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll | 1 + .../AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll | 6 + .../AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll | 6 + .../CodeGen/AMDGPU/GlobalISel/readcyclecounter.ll | 3 + .../GlobalISel/regbankselect-amdgcn.div.fmas.mir | 5 +- .../GlobalISel/regbankselect-amdgcn.kill.mir | 5 +- .../GlobalISel/regbankselect-amdgcn.wqm.vote.mir | 5 +- .../AMDGPU/GlobalISel/regbankselect-and-s1.mir | 519 ++++-------- .../AMDGPU/GlobalISel/regbankselect-anyext.mir | 21 +- .../AMDGPU/GlobalISel/regbankselect-brcond.mir | 30 +- .../AMDGPU/GlobalISel/regbankselect-icmp.mir | 12 +- .../GlobalISel/regbankselect-intrinsic-round.mir | 31 - .../CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir | 38 +- .../AMDGPU/GlobalISel/regbankselect-phi-s1.mir | 628 ++++++++------ .../AMDGPU/GlobalISel/regbankselect-phi.mir | 686 +++++++++------ .../AMDGPU/GlobalISel/regbankselect-sadde.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-select.mir | 334 +++++--- .../AMDGPU/GlobalISel/regbankselect-sext.mir | 61 +- .../AMDGPU/GlobalISel/regbankselect-smax.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-smin.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-ssube.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-trunc.mir | 4 +- .../AMDGPU/GlobalISel/regbankselect-uadde.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-uaddo.mir | 3 +- .../AMDGPU/GlobalISel/regbankselect-umax.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-umin.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-usube.mir | 46 +- .../AMDGPU/GlobalISel/regbankselect-usubo.mir | 3 +- .../AMDGPU/GlobalISel/regbankselect-xor.mir | 61 +- .../AMDGPU/GlobalISel/regbankselect-zext.mir | 60 +- llvm/test/CodeGen/AMDGPU/fpow.ll | 562 +++++++++++++ llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll | 69 +- llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll | 97 ++- .../CodeGen/ARM/load_store_opt_clobber_cpsr.mir | 2 +- .../AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir | 55 ++ .../AMDGPU/llc-target-cpu-attr-from-cmdline.mir | 23 + .../GlobalISel/legalizer/fptosi_and_fptoui.mir | 108 ++- .../Mips/GlobalISel/llvm-ir/fptosi_and_fptoui.ll | 9 + .../PowerPC/aix-reference-func-addr-const.ll | 32 + llvm/test/CodeGen/PowerPC/block-placement.mir | 2 +- .../convert-rr-to-ri-instrs-out-of-range.mir | 100 +-- .../CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 170 ++-- llvm/test/CodeGen/PowerPC/fma-combine.ll | 143 ++++ llvm/test/CodeGen/PowerPC/fold-rlwinm.mir | 8 +- llvm/test/CodeGen/PowerPC/ifcvt-diamond-ret.mir | 4 +- llvm/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll | 16 +- .../test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir | 2 +- .../PowerPC/peephole-miscompile-extswsli.mir | 6 +- .../test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir | 24 +- .../Thumb2/mve-intrinsics/scatter-gather.ll | 48 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vabdq.ll | 42 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vhaddq.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vhsubq.ll | 30 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxnmq.ll | 16 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxq.ll | 26 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vminnmq.ll | 16 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vminq.ll | 22 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmulhq.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmullbq.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmulltq.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vqaddq.ll | 14 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vqsubq.ll | 14 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vrhaddq.ll | 42 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vrmulhq.ll | 40 +- llvm/test/CodeGen/Thumb2/segmented-stacks.ll | 86 +- .../WebAssembly/lower-em-exceptions-lpad-only.ll | 25 + .../CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll | 2 +- .../CodeGen/X86/DynamicCalleeSavedRegisters.ll | 2 +- llvm/test/CodeGen/X86/callbr-asm.ll | 30 +- llvm/test/CodeGen/X86/extractelement-load.ll | 45 + llvm/test/CodeGen/X86/lea.ll | 2 +- llvm/test/CodeGen/X86/masked_gather_scatter.ll | 2 +- .../test/CodeGen/X86/select-testb-volatile-load.ll | 33 + llvm/test/CodeGen/X86/swifterror.ll | 2 +- ...vec-strict-128-cmp.ll => vec-strict-cmp-128.ll} | 0 ...vec-strict-256-cmp.ll => vec-strict-cmp-256.ll} | 0 ...vec-strict-512-cmp.ll => vec-strict-cmp-512.ll} | 0 llvm/test/CodeGen/X86/vec-strict-cmp-sub128.ll | 308 +++++++ llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll | 43 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 109 ++- llvm/test/CodeGen/X86/vec_uint_to_fp.ll | 4 +- .../X86/vector-constrained-fp-intrinsics.ll | 12 +- .../CodeGen/X86/vector-shuffle-combining-avx.ll | 64 ++ llvm/test/LTO/X86/parallel.ll | 2 +- llvm/test/MC/AArch64/arm64-directive_loh.s | 4 +- llvm/test/MC/ARM/misaligned-blx.s | 2 +- llvm/test/TableGen/DefaultOpsGlobalISel.td | 144 ++++ .../test/Transforms/DeadArgElim/naked_functions.ll | 2 +- .../Transforms/LoopVectorize/PowerPC/reg-usage.ll | 15 +- llvm/test/Transforms/SCCP/apint-basictest3.ll | 2 +- llvm/test/Transforms/SLPVectorizer/X86/align.ll | 2 +- llvm/test/Transforms/SROA/tbaa-struct.ll | 2 +- llvm/test/tools/llvm-objcopy/ELF/partitions.test | 6 +- .../llvm-readobj/ELF/file-header-abi-version.test | 6 +- .../tools/llvm-readobj/ELF/gnu-file-headers.test | 6 +- llvm/tools/llc/llc.cpp | 11 +- llvm/tools/llvm-c-test/echo.cpp | 4 +- llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp | 2 +- llvm/tools/llvm-exegesis/lib/Analysis.cpp | 2 +- llvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp | 2 +- llvm/tools/llvm-mca/Views/InstructionInfoView.cpp | 2 +- llvm/tools/llvm-mca/Views/ResourcePressureView.cpp | 2 +- llvm/tools/llvm-mca/Views/TimelineView.cpp | 4 +- llvm/tools/llvm-mca/llvm-mca.cpp | 2 +- llvm/tools/llvm-objdump/MachODump.cpp | 9 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 8 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 4 +- llvm/unittests/ADT/APFloatTest.cpp | 278 +++---- llvm/unittests/Analysis/VectorFunctionABITest.cpp | 2 +- llvm/unittests/Analysis/VectorUtilsTest.cpp | 2 +- .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 78 ++ .../DebugInfo/DWARF/DWARFDebugLineTest.cpp | 38 +- llvm/unittests/IR/PassBuilderCallbacksTest.cpp | 3 + llvm/unittests/Support/FileCheckTest.cpp | 144 ++-- llvm/unittests/Support/ReverseIterationTest.cpp | 4 +- .../WebAssembly/WebAssemblyExceptionInfoTest.cpp | 2 +- llvm/utils/TableGen/AsmWriterEmitter.cpp | 15 +- llvm/utils/TableGen/CodeGenTarget.cpp | 4 +- llvm/utils/TableGen/CodeGenTarget.h | 4 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 44 +- llvm/utils/bugpoint/RemoteRunSafely.sh | 2 +- .../clang-tools-extra/clang-tidy/bugprone/BUILD.gn | 1 + llvm/utils/lit/lit/TestRunner.py | 36 +- mlir/CMakeLists.txt | 1 + mlir/docs/Dialects/SPIR-V.md | 119 ++- mlir/include/mlir/Dialect/Linalg/EDSC/Intrinsics.h | 1 + mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 52 ++ mlir/include/mlir/IR/AffineExpr.h | 19 +- mlir/include/mlir/IR/StandardTypes.h | 14 + mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 203 ++++- mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 2 +- mlir/lib/IR/StandardTypes.cpp | 276 +++--- mlir/test/AffineOps/memref-stride-calculation.mlir | 10 + mlir/test/Dialect/Linalg/invalid.mlir | 46 + mlir/test/Dialect/Linalg/roundtrip.mlir | 100 ++- openmp/libomptarget/deviceRTLs/common/debug.h | 2 +- openmp/libomptarget/deviceRTLs/common/omptarget.h | 6 +- .../libomptarget/deviceRTLs/common/src/libcall.cu | 4 +- .../deviceRTLs/common/src/omptarget.cu | 2 +- .../libomptarget/deviceRTLs/common/src/parallel.cu | 2 +- openmp/libomptarget/deviceRTLs/common/src/task.cu | 6 +- .../deviceRTLs/nvptx/test/parallel/level.c | 4 +- openmp/libomptarget/plugins/cuda/src/rtl.cpp | 6 +- openmp/libomptarget/src/private.h | 2 +- openmp/runtime/cmake/LibompMicroTests.cmake | 2 +- openmp/runtime/cmake/config-ix.cmake | 2 +- openmp/runtime/src/extractExternal.cpp | 2 +- openmp/runtime/src/i18n/en_US.txt | 2 +- openmp/runtime/src/include/omp_lib.f.var | 2 +- openmp/runtime/src/kmp.h | 10 +- openmp/runtime/src/kmp_affinity.cpp | 4 +- openmp/runtime/src/kmp_atomic.cpp | 2 +- openmp/runtime/src/kmp_dispatch.cpp | 6 +- openmp/runtime/src/kmp_gsupport.cpp | 4 +- openmp/runtime/src/kmp_itt.inl | 4 +- openmp/runtime/src/kmp_lock.h | 2 +- openmp/runtime/src/kmp_os.h | 2 +- openmp/runtime/src/kmp_runtime.cpp | 4 +- openmp/runtime/src/kmp_settings.cpp | 6 +- openmp/runtime/src/kmp_stats.cpp | 2 +- openmp/runtime/src/kmp_taskdeps.cpp | 2 +- openmp/runtime/src/kmp_tasking.cpp | 7 +- openmp/runtime/src/kmp_wrapper_malloc.h | 2 +- .../runtime/src/thirdparty/ittnotify/ittnotify.h | 12 +- .../src/thirdparty/ittnotify/ittnotify_static.cpp | 2 +- .../src/thirdparty/ittnotify/legacy/ittnotify.h | 4 +- openmp/runtime/test/ompt/synchronization/lock.c | 2 +- .../runtime/test/ompt/synchronization/nest_lock.c | 2 +- .../runtime/test/threadprivate/omp_threadprivate.c | 2 +- openmp/runtime/tools/check-depends.pl | 6 +- openmp/runtime/tools/generate-def.pl | 2 +- openmp/runtime/tools/lib/Uname.pm | 2 +- openmp/runtime/tools/lib/tools.pm | 4 +- openmp/runtime/tools/message-converter.pl | 6 +- openmp/tools/archer/tests/races/task-dependency.c | 2 +- polly/lib/Analysis/ScopGraphPrinter.cpp | 2 +- 505 files changed, 11420 insertions(+), 5978 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/bugprone/SignedCharMisuseCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/bugprone/SignedCharMisuseCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/bugprone-signed-char-m [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-signed-char [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-signed-char [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-signed-char [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-signed-char [...] create mode 100644 libc/test/CMakeLists.txt copy libc/{ => test}/config/CMakeLists.txt (100%) create mode 100644 libc/test/config/linux/CMakeLists.txt create mode 100644 libc/test/config/linux/x86_64/CMakeLists.txt rename libc/{ => test}/config/linux/x86_64/syscall_test.cpp (100%) create mode 100644 libc/test/src/CMakeLists.txt copy libc/{ => test}/src/errno/CMakeLists.txt (61%) copy libc/{ => test}/src/errno/errno_test.cpp (100%) create mode 100644 libc/test/src/string/CMakeLists.txt rename libc/{src/string/strcat => test/src/string}/strcat_test.cpp (100%) rename libc/{src/string/strcpy => test/src/string}/strcpy_test.cpp (100%) copy libc/{ => test}/src/sys/CMakeLists.txt (100%) create mode 100644 libc/test/src/sys/mman/CMakeLists.txt rename libc/{ => test}/src/sys/mman/mmap_test.cpp (100%) rename libc/{src/errno/errno_test.cpp => utils/HdrGen/Command.cpp} (52%) create mode 100644 lldb/cmake/modules/FindPythonInterpAndLibs.cmake create mode 100644 lldb/lldb/cmake/modules/FindPythonInterpAndLibs.cmake create mode 100644 llvm/test/CodeGen/AArch64/addg_subg.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector.v2s16.mir delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi-invalid.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.gfx10.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.gfx10.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/readcyclecounter.ll delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-intrinsic-round.mir create mode 100644 llvm/test/CodeGen/AMDGPU/fpow.ll create mode 100644 llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir create mode 100644 llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline.mir create mode 100644 llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll create mode 100644 llvm/test/CodeGen/PowerPC/fma-combine.ll create mode 100644 llvm/test/CodeGen/WebAssembly/lower-em-exceptions-lpad-only.ll create mode 100644 llvm/test/CodeGen/X86/select-testb-volatile-load.ll rename llvm/test/CodeGen/X86/{vec-strict-128-cmp.ll => vec-strict-cmp-128.ll} (100%) rename llvm/test/CodeGen/X86/{vec-strict-256-cmp.ll => vec-strict-cmp-256.ll} (100%) rename llvm/test/CodeGen/X86/{vec-strict-512-cmp.ll => vec-strict-cmp-512.ll} (100%) create mode 100644 llvm/test/CodeGen/X86/vec-strict-cmp-sub128.ll create mode 100644 llvm/test/TableGen/DefaultOpsGlobalISel.td -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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