Tcwg-commits July 2022

tcwg-commits@lists.linaro.org

6 participants
15101 discussions

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig updated (ba45b82518 -> 8e9398e3b1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig in repository toolchain/ci/qemu. from ba45b82518 Merge tag 'bsd-user-syscall-2022q2b-pull-request' of ssh://g [...] adds 4e245a9e26 target/riscv: Remove condition guarding register zero for au [...] adds b97028b8c5 target/riscv: Set env->bins in gen_exception_illegal adds 5dacdbaeaf target/riscv: Remove generate_exception_mtval adds a9814e3e08 target/riscv: Minimize the calls to decode_save_opc adds 2e98339918 target/riscv/pmp: guard against PMP ranges with a negative size adds 562009e47c target/riscv: Fix PMU CSR predicate function adds a5a92fd6ef target/riscv: Implement PMU CSR predicate function for S-mode adds d3be1299fb target/riscv: pmu: Rename the counters extension to pmu adds 18d6d89efc target/riscv: pmu: Make number of counters configurable adds b1675eeb3e target/riscv: Implement mcountinhibit CSR adds 621f35bb2f target/riscv: Add support for hpmcounters/hpmevents adds 3780e33732 target/riscv: Support mcycle/minstret write operation adds b509caceaa target/riscv: Fixup MSECCFG minimum priv check adds be2265c776 target/riscv: Ibex: Support priv version 1.11 adds 188000952c target/riscv: Don't force update priv spec version to latest adds ec2c62dacc hw/riscv: boot: Reduce FDT address alignment constraints adds 598ca83706 target/riscv: Set minumum priv spec version for mcountinhibit adds df01af337f target/riscv: Remove CSRs that set/clear an IMSIC interrupt [...] adds 435774992e target/riscv: Update default priority table for local interrupts adds e8e86b484e Merge tag 'pull-riscv-to-apply-20220703-1' of github.com:ali [...] adds 8e72ceee5c Rename docs/specs/fw_cfg.txt to .rst adds 701caa3d6a Convert fw_cfg.rst to reStructuredText syntax adds 839a482695 ui/console: allow display device to be labeled with given id adds 8c0d80245f ui/cocoa: Fix clipboard text release adds ada270cd18 hw/usb/canokey: Fix CCID ZLP adds 1042563027 hw/usb/canokey: fix compatibility of qemu-xhci adds 8607b5149e docs/system/devices/usb/canokey: remove limitations on qemu-xhci adds 927b968d1b hw: canokey: Remove HS support as not compliant to the spec adds dfe2382f06 Merge tag 'kraxel-20220704-pull-request' of https://gitlab.c [...] adds 070f735333 linux-user: Add LoongArch generic header files adds 9d5cd6587a linux-user: Add LoongArch signal support adds 3418fe25fa linux-user: Add LoongArch elf support adds 1f63019632 linux-user: Add LoongArch syscall support adds da8c70ea82 linux-user: Add LoongArch cpu_loop support adds 0caebb9160 scripts: add loongarch64 binfmt config adds fffca8f227 target/loongarch: remove badaddr from CPULoongArch adds 7d552f0e0a target/loongarch: Fix missing update CSR_BADV adds 7fe7eea6ff target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong e [...] adds 9bc92b5013 target/loongarch: remove unused include hw/loader.h adds 0093b9a5ee target/loongarch: Adjust functions and structure to support [...] adds d32688ecdb default-configs: Add loongarch linux-user support adds 227e73c986 target/loongarch: Update README adds 490c03ab11 hw/intc/loongarch_pch_msi: Fix msi vector convertion adds 4f2c65877c hw/rtc/ls7a_rtc: Fix uninitialied bugs and toymatch writing [...] adds df11f3ea69 hw/rtc/ls7a_rtc: Fix timer call back function adds 53a5eb2e7a hw/rtc/ls7a_rtc: Remove unimplemented device in realized function adds e5c0367e2b hw/rtc/ls7a_rtc: Add reset function adds 6935f132e5 hw/rtc/ls7a_rtc: Fix rtc enable and disable function adds 582788c3fb hw/rtc/ls7a_rtc: Use tm struct pointer as arguments in toy_t [...] adds 59e52dcff7 hw/rtc/ls7a_rtc: Fix 'calculate' spelling errors adds 4623367697 target/loongarch: Fix the meaning of ECFG reg's VS field adds eb1e9ff8bb target/loongarch: Add lock when writing timer clear reg adds 1437479e5e Merge tag 'pull-la-20220704' of https://gitlab.com/rth7680/q [...] adds c1ca312a6f hw/rtc/ls7a_rtc: Drop unused inline functions adds 3517fb7267 target/loongarch: Clean up tlb when cpu reset adds f8d1ae8262 scripts/qemu-binfmt-conf: Add LoongArch to qemu_get_family() adds 0df0a66555 tcg/tci: Remove CONFIG_DEBUG_TCG_INTERPRETER adds ddf9326184 hw/intc/loongarch_ipi: Fix ipi device access of 64bits adds bf7ce37f8f hw/intc/loongarch_ipi: Fix mail send and any send function adds 19361471b5 Merge tag 'pull-la-20220705' of https://gitlab.com/rth7680/q [...] adds 9323af2e81 tests: fix test-cutils leaks adds e0a2602070 tests/fp: Do not build softfloat3 tests if TCG is disabled adds 94b731874a gitlab: normalize indentation in edk2/opensbi rules adds 37a2b95231 gitlab: tweak comments in edk2/opensbi jobs adds 6e131bf69b gitlab: honour QEMU_CI variable in edk2/opensbi jobs adds 3a751770ee gitlab-ci: Extend timeout for ubuntu-20.04-s390x-all to 75m adds 276dfd03f0 tests: wait max 120 seconds for migration test status changes adds 8d4e897a99 tests: wait for migration completion before looking for STOP event adds 6843ad8c03 tests: increase migration test converge downtime to 30 seconds adds 886dfe9db3 tests: use consistent bandwidth/downtime limits in migration tests adds 2116650254 disas: Remove libvixl disassembler adds 6d17020a80 po: add ukrainian translation adds 1ec8c2c01e meson.build: Require a recent version of libpng adds 7a890b7566 include/qemu/host-utils: Remove unused code in the *_overflo [...] adds d82423a697 Merge tag 'pull-request-2022-07-05' of https://gitlab.com/th [...] adds be9c61da9f xen/pass-through: merge emulated bits correctly adds c0e86b7624 xen/pass-through: don't create needless register group adds 39e19f5f67 Merge tag 'pull-xen-20220705' of https://xenbits.xen.org/git [...] adds 034d00d485 e1000: set RX descriptor status in a separate operation adds a495eba03c ebpf: replace deprecated bpf_program__set_socket_filter adds 180c2f24d5 Merge tag 'net-pull-request' of https://github.com/jasowang/ [...] adds 23f0a6c80d m68k: use correct variable name in boot info string macro adds a988465d0e m68k: virt: pass RNG seed via bootinfo block adds 0e3723005b Merge tag 'm68k-for-7.1-pull-request' of https://github.com/ [...] adds 1c69cb4e75 ppc/pnv: move root port attach to pnv_phb4_realize() adds 8625164a38 ppc/pnv: attach phb3/phb4 root ports in QOM tree adds 792e8bb629 ppc/pnv: assign pnv-phb-root-port chassis/slot earlier adds da6be50136 ppc/pnv: make pnv_ics_get() use the chip8->phbs[] array adds ca45948991 ppc/pnv: make pnv_ics_resend() use chip8->phbs[] adds 8a69bca77a ppc/pnv: make pnv_chip_power8_pic_print_info() use chip8->phbs[] adds 71cd3e5ecb ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb3 root bus adds 21870aab36 ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb4 root bus adds 59f11543e2 target/ppc: Change FPSCR_* to follow POWER ISA numbering convention adds 31cc81f728 spapr/ddw: Reset DMA when the last non-default window is removed adds c0e765dafb spapr/ddw: Implement 64bit query extension adds e82ca8acdd target/ppc: use int128.h methods in vpmsumd adds 7ca0428687 target/ppc: use int128.h methods in vadduqm adds 896d92c81d target/ppc: use int128.h methods in vaddecuq and vaddeuqm adds 8290ea509f target/ppc: use int128.h methods in vaddcuq adds b132be53a4 target/ppc: use int128.h methods in vsubuqm adds e6a5ad43de target/ppc: use int128.h methods in vsubecuq and vsubeuqm adds b7d30fae5b target/ppc: use int128.h methods in vsubcuq adds 95444afcab ppc: Define SETFIELD for the ppc target adds 81b205cecf ppc/spapr: Implement H_WATCHDOG adds bbecdb22ae target/ppc: Fix insn32.decode style issues adds bf8adfd88b target/ppc: Move mffscrn[i] to decodetree adds 394c2e2fda target/ppc: Move mffsce to decodetree adds 3e5bce70ef target/ppc: Move mffsl to decodetree adds f80d04d548 target/ppc: Move mffs[.] to decodetree adds 6cef305fe7 target/ppc: Implement mffscdrn[i] instructions adds 7141a173c8 tests/tcg/ppc64: Add mffsce test adds 4dc5f8abdc target/ppc: Add flag for ISA v2.06 BCDA instructions adds 6addef4d27 target/ppc: implement addg6s adds 38d3690bda target/ppc: implement cbcdtd adds 6b924d4afc target/ppc: implement cdtbcd adds c7e89de132 target/ppc: Return default CPU for max CPU adds 7886605961 target/ppc/cpu-models: Remove the "default" CPU alias adds 0b83377f46 target/ppc: Fix MPC8555 and MPC8560 core type to e500v1 adds 8e9398e3b1 Merge tag 'pull-ppc-20220706' of https://gitlab.com/danielhb [...] No new revisions were added by this update. Summary of changes: .gitlab-ci.d/custom-runners/ubuntu-20.04-s390x.yml | 1 + .gitlab-ci.d/edk2.yml | 133 +- .gitlab-ci.d/opensbi.yml | 134 +- MAINTAINERS | 4 - configs/targets/loongarch64-linux-user.mak | 3 + disas.c | 3 - disas/arm-a64.cc | 101 - disas/libvixl/LICENCE | 30 - disas/libvixl/README | 11 - disas/libvixl/meson.build | 7 - disas/libvixl/vixl/a64/assembler-a64.h | 4624 -------------------- disas/libvixl/vixl/a64/constants-a64.h | 2116 --------- disas/libvixl/vixl/a64/cpu-a64.h | 83 - disas/libvixl/vixl/a64/decoder-a64.cc | 877 ---- disas/libvixl/vixl/a64/decoder-a64.h | 275 -- disas/libvixl/vixl/a64/disasm-a64.cc | 3495 --------------- disas/libvixl/vixl/a64/disasm-a64.h | 177 - disas/libvixl/vixl/a64/instructions-a64.cc | 622 --- disas/libvixl/vixl/a64/instructions-a64.h | 757 ---- disas/libvixl/vixl/code-buffer.h | 113 - disas/libvixl/vixl/compiler-intrinsics.cc | 144 - disas/libvixl/vixl/compiler-intrinsics.h | 155 - disas/libvixl/vixl/globals.h | 155 - disas/libvixl/vixl/invalset.h | 775 ---- disas/libvixl/vixl/platform.h | 39 - disas/libvixl/vixl/utils.cc | 142 - disas/libvixl/vixl/utils.h | 286 -- disas/meson.build | 5 - docs/specs/{fw_cfg.txt => fw_cfg.rst} | 211 +- docs/specs/index.rst | 1 + docs/system/devices/canokey.rst | 10 - ebpf/ebpf_rss.c | 2 +- hw/intc/loongarch_ipi.c | 92 +- hw/intc/loongarch_pch_msi.c | 22 +- hw/intc/pnv_xive.c | 20 - hw/intc/pnv_xive2.c | 20 - hw/loongarch/loongson3.c | 6 +- hw/m68k/bootinfo.h | 18 +- hw/m68k/virt.c | 7 + hw/net/e1000.c | 5 +- hw/pci-host/pnv_phb3.c | 22 +- hw/pci-host/pnv_phb4.c | 40 +- hw/pci-host/pnv_phb4_pec.c | 3 - hw/ppc/pnv.c | 102 +- hw/ppc/spapr.c | 4 + hw/ppc/spapr_iommu.c | 3 +- hw/ppc/spapr_pci.c | 6 +- hw/ppc/spapr_rtas_ddw.c | 34 +- hw/riscv/boot.c | 4 +- hw/rtc/ls7a_rtc.c | 154 +- hw/usb/canokey.c | 31 +- hw/watchdog/meson.build | 1 + hw/watchdog/spapr_watchdog.c | 274 ++ hw/watchdog/trace-events | 7 + hw/xen/xen_pt_config_init.c | 25 +- include/exec/poison.h | 2 - include/hw/intc/loongarch_ipi.h | 7 +- include/hw/intc/loongarch_pch_msi.h | 2 + include/hw/pci-host/pnv_phb3_regs.h | 16 - include/hw/ppc/pnv.h | 3 +- include/hw/ppc/spapr.h | 26 +- include/qemu/host-utils.h | 65 - include/standard-headers/asm-m68k/bootinfo-virt.h | 1 + include/ui/console.h | 1 + linux-user/elfload.c | 91 + linux-user/loongarch64/cpu_loop.c | 96 + linux-user/loongarch64/signal.c | 335 ++ linux-user/loongarch64/sockbits.h | 11 + linux-user/loongarch64/syscall_nr.h | 312 ++ linux-user/loongarch64/target_cpu.h | 34 + linux-user/loongarch64/target_elf.h | 12 + linux-user/loongarch64/target_errno_defs.h | 12 + linux-user/loongarch64/target_fcntl.h | 11 + linux-user/{arm => loongarch64}/target_prctl.h | 0 linux-user/loongarch64/target_resource.h | 11 + linux-user/loongarch64/target_signal.h | 13 + linux-user/loongarch64/target_structs.h | 11 + linux-user/loongarch64/target_syscall.h | 48 + linux-user/loongarch64/termbits.h | 11 + linux-user/syscall_defs.h | 6 +- meson.build | 6 +- po/LINGUAS | 1 + po/uk.po | 75 + scripts/clean-header-guards.pl | 4 +- scripts/clean-includes | 2 +- scripts/coverity-scan/COMPONENTS.md | 3 - scripts/gensyscalls.sh | 2 + scripts/qemu-binfmt-conf.sh | 9 +- target/arm/cpu.c | 7 - target/loongarch/README | 39 +- target/loongarch/cpu.c | 39 +- target/loongarch/cpu.h | 8 +- target/loongarch/csr_helper.c | 2 + target/loongarch/gdbstub.c | 2 +- target/loongarch/helper.h | 2 + target/loongarch/insn_trans/trans_privileged.c.inc | 36 + target/loongarch/internals.h | 2 + target/loongarch/op_helper.c | 10 +- target/ppc/cpu-models.c | 17 +- target/ppc/cpu-models.h | 14 +- target/ppc/cpu.h | 89 +- target/ppc/cpu_init.c | 29 +- target/ppc/dfp_helper.c | 65 + target/ppc/helper.h | 20 +- target/ppc/insn32.decode | 71 +- target/ppc/int_helper.c | 229 +- target/ppc/internal.h | 3 - target/ppc/translate/fixedpoint-impl.c.inc | 51 + target/ppc/translate/fp-impl.c.inc | 203 +- target/ppc/translate/fp-ops.c.inc | 9 - target/ppc/translate/vmx-impl.c.inc | 32 +- target/ppc/translate/vmx-ops.c.inc | 9 +- target/riscv/cpu.c | 17 +- target/riscv/cpu.h | 24 +- target/riscv/cpu_bits.h | 30 +- target/riscv/cpu_helper.c | 134 +- target/riscv/csr.c | 857 ++-- target/riscv/insn_trans/trans_privileged.c.inc | 4 + target/riscv/insn_trans/trans_rvh.c.inc | 2 + target/riscv/insn_trans/trans_rvi.c.inc | 10 +- target/riscv/machine.c | 25 + target/riscv/meson.build | 3 +- target/riscv/pmp.c | 3 + target/riscv/pmu.c | 32 + target/riscv/pmu.h | 28 + target/riscv/translate.c | 31 +- tcg/tci/tcg-target.c.inc | 7 - tcg/tci/tcg-target.h | 5 - tests/fp/meson.build | 3 + tests/qtest/migration-helpers.c | 14 + tests/qtest/migration-test.c | 59 +- tests/tcg/ppc64/Makefile.target | 1 + tests/tcg/ppc64le/Makefile.target | 1 + tests/tcg/ppc64le/mffsce.c | 37 + tests/tcg/riscv64/Makefile.softmmu-target | 21 + tests/tcg/riscv64/issue1060.S | 53 + tests/tcg/riscv64/semihost.ld | 21 + tests/unit/test-cutils.c | 42 +- ui/cocoa.m | 4 +- ui/console.c | 41 +- 140 files changed, 3579 insertions(+), 16548 deletions(-) create mode 100644 configs/targets/loongarch64-linux-user.mak delete mode 100644 disas/arm-a64.cc delete mode 100644 disas/libvixl/LICENCE delete mode 100644 disas/libvixl/README delete mode 100644 disas/libvixl/meson.build delete mode 100644 disas/libvixl/vixl/a64/assembler-a64.h delete mode 100644 disas/libvixl/vixl/a64/constants-a64.h delete mode 100644 disas/libvixl/vixl/a64/cpu-a64.h delete mode 100644 disas/libvixl/vixl/a64/decoder-a64.cc delete mode 100644 disas/libvixl/vixl/a64/decoder-a64.h delete mode 100644 disas/libvixl/vixl/a64/disasm-a64.cc delete mode 100644 disas/libvixl/vixl/a64/disasm-a64.h delete mode 100644 disas/libvixl/vixl/a64/instructions-a64.cc delete mode 100644 disas/libvixl/vixl/a64/instructions-a64.h delete mode 100644 disas/libvixl/vixl/code-buffer.h delete mode 100644 disas/libvixl/vixl/compiler-intrinsics.cc delete mode 100644 disas/libvixl/vixl/compiler-intrinsics.h delete mode 100644 disas/libvixl/vixl/globals.h delete mode 100644 disas/libvixl/vixl/invalset.h delete mode 100644 disas/libvixl/vixl/platform.h delete mode 100644 disas/libvixl/vixl/utils.cc delete mode 100644 disas/libvixl/vixl/utils.h rename docs/specs/{fw_cfg.txt => fw_cfg.rst} (58%) create mode 100644 hw/watchdog/spapr_watchdog.c create mode 100644 linux-user/loongarch64/cpu_loop.c create mode 100644 linux-user/loongarch64/signal.c create mode 100644 linux-user/loongarch64/sockbits.h create mode 100644 linux-user/loongarch64/syscall_nr.h create mode 100644 linux-user/loongarch64/target_cpu.h create mode 100644 linux-user/loongarch64/target_elf.h create mode 100644 linux-user/loongarch64/target_errno_defs.h create mode 100644 linux-user/loongarch64/target_fcntl.h copy linux-user/{arm => loongarch64}/target_prctl.h (100%) create mode 100644 linux-user/loongarch64/target_resource.h create mode 100644 linux-user/loongarch64/target_signal.h create mode 100644 linux-user/loongarch64/target_structs.h create mode 100644 linux-user/loongarch64/target_syscall.h create mode 100644 linux-user/loongarch64/termbits.h create mode 100644 po/uk.po create mode 100644 target/riscv/pmu.c create mode 100644 target/riscv/pmu.h create mode 100644 tests/tcg/ppc64le/mffsce.c create mode 100644 tests/tcg/riscv64/Makefile.softmmu-target create mode 100644 tests/tcg/riscv64/issue1060.S create mode 100644 tests/tcg/riscv64/semihost.ld -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 1 month

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig updated (69cb6c6556ad -> 9f09069cde34)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig in repository toolchain/ci/linux. from 69cb6c6556ad Merge tag 'nfsd-5.19-2' of git://git.kernel.org/pub/scm/li [...] adds 7cf2b0f9611b xfs: bound maximum wait time for inodegc work adds 5e672cd69f0a xfs: introduce xfs_inodegc_push() adds ca76a761ea24 xfs: factor out the common lock flags assert adds 82af88063961 xfs: use invalidate_lock to check the state of mmap_lock adds b822ea17fd15 xfs: always free xattri_leaf_bp when cancelling a deferred op adds f94e08b602d4 xfs: clean up the end of xfs_attri_item_recover adds 7be3bd8856fb xfs: empty xattr leaf header blocks are not corruption adds e53bcffad032 xfs: don't hold xattr leaf buffers across transaction rolls adds 8944c6fb8add xfs: dont treat rt extents beyond EOF as eofblocks to be cleared adds 7561cea5dbb9 xfs: prevent a UAF when log IO errors race with unmount adds 20855e4cb361 Merge tag 'xfs-5.19-fixes-4' of git://git.kernel.org/pub/s [...] adds 4a557a5d1a61 sparse: introduce conditional lock acquire function attribute adds b8d5109f5096 lockref: remove unused 'lockref_get_or_lock()' function adds 88084a3df167 Linux 5.19-rc5 adds 620f83b8326c soc: ixp4xx/npe: Fix unused match warning adds ddc980da8043 ARM: at91: pm: use proper compatible for sama5d2's rtc adds 641522665dbb ARM: at91: pm: use proper compatibles for sam9x60's rtc and rtt adds 1c40169b35ad ARM: at91: pm: use proper compatibles for sama7g5's rtc and rtt adds f2cbbc3f9263 ARM: dts: at91: sam9x60ek: fix eeprom compatible and size adds 416ce193d73a ARM: dts: at91: sama5d2_icp: fix eeprom compatibles adds 35074df65a8d ARM: at91: fix soc detection for SAM9X60 SiPs adds 91d60e259c0f ARM: at91: pm: Mark at91_pm_secure_init as __init adds a38dbb4f2028 Merge tag 'at91-fixes-5.19' of git://git.kernel.org/pub/sc [...] adds a1016ba9f908 ARM: dts: imx7d-smegw01: Fix the SDIO description adds 3fdd4ef444f9 arm64: dts: imx8mp: correct clock of pgc_ispdwp adds b10ef5f2ddb3 ARM: mxs_defconfig: Enable the framebuffer adds 01785f1f1565 arm64: dts: imx8mp-evk: correct mmc pad settings adds 2d4fb72b6812 arm64: dts: imx8mp-evk: correct the uart2 pinctl value adds b838582ab8d5 arm64: dts: imx8mp-evk: correct gpio-led pad settings adds e2c00820a99c arm64: dts: imx8mp-evk: correct vbus pad settings adds e6e1bc0ec9e8 arm64: dts: imx8mp-evk: correct eqos pad settings adds 95587ecfcf25 arm64: dts: imx8mp-evk: correct vbus pad settings adds 8c214b78e149 arm64: dts: imx8mp-evk: correct I2C5 pad settings adds 05a7f43478e8 arm64: dts: imx8mp-evk: correct I2C1 pad settings adds 0836de513eba arm64: dts: imx8mp-evk: correct I2C3 pad settings adds 843af59e5770 arm64: dts: imx8mp-venice-gw74xx: correct pad settings adds e266c155bd88 arm64: dts: imx8mp-phyboard-pollux-rdk: correct uart pad settings adds bae4de618efe arm64: dts: imx8mp-phyboard-pollux-rdk: correct eqos pad settings adds 242d8ee91111 arm64: dts: imx8mp-phyboard-pollux-rdk: correct i2c2 & mmc [...] adds 8630354f42be arm64: dts: imx8mp-icore-mx8mp-edim2.2: correct pad settings adds 1f66f63c7312 Merge tag 'imx-fixes-5.19-2' of git://git.kernel.org/pub/s [...] adds 754f04cac362 firmware: arm_scmi: Relax CLOCK_DESCRIBE_RATES out-of-spec checks adds 75c8f430d859 firmware: arm_scmi: Fix response size warning for OPTEE transport adds 4ce7e51dc712 firmware: arm_scmi: Remove usage of the deprecated ida_sim [...] adds d95ce66d4cc3 Merge tag 'scmi-fixes-5.19-2' of git://git.kernel.org/pub/ [...] adds 34d2cd3fccce ARM: meson: Fix refcount leak in meson_smp_prepare_cpus adds f99d621133ef Merge tag 'amlogic-arm-for-v5.20' of git://git.kernel.org/ [...] adds 372b2aee9702 arm64: dts: qcom: Remove duplicate sc7180-trogdor include [...] adds de9b3d961607 arm64: dts: qcom: sm8450: fix interconnects property of UFS node adds 47bf59c47559 arm64: dts: qcom: msm8994: Fix CPU6/7 reg values adds fc8b0b9b630d arm64: dts: qcom: sm8450 add ITS device tree node adds 3ba500dee327 arm64: dts: qcom: sdm845: use dispcc AHB clock for mdss node adds d640974d1c4e MAINTAINERS: Add myself as a reviewer for Qualcomm ARM/64 support adds 5fb779558f1c arm64: dts: qcom: msm8992-*: Fix vdd_lvs1_2-supply typo adds 7ecd8a7af36e Merge tag 'qcom-arm64-fixes-for-5.19' of git://git.kernel. [...] adds 0ec29ccf94eb soc: qcom: smem: use correct format characters adds a34b42f8690c ARM: dts: stm32: fix pwr regulators references to use scmi adds 78ece8cce1ba ARM: dts: stm32: use the correct clock source for CEC on s [...] adds cfd7ea394cd3 ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 [...] adds bf74181e75c9 ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI adds 1d0c1aadf1fd ARM: dts: stm32: add missing usbh clock and fix clk order [...] adds c0d1a7bd6574 Merge tag 'stm32-dt-for-v5.19-fixes-2' of git://git.kernel [...] adds c1084b6c5620 Merge tag 'soc-fixes-5.19-2' of git://git.kernel.org/pub/s [...] adds 2f446ffe9d73 xen/blkfront: fix leaking data in shared pages adds 307c8de2b023 xen/netfront: fix leaking data in shared pages adds 4491001c2e0f xen/netfront: force data bouncing when backend is untrusted adds 2400617da7ee xen/blkfront: force data bouncing when backend is untrusted adds f63c2c2032c2 xen-netfront: restore __skb_queue_tail() positioning in xe [...] adds b75cd218274e xen/arm: Fix race in RB-tree based P2M accounting adds e35e5b6f695d Merge tag 'xsa-5.19-tag' of git://git.kernel.org/pub/scm/l [...] adds ae8b1631561a ALSA: usb-audio: Workarounds for Behringer UMC 204/404 HD adds 6e2c9105e0b7 ALSA: usb-audio: Add quirks for MacroSilicon MS2100/MS2106 [...] adds 11bea26929a1 ALSA: hda/realtek: Add quirk for Clevo L140PU adds 4fb7c24f69c4 ALSA: usb-audio: Add quirk for Fiero SC-01 adds 2307a0e1ca0b ALSA: usb-audio: Add quirk for Fiero SC-01 (fw v1.0.0) adds 073350da0aa2 Merge tag 'v5.19-rc1' into asoc-5.19 adds 5871321fb455 ASoC: ops: Fix off by one in range control validation adds ac63716da307 ASoC: Realtek/Maxim SoundWire codecs: disable pm_runtime o [...] adds ed0a7fb29c9f ASoC: rt711-sdca-sdw: fix calibrate mutex initialization adds fe154c4ff376 ASoC: Intel: sof_sdw: handle errors on card registration adds 08bb5dc6ce02 ASoC: rt711: fix calibrate mutex initialization adds 0484271ab0ce ASoC: rt7*-sdw: harden jack_detect_handler adds ba98d7d8b60b ASoC: codecs: rt700/rt711/rt711-sdca: initialize workqueue [...] adds 40737057b48f ASoC: codecs: rt700/rt711/rt711-sdca: resume bus/codec in [...] adds ed0073bd0fcc ASoC: ak4613: cares Simple-Audio-Card case for TDM adds 08f8a93198e3 ASoC: SOF: Intel: hda-dsp: Expose hda_dsp_core_power_up() adds c31691e0d126 ASoC: SOF: Intel: hda-loader: Make sure that the fw load s [...] adds bbfef046c661 ASoC: SOF: Intel: hda-loader: Clarify the cl_dsp_init() flow adds c2d1aec3f5da ASoC: SOF: ipc3-topology: Move and correct size checks in [...] adds af2d146a8041 ASoC: Intel: avs: Fix parsing UUIDs in topology adds 12abc4d10d55 ASoC: Remove unused hw_write_t type adds 58136d93d4e2 ASoC: qdsp6: q6apm-dai: unprepare stream if its already prepared adds be6dd72edb21 ASoC: wcd9335: Remove RX channel from old list before addi [...] adds a7786cbae4b2 ASoC: wcd9335: Fix spurious event generation adds 10e7ff004792 ASoC: wcd938x: Fix event generation for some controls adds a7d9391dc3d5 MAINTAINERS: update ASoC/Intel/SOF maintainers adds 4e07479eab8a ASoC: Intel: bytcr_wm5102: Fix GPIO related probe-ordering [...] adds 427eb3e1ed53 ASoC: SOF: mediatek: Fix error code in probe adds ca7ab1dcf58d ASoC: SOF: Intel: hda: Fix compressed stream position tracking adds a933084558c6 ASoC: SOF: pm: add explicit behavior for ACPI S1 and S2 adds 9d2d46271338 ASoC: SOF: pm: add definitions for S4 and S5 states adds 391153522d18 ASoC: SOF: Intel: disable IMR boot when resuming from ACPI [...] adds a5450aba737d ASoC: rockchip: i2s: switch BCLK to GPIO adds f2c2f31f00ce MAINTAINERS: update ASoC Qualcomm maintainer email-id adds 9896c029f0df ASoC: wm_adsp: Fix event for preloader adds 0bc0ae9a5938 ASoC: wm5110: Fix DRE control adds c6a5f22f9b4f ASoC: cs35l41: Correct some control names adds 1df793d479be ASoC: rt711-sdca: fix kernel NULL pointer dereference when [...] adds 11d7a12f7f50 ASoC: dapm: Initialise kcontrol data for mux/demux controls adds 46b0d050c8c7 ASoC: cs35l41: Add ASP TX3/4 source to register patch adds 7f103af4a10f ASoC: cs47l15: Fix event generation for low power mux control adds e3cabbef3db8 ASoC: madera: Fix event generation for OUT1 demux adds 980555e95f7c ASoC: madera: Fix event generation for rate controls adds dd84cfff3cc3 Merge tag 'asoc-fix-v5.19-rc3' of https://git.kernel.org/p [...] adds c5e58c4545a6 ALSA: cs46xx: Fix missing snd_card_free() call at probe error adds c3850b3f975f Merge tag 'sound-5.19-rc6' of git://git.kernel.org/pub/scm [...] adds 8520501346ed irqchip: or1k-pic: Undefine mask_ack for level triggered hardware adds 48bddb89d59e openrisc: unwinder: Fix grammar issue in comment adds 9f09069cde34 Merge tag 'for-linus' of https://github.com/openrisc/linux No new revisions were added by this update. Summary of changes: MAINTAINERS | 12 +- Makefile | 2 +- arch/arm/boot/dts/at91-sam9x60ek.dts | 3 +- arch/arm/boot/dts/at91-sama5d2_icp.dts | 6 +- arch/arm/boot/dts/imx7d-smegw01.dts | 4 +- arch/arm/boot/dts/stm32mp15-scmi.dtsi | 58 +++++ arch/arm/boot/dts/stm32mp151.dtsi | 6 +- arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts | 4 + arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts | 1 + arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts | 4 + arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts | 1 + arch/arm/configs/mxs_defconfig | 1 + arch/arm/mach-at91/pm.c | 12 +- arch/arm/mach-meson/platsmp.c | 2 + arch/arm/xen/p2m.c | 6 +- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 88 ++++---- .../dts/freescale/imx8mp-icore-mx8mp-edimm2.2.dts | 40 ++-- .../dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 48 ++-- .../boot/dts/freescale/imx8mp-venice-gw74xx.dts | 116 +++++----- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +- arch/arm64/boot/dts/qcom/msm8992-lg-bullhead.dtsi | 2 +- arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts | 2 +- arch/arm64/boot/dts/qcom/msm8994.dtsi | 4 +- .../boot/dts/qcom/sc7180-trogdor-homestar.dtsi | 2 +- arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8450.dtsi | 14 +- arch/openrisc/kernel/unwinder.c | 2 +- drivers/block/xen-blkfront.c | 54 +++-- drivers/firmware/arm_scmi/bus.c | 6 +- drivers/firmware/arm_scmi/clock.c | 26 ++- drivers/firmware/arm_scmi/driver.c | 1 + drivers/firmware/arm_scmi/optee.c | 7 +- drivers/firmware/arm_scmi/protocols.h | 3 + drivers/irqchip/irq-or1k-pic.c | 1 - drivers/net/xen-netfront.c | 56 ++++- drivers/soc/atmel/soc.c | 12 +- drivers/soc/ixp4xx/ixp4xx-npe.c | 2 +- drivers/soc/qcom/smem.c | 6 +- fs/xfs/libxfs/xfs_attr.c | 38 +--- fs/xfs/libxfs/xfs_attr.h | 5 - fs/xfs/libxfs/xfs_attr_leaf.c | 35 +-- fs/xfs/libxfs/xfs_attr_leaf.h | 3 +- fs/xfs/xfs_attr_item.c | 27 ++- fs/xfs/xfs_bmap_util.c | 2 + fs/xfs/xfs_icache.c | 56 +++-- fs/xfs/xfs_icache.h | 1 + fs/xfs/xfs_inode.c | 64 +++--- fs/xfs/xfs_log.c | 9 +- fs/xfs/xfs_mount.h | 2 +- fs/xfs/xfs_qm_syscalls.c | 9 +- fs/xfs/xfs_super.c | 9 +- fs/xfs/xfs_trace.h | 1 + include/linux/compiler_types.h | 2 + include/linux/lockref.h | 1 - include/linux/refcount.h | 6 +- include/sound/soc.h | 2 - lib/lockref.c | 25 --- sound/pci/cs46xx/cs46xx.c | 22 +- sound/pci/hda/patch_realtek.c | 1 + sound/soc/codecs/ak4613.c | 6 +- sound/soc/codecs/cs35l41-lib.c | 10 +- sound/soc/codecs/cs35l41.c | 12 +- sound/soc/codecs/cs47l15.c | 5 +- sound/soc/codecs/madera.c | 14 +- sound/soc/codecs/max98373-sdw.c | 12 +- sound/soc/codecs/rt1308-sdw.c | 11 + sound/soc/codecs/rt1316-sdw.c | 11 + sound/soc/codecs/rt5682-sdw.c | 5 +- sound/soc/codecs/rt700-sdw.c | 6 +- sound/soc/codecs/rt700.c | 30 ++- sound/soc/codecs/rt711-sdca-sdw.c | 9 +- sound/soc/codecs/rt711-sdca.c | 44 ++-- sound/soc/codecs/rt711-sdw.c | 9 +- sound/soc/codecs/rt711.c | 40 ++-- sound/soc/codecs/rt715-sdca-sdw.c | 12 + sound/soc/codecs/rt715-sdw.c | 12 + sound/soc/codecs/wcd9335.c | 8 +- sound/soc/codecs/wcd938x.c | 12 + sound/soc/codecs/wm5110.c | 8 +- sound/soc/codecs/wm_adsp.c | 2 +- sound/soc/intel/avs/topology.c | 4 +- sound/soc/intel/boards/bytcr_wm5102.c | 13 +- sound/soc/intel/boards/sof_sdw.c | 51 +++-- sound/soc/qcom/qdsp6/q6apm-dai.c | 6 + sound/soc/rockchip/rockchip_i2s.c | 160 ++++++++++--- sound/soc/soc-dapm.c | 5 + sound/soc/soc-ops.c | 4 +- sound/soc/sof/intel/hda-dsp.c | 10 +- sound/soc/sof/intel/hda-loader.c | 13 +- sound/soc/sof/intel/hda-pcm.c | 74 +----- sound/soc/sof/intel/hda-stream.c | 94 +++++++- sound/soc/sof/intel/hda.h | 4 + sound/soc/sof/ipc3-topology.c | 23 +- sound/soc/sof/mediatek/mt8186/mt8186.c | 2 +- sound/soc/sof/pm.c | 21 +- sound/soc/sof/sof-priv.h | 2 + sound/usb/quirks-table.h | 248 +++++++++++++++++++++ sound/usb/quirks.c | 13 ++ 99 files changed, 1342 insertions(+), 623 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 1 month

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig updated (5148c685e3bb -> 9cb00e7133ea)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig in repository toolchain/ci/llvm-project. from 5148c685e3bb [mlir][complex] Inverse canonicalization between exp and log adds 7788b0c09754 [lsan] malloc_usable_size returns 0 for nullptr adds 7e4ab9d5b8b8 [RISCV] Add more SHXADD isel patterns. adds 1ecfc12b0c67 [Bazel] Make `builtin_headers_gen` as subset of CMake's `c [...] adds f7819ce166bc [FPEnv] Allow CompoundStmt to keep FP options adds 8679cbc29fb7 Reland "[NFC] Add a missing test for for clang-repl" adds 022bd92c78ed [LowerMatrixMultiplication] Switch dummy values from undef [...] adds 6956840b5c00 Revert "Reland "[NFC] Add a missing test for for clang-repl"" adds 0f45eaf0da1f [RISCV] Add a scavenge spill slot when use ADDI to compute [...] adds 53dc0f107877 [NFC] Switch a few uses of undef to poison as placeholders [...] adds d100a30a5406 [AArch64] Regenerate more tests. NFC adds d71a8bb157ea [MLIR][Affine] Allow affine-expr on RHS in IntegerSet adds 13d58ff9f373 [RISCV] Replace call to APInt::countTrailingZeros with uin [...] adds 2aea8af25136 [libc++] Make _LIBCPP_DEBUG_RANDOMIZE_RANGE a function adds e1f61d864214 [gn build] Port 2aea8af25136 adds c1c3134ac422 [InstCombine] add tests for and-of-negated-lowbitmask; NFC adds f9f40aa10d98 [InstCombine] fold negated low-bit-mask to cmp+select adds b1f0efc06acc [clang-format] Tweak help text a bit adds 134363208b92 [clang] Fix gcc-6 compilation error. (NFC) adds a65a3bffd31f [clang-tidy] Don't treat invalid branches as identical adds f7a80c3d08d4 [clang-tidy] Properly forward clang-tidy output when runni [...] adds 2c3784cff859 [SCEV] recognize llvm.annotation intrinsic adds e98e13ac8f38 [mlir][Vector] Fold ShuffleOp(SplatOp(X), SplatOp(X)) to S [...] adds d2a35e4d39fe [AIX] Handling the label alignment of a global variable wi [...] adds 93d6fdfc232c [Driver] Ignore the clang modules validation-related flags [...] adds 8eb4dcb73747 [RISCV] Move some SHXADD matching cases into a ComplexPatt [...] adds d36e09cfe591 [RISCV] Add more SHXADD patterns. adds 1063dfc02853 [mlir][openmp] Added omp.taskloop adds 7283f48a05de [IR] Remove support for insertvalue constant expression adds b4694229aa9d [LV] Simplify setDebugLocFromInst by using early exit (NFC). adds f0089fae1d7e [AArch64] Add additional tests for D120481. adds 7fbf55c927f2 [mlir][Tensor] Move ParallelInsertSlice to the tensor dialect adds 9604601c9394 [SimplifyCFG] Remove redundant checks for hoisting (NFCI) adds 4887d047a31f [libc++][NFC] Replace enable_if with __enable_if_t in a fe [...] adds 04f6bf482b86 Revise outdated parts of the developer policy. adds 5f0a054f8954 [pseudo] Remove duplicated code in ClangPseudo.cpp adds c9fb3c6ea6cc [mlir][Tensor] Update ParallelInsertSlicOp semantics to ma [...] adds f4dd977537dc [AST] Use canonical constraint declaration for ASTContext: [...] adds 42f5b0509ded [mlir][NFC] Fix various warnings generated by GCC 9 adds cce64e7a9cba [DAG] visitTRUNCATE - move GetDemandedBits AFTER SimplifyD [...] adds f90f0e8fe7f5 [AMDGPU][GFX10][DOC][NFC] Update assembler syntax description adds bf89d24f5319 [AArch64] NFC: Move safe predicate casting to a separate f [...] adds 740633ff08ff [flang] Add TODO for derived types with final procedure adds 4905bcac00e6 [ConstantFolding] Check return value of ConstantFoldInstOp [...] adds 8e70258b18ba [AMDGPUCodeGenPrepare] Check result of ConstantFoldBinaryO [...] adds 19a1e20b8a0f [VectorCombine] Improve shuffle select shuffle-of-shuffles adds 25607d143d1d [libc++] Implement `std::ranges::merge` adds 3912928aa891 [gn build] Port 25607d143d1d adds 32a76fc292d9 [SCEVExpander] Avoid ConstantExpr::get() (NFCI) adds 93cbdaef0455 [Reassociate] Avoid ConstantExpr::get() adds 2de05afc192d [SLP] Peek into loads when hitting the RecursionMaxDepth adds 2ab260eecfab [llvm-ar][test] Add additional MRI script testing adds 4e6c30c8354f [libc] Add a separate algorithm_test. adds d7697c175db9 [flang] Avoid segfault when defining op is not a fir::Convert adds f93cd56262d1 [BPI] Avoid ConstantExpr::get() adds aa78c5298ea3 Fix MLIR Python CMake bug causing duplicate sources target. adds 644a965c1efe [LV] Vectorize cases with larger number of RT checks, exec [...] adds c06d0b4d02ea [RISCV] Add ADDI instr for computing FrameIndex address adds c146af3f469a [LoopVectorize][NFC] Reinstate TTICapture workaround for gcc-6 adds 8471c6861992 [LTO] Update remark test after 644a965c1efef6. adds 89cb8cae606b [Bitcode] Use bitcode input for test (NFC) adds abbd684c02c7 [InstCombine] Avoid ConstantExpr::get() in phi binop fold adds 10ebaf76860e [SLP] add test for load combining + shuffling; NFC adds fdf505f3f223 [mlir][OpenMP] omp.task translation to LLVM IR adds 2bfca3561466 [X86] Disable combineVectorSizedSetCCEquality for soft float. adds 5785717e18d5 [AArch64] Add support for insert/extract for nxv1i1 types. adds 2fde26dfcabe [mlir][Linalg][NFC] Make getReassociationMapForFoldingUnit [...] adds 9eb657278611 [LV] Add back CantReorderMemOps remark. adds c3839c0b46a9 CombineContractBroadcast should not create dims unused in LHS+RHS adds bc70ba814dc1 Use add_llvm_install_targets for install-llvmlibc adds b37dafd5dc83 [pseudo] Store shift and goto actions in a compact structu [...] adds 12d26ce9b0ec [flang] Make code more homogenous in CodeGen adds 47bdf53a5dba [clang-format] Break on AfterColon only if not followed by [...] adds 1ab37d996ce3 [clang-format] Update documentation adds 2a82c15f63d4 [LV] Consider runtime checks profitable if scalar cost is zero. adds 623250b51139 [X86] Regenerate fold-tied-op.ll test checks adds a4e2c1f76295 [Orc][LLJIT] Use JITLink on RISC-V adds b6178ccfe852 [OffloadPackager] Use appropriate kind for LTO bitcode adds 4276d00b1253 [InstCombine] add helper function for sub-of-min/max folds; NFC adds 8ef053273abf [InstCombine] add tests for sub of smin/smax; NFC adds 142aca7741d5 [InstCombine] fold sub of min/max of sub with common operand adds b2b4c8721db0 [InstCombine] Make use of low zero bits to determine exact [...] adds 063500afc0b8 [RISCV][NFC] Merge the isolated decleration into foreach. adds 98c6a3c0c220 [NFC][ASTImporter] remove the unnecessary condition checks [...] adds 85318d328102 [NFC] Remove unused test inputs adds 939352b6ec31 [RISCV][Clang] Teach RISCVEmitter to generate BitCast for [...] adds 5b4851ed9113 [LoongArch] Add codegen support for load/store operations adds b940fe6fe2af [LoongArch] Add codegen support for conditional branches adds 3610d5f5d4c2 [LoongArch] Add initial support for function calls adds 0c01f42fad41 [llvm-objcopy] -O binary: align sh_offset for section chan [...] adds 3e01af093f92 [mlir] Add InferIntRangeInterface to gpu.launch adds 2028fe6fbca6 [lld-macho] Handle LOH_ARM64_ADRP_LDR_GOT optimization hints adds 4996e3f68315 [test] Check for more -fsanitize=array-bounds behavior adds 66790b70ea14 [RISCV] Rename some variables for clarity. NFC adds f27672924e36 [RISCV] Replace an explicit check with an assert. adds 7a550212e8ff [clang-tidy] Fix confusable identifiers interaction with D [...] adds b094c737cd85 [flang] Avoid opaque pointer issue with character array su [...] adds b69c75d53f8d Revert "[VectorCombine] Improve shuffle select shuffle-of- [...] adds 00927334df9a [libc++] Use __is_exactly_{input, forward}_iterator adds 0d0bd17fcfbd [libc++] Fix __split_buffer::__construct_at_end definition [...] adds 4de0680fbf4e Fix use of pointer arithmetic instead of iterators. adds df5c981be35a [mlir][Linalg] Add DropUnitDims support for tensor::Parall [...] adds 774fc6349093 [LV] Consider minimum vscale assmuption for RT check cost. adds dfb77f2e99a1 [LLD][ELF] Add FORCE_LLD_DIAGNOSTICS_CRASH to force LLD to crash adds 77b13a57a930 [AArch64][SME] Add SME addha/va intrinsics adds 00cb1c33ee2e [InstCombine] add negtive tests for (%x & C) == 0 -> %x u< [...] adds dc46ae6df5f7 [lldb] Add support to load object files from thin archives adds b6ad8cbb3575 [gn build] (manually) port dfb77f2e99a1 adds b66220f25aea [InstCombine] [NFC] use C.isNegatedPowerOf2() instead of ( [...] adds 220366d5b545 [gn build] (manually) port 6b3956e123db adds b43dd2f6c4a3 [InstCombine] improve fold for icmp_eq_and to icmp_ult adds 271b470f3f1a [IndVars] Precommit test with redundant FPToSI. adds f8e658ec9ff5 [OpenCL] Remove fast_ half geometric builtins adds f6fa9985900e Fix tests with non-default CLANG_DEFAULT_LINKER adds 1666f09933ee [ARM] Add Support for Cortex-M85 adds ba14e4d65cdd [LLDB] Disable TestGdbRemoteFork* for Arm/AArch64 Linux adds f03b876e7e95 Reland "Reland "[NFC] Add a missing test for for clang-repl"" adds 98e52e8bff52 [VE] Restructure eliminateFrameIndex adds 9ad38e5288a1 Revert "[VE] Restructure eliminateFrameIndex" adds 3897d3cf71ef [clang-tidy] By-pass portability issues in confusable-iden [...] adds bc366183a592 Correct XFAIL according to bot owner's advice adds da5a6b2bf574 [VE] Restructure eliminateFrameIndex adds 3b2496e8faae [LLDB] Skip TestTwoHitsOneActual.py on Arm/AArch64 Linux adds 989270628226 Updating office hours adds 3c043ab007a1 [MLIR][Affine] Allow `<=` in IntegerSet constraints adds b7b11091efd2 [LLDB] Fix decorator import in TestTwoHitsOneActual.py adds 04c5fed5e0c6 [NFC] Fix wrong comment. adds e6ff553979e8 [clang-extdef-mapping] Directly process .ast files adds 02ab87f54305 [SimplifyCFG] Add additional jump threading test (NFC) adds ebb78a95cede [LV] Remove stray dbgs() call after 774fc63490939. adds dc969061c68e [SimplifyCFG] Thread all predecessors with same value at once adds 9fbf1107cc76 [pseudo] Eliminate LRTable::Action. NFC adds 8cd79bc12c36 [AMDGPU][GlobalISel] Support register offsets for SMRDs. adds 4696a33dfaef [AMDGPU][NFC] Refine matching SMRD offsets. adds 70c0d92930b2 [pseudo] Use the prebuilt cxx grammar for the lit tests, NFC. adds 6e2058e58832 [Compiler-RT] Remove FlushViewOfFile call when unmapping [...] adds e4d1d0cc2c9c [SCEV] Fix isImpliedViaMerge() with values from previous i [...] adds b27d6ffe4e4a [RuntimeDyld] Fix R_AARCH64_TSTBR14 relocation adds d26344731128 [pseudo] Fix the build for the benchmark tool. adds d1af09ad9617 [AMDGPU] gfx11 Generate VOPD Instructions adds f10d271ae27f [clang][dataflow] Handle null pointers of type std::nullptr_t adds 935570b2ad80 [ConstExpr] Don't create div/rem expressions adds 9ab67cc8bfe7 [pseudo] Implement guard extension. adds cccc03df3c17 [gn build] Port d1af09ad9617 adds cc6462a475e2 [mlir][tensor][bufferize][NFC] Clean up test case adds 0483c91eee9e [AMDGPU] gfx11 CodeGen for new DPP instructions adds 6c3c5f8069d9 [mlir][memref] Improve type inference for rank-reducing subviews adds a4772cbaf0dc Revert "[SimplifyCFG] Thread branches on same condition in [...] adds fb0654ced388 [mlir][interfaces][NFC] Remove ViewLikeInterface::expandToRank adds 58809a1eb1af [mlir][memref][NFC] Silence compiler warnings adds c35a6454b1af [BUILD] Add missed CMakeLists.txt change from dfb77f2 adds 12fd00ee1777 [AMDGPU] Add patterns for GFX11 v_minmax and v_maxmin inst [...] adds ed3b040b54f4 [MLIR][Presburger] Rename attachments to identifiers in Pr [...] adds e7a0fa4df00c [DAG] foldAddSubOfSignBit - don't bother creating the new [...] adds 7068c843d254 [DAG] visitREM - use isAllOnesOrAllOnesSplat instead of is [...] adds 988d4f576fdf Revert "[mlir][sparse] add more unittest cases to sparse d [...] adds e70ea18e2fde [Assembler] Name globals in test (NFC) adds 5493f8fc59ca [VectorCombine] Improve shuffle select shuffle-of-shuffles adds 07b185ed8157 [Thumb2] Remove unneeded IR from MIR test (NFC) adds 4dbc2876cff2 [AMDGPU] GFX11 trivial NFC tweaks adds a2158374ba1a [mlir][LLVMIR] Apply CallOp/CallableInterface on suitable [...] adds b8dbc6ffea93 [HLSL] Add ExternalSemaSource & vector alias adds dbf6ab5ef9ae [LSR] Fix bug for optimizing unused IVs to final values adds 7b1ff859feaa [gn build] Port b8dbc6ffea93 adds 5d7fa481cf4d [analyzer] Do not emit redundant SymbolCasts adds 2df120784af4 [analyzer] Fix assertion in simplifySymbolCast adds f51c47d98791 Revert "[lldb/test] Don't use preexec_fn for launching inferiors" adds 3f58177d7ffa [llvm-lib] Ignore /NODEFAULTLIB flag adds 0bb1bf1b1761 [LinkerWrapper] Add AMDGPU specific options to the LLD invocation adds f2beca908d4e [mlir][tblgen] Consistently use `$_ctxt` instead of `$_ctx` adds b170d856a3a3 [SimplifyCFG] Skip hoisting common instructions that retur [...] adds a0468a56f09b [InstCombine] add tests for sqrt libcalls; NFC adds 1562b1dcb978 [InstCombine] avoid conflict between CHECK prefix and valu [...] adds 312116748890 [pseudo] Add error-recovery framework & brace-based recovery adds d27d0a673c64 [Libomptarget][NFC] Make Libomptarget use the LLVM naming [...] adds 1d27faa5fec0 [AMDGPU] NFC. Add a test of the error message for assembli [...] adds 3ff319c69047 [PowerPC] PPCTLSDynamicCall does not preserve LiveIntervals adds c15bcad2f9c3 [RISCV] Update PreprocessISelDAG to use RemoveDeadNodes. adds a1cd3f49b680 [RISCV] Use a switch statement in PreprocessISelDAG. NFC adds ac3e26bcffa2 [RISCV] Add more SHXADD tests. NFC adds 05130a6ba7d9 new clang-tidy checker for assignments within condition cl [...] adds 6bb17d7fac6d [gn build] Port 05130a6ba7d9 adds 40af95d80bcb [clang-tools-extra] Fix a link in ReleaseNotes.rst adds 5cca2ef3c35a [LLDB] Remove TestLoadUnload.py Arm/Linux Xfail decorator adds a6e63e35ede4 [NFC][HLSL] Add tests for vector alias. Remove dead code. adds bb9b30ffbe7c [LLDB] Remove TestLoadUnload.py Arm/Linux Xfail decorator adds f553287b5889 [RISCV][Driver] Add libm linking to `RISCVToolchain` for C++ adds 9b1cf2e2b2a8 Fix running orc-rt tests with LLVM_BUILD_EXTERNAL_COMPILER [...] adds b97013fd6097 [AArch64][GlobalISel] Add support for sret demotion. adds 43d5c4d5394e [OpenMP] add 4 custom APIs supporting MSVC OMP codegen adds ab9cdf09f4f0 [mlir:Parser] Don't use strings for the "ugly" form of Att [...] adds 088bb8a328e0 [RISCV] Add more SHXADD patterns where the input is (and ( [...] adds ea8b811bf800 [lldb/Core] Fix finite progress event reporting adds 18e4674ea6fe [Sanitizer][Darwin] Fix log-path_test.cpp adds 92edd74b37c7 Allow non-variadic functions to be attributed with `__attr [...] adds db3013d684dd [mlir] Silence warnings when building with Clang ToT adds 18f230a89aa2 [Clang] Silence warning when building with MSVC 2022 adds 0880b9d52620 [Clang][unittests] Silence trucation warning with MSVC 2022 adds cf74b7ec80a8 [mlir][Vector] Fold InsertOp(SplatOp(X), SplatOp(X)) to Sp [...] adds 8ccc7e0aa461 [WebAssembly][NFC] Refactor table handling in WebAssembly: [...] adds 4dc46a174bf7 Revert "[WebAssembly][NFC] Refactor table handling in WebA [...] adds 484b4f357980 [WebAssembly][NFC] Refactor table handling in WebAssembly: [...] adds 35155a071678 [BOLT] Change mutex implementation adds 8bc5e7ac519f [AMDGPU] Additional liveness tests for si-optimize-exec-ma [...] adds e0612c91cd16 [ELF] Optimize getInputSections. NFC adds 3decc2f04d63 [mlir][Bazel] Fix Bazel build after a2158374ba1a6f81f4cce3 [...] adds 5b1ec705904a [LoongArch] Support lowering FrameIndex adds 9936d732cd17 [PowerPC] Simplify test for PR33636 (NFC) adds c2d1d9f942a4 [LoongArch] Implement prologue/epilogue insertion adds 02b38ba8aa6e [ConstFold] Salvage some div/rem folding test (NFC) adds 11950efe0682 [ConstExpr] Remove div/rem constant expressions adds 8ee913d83b17 [IR] Remove Constant::canTrap() (NFC) adds 20741c74c501 [llvm][AArch64] Fix "+all" feature for sysreg aliases adds 1ed8b2930248 [LoopVectorizationLegality] Drop unused variable (NFC) adds bb84e5eeffd1 [SelectionDAGISel] Drop unused variable (NFC) adds 86bd7e2065c9 [NFC][AMDGPU] Cleanup the SIOptimizeExecMasking pass. adds 851447cb3254 [InstCombine] remove useless insertelement adds e0af05574175 [Docs] Add release note for ARM's new -mframe-chain option adds f96cb66d1931 [ValueTracking] Accept Instruction in isSafeToSpeculativel [...] adds 4270c9cd44f2 [lldb] Stop passing both i386 and i686 in parallel as arch [...] adds 53d5aceb7078 [LoongArch] Add LoongArch support to update_llc_test_checks adds cfb2b2292f73 [AMDGPU] Add a MIR test for D127781 adds d29215790f0f [LoongArch] Add codegen support for division operations adds 1ee533afd0a6 [AMDGPU] Move all -global-isel RUN lines into main test file adds 73440ca9f878 [mlir] Define proper DenseMapInfo for Interfaces adds 9f492a9ae5cf [MIPS] Fix the ASAN shadow offset hook for the N32 ABI adds 5d8077565e41 [MIPS] Resolve issues in building ASAN for N32 ABI adds 30b6c51f515e [ORC][ORC_RT][AArch64] Implement TLS descriptor in ELFNixP [...] adds 2040fde9097a [libc++] Prefer __has_builtin for detecting compiler-provi [...] adds d5a559d906b5 [libc++] default-construct moved-from test-iterators adds e5fdcfac1bbe [lldb][AArch64] Use "+all" feature for the disassembler adds 2c915e3b2627 [mlir][OpenMP] Add if clause to OpenMP simd construct adds 5b3247bf9f71 [tbaa] Handle base classes in struct tbaa adds 0a9eb870f5f8 [WebAssembly][NFC] Reuse the regClassToValType helper in W [...] adds ed0e20d5e8c5 [clangd] Support external throttler for preamble builds adds 7d8e2742d958 [pseudo] Define recovery strategy as grammar extension. adds 923b56e7ca96 [NFC] Add a TODO comment to apply nounwind attribute in al [...] adds 511a7eef937e [clangd] Fix tests after ed0e20d5e8c5d6c679d2c adds 20962c124069 [SimplifyCFG] Don't split predecessors of callbr terminator adds beec3e8cb1be [WebAssembly][NFC] Consolidate TargetRegisterClass=>COPY o [...] adds 2044e4c53ee8 [AMDGPU][GFX1030][DOC][NFC] Update assembler syntax description adds 10f6d61bf191 [Clang][NFC] fix typo adds 08e4fe6c6196 [X86] Add RDPRU instruction adds cf7502a1ebe6 [LICM] Check opt output in test (NFC) adds f8e026457e51 [gn build] Port 08e4fe6c6196 adds 1023ddaf7790 [LLVM] Add the support for fmax and fmin in atomicrmw instruction adds b5b6d3a41b4e [Debugify] Port verify-debuginfo-preserve to NewPM adds a18f843f075f [MLIR][Presburger] Support lexicographic max/min union of [...] adds b484cbbc682c [IndVars] Regenerate test checks (NFC) adds e7db82d701d0 [AArch64] NFC: Fix name mangling in sve-insert-vector.ll adds 95e08824faba [AArch64] Add support for various operations on nxv1i1 types. adds e3dc56805f10 [Clang] Add a warning on invalid UTF-8 in comments. adds ed8ef65f3d93 [stackmaps] Start legalizing live variable operands adds 0f49d9e8d0dd [RISCV] Add test coverage for vectorizer tailfolding adds e4613d8e1bda [LV] Remove unnecessary memory checks from recurrence test adds f5b5398ebf7d [JITLink][RISCV] Ignore R_RISCV_RELAX and check R_RISCV_ALIGN adds 5d4f6ce22990 [AArch64][SVE] Zero other lanes when doing OR reduction on [...] adds e7fa272bc6a6 [clangd] Fix missing key function in PreambleThrottler adds b9513a70e16a [RISCV] Autogen a vectorizer test for ease of update adds f8cbe3cdf024 [libc++] Implement ranges::remove{, _if} adds fbb51ac0ba10 [X86] LowerShift - lower some shuffles directly to X86ISD: [...] adds 83837a61981c [Clang][OpenMP] Enable floating-point operation for `atomi [...] adds 65001f5777db [LTO][ELF] Add selective --save-temps= option adds d34ce04f98c3 [CMake][Fuchsia] Install static libuwind adds ff87ee4dee9c [Metadata] Utilize the resizing capability of MDNodes in M [...] adds 23c2bedfd93c [flang] Establish a single source of target information fo [...] adds fb06dd3e8ca1 Revert "[Clang] Add a warning on invalid UTF-8 in comments." adds 8a668671a08f [gn build] Port f8cbe3cdf024 adds ea2182fedd9d [BOLT] Add runtime functions required by freestanding environment adds e0b520865026 [NFC] [DirectX] Prefix for intrinsics should be dx adds 548f3f906148 Update the status & add tests for some more C99 DRs adds 484b1aa611ca [llvm] [Debuginfod] Add cpp-httplib optional dependency. adds 96515df816eb [PowerPC] Fix the check for scalar MASS conversion adds 8cb5c82ad23b [libc++] Improves pragma system_header test. adds 8366e21ef176 [llvm] [Debuginfod] Add HTTP Server to Debuginfod library. adds 4722b5d1330a [clang] Correct the macOS version that supports aligned al [...] adds 4174f0ca618b [Clang] Add a warning on invalid UTF-8 in comments. adds 67d82b50cff5 [gn build] (manually) port e0b520865026 adds 8f83f8f999fb [gn build] (manually) port 484b1aa611ca adds 9ee97ce3b830 [libc++] Use ABI tags instead of internal linkage to provi [...] adds 6148c79a64ff [gn build] (manually) port 9ee97ce3b8305c5 adds d1c33c60f365 [gn build] Port 8366e21ef176 adds d34315e71adf Removing this test temporarily beacuse of a failure in x86_64 adds 696f53665dc5 [AsmPrinter] Fix bit pattern for i1 vectors. adds babef908cc13 [llvm] [Debuginfod] DebuginfodCollection and DebuginfodSer [...] adds fe06b9f02ccd Bringing back the test with the required target related to [...] adds 39ed08f8d452 try to fix build after babef908cc1 adds bf45e27a676d [Clang] Fix invalid utf-8 detection adds a60360f99a6c [clang][NFC] Re-generate CommandLineReference.rst adds a638648fef76 [clangd] add inlay hints for std::forward-ed parameter packs adds e9fe20dab39e Revert "[Clang] Add a warning on invalid UTF-8 in comments." adds 66ae1d60bb27 [mlir][sparse] fix windows build error adds 9ad64cf02031 [flang] Add semantics test for coshape function adds 6d8e2f1e5177 [mlir][sparse] implement simple reshaping (expand/collapse) adds 6f4773f06428 [RISCV] Add codegen coverage for get.active.lane.mask adds 71c9757474c3 [Bazel] Fixup to llvmorg-15-init-15618-ge0b520865026, s/dxil/dx/ adds 682604738122 [LV] Remove redundant checks from recurrence test. adds 3703f5132718 [Debuginfod] Try to fix shared library build after babef90 [...] adds a3ac6891f8c4 [libc++] Fix a few things in RangesAlgorithms.csv adds aeaca854d123 [LoongArch] Add codegen support for handling floating poin [...] adds 0508fd5935d9 [flang][runtime] Make ENDFILE work after non-advancing READ adds 715283aa1792 [flang] Cope with overflow in real MOD/MODULO adds 061df07389f3 [flang][runtime] Fix directed UP/DOWN rounding edge case f [...] adds 89a99ec900d5 [GVN] Bug fix to reportMayClobberedLoad remark adds 21007259dc95 [AArch64][GlobalISel] update the test case with update_mir [...] adds c0db2b75ac1c [mlir][tblgen] Reverting fatality of assemblyFormat with s [...] adds 6052025b5813 [flang] Add IsElementalProcedure() predicate adds 121798fdb556 [sanitizer] Fix dn_expand test adds ac77649951db [flang] Avoid spurious warnings in pedantic mode from FORM [...] adds 7c708adb4a14 [flang][runtime] Trim FORMATs echoed to error messages adds 7c23138f1b9a [libc][NFC] Make explicit casts adds 362240e09e9e [mlir][Math] Support fold PowFOp with constant dense. adds c45ec53e7b85 [SystemZ] [z/OS] Use assignCalleeSavedSpillSlots() to mark [...] adds 7137ebc4cef2 [Debug] [Coroutine] Adjust the scope and name for coroutine frame adds e3b4452e078c [Debug] [Coroutines] Get rid of DW_ATE_address adds 17d48c316956 [VPlan] Move remove dead recipes before merging regions. adds b45829dcdf47 [AArch64][GlobalISel] update the gisel test case adds 819a7f98cd6d [Debuginfod] Try to fix clang-ppc64le-rhel build adds 9a04710b57fe [NFC][sanitizer] Format dn_expand interceptor adds 9cb00e7133ea [AArch64] Clean up vselect-ext.ll test, add tests with ne/ [...] No new revisions were added by this update. Summary of changes: bolt/runtime/common.h | 67 +- bolt/runtime/hugify.cpp | 4 +- bolt/runtime/instr.cpp | 6 +- .../bugprone/AssignmentInIfConditionCheck.cpp | 49 + .../bugprone/AssignmentInIfConditionCheck.h | 34 + .../clang-tidy/bugprone/BranchCloneCheck.cpp | 11 + .../clang-tidy/bugprone/BugproneTidyModule.cpp | 21 +- .../clang-tidy/bugprone/CMakeLists.txt | 1 + .../clang-tidy/misc/ConfusableIdentifierCheck.cpp | 70 +- clang-tools-extra/clangd/AST.cpp | 299 + clang-tools-extra/clangd/AST.h | 12 + clang-tools-extra/clangd/ClangdServer.cpp | 1 + clang-tools-extra/clangd/ClangdServer.h | 3 + clang-tools-extra/clangd/InlayHints.cpp | 131 +- clang-tools-extra/clangd/TUScheduler.cpp | 64 +- clang-tools-extra/clangd/TUScheduler.h | 34 +- .../clangd/unittests/InlayHintTests.cpp | 518 +- .../clangd/unittests/TUSchedulerTests.cpp | 144 + clang-tools-extra/docs/ReleaseNotes.rst | 9 + .../checks/bugprone/assignment-in-if-condition.rst | 23 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + clang-tools-extra/pseudo/benchmarks/Benchmark.cpp | 9 +- clang-tools-extra/pseudo/fuzzer/Fuzzer.cpp | 5 +- clang-tools-extra/pseudo/gen/Main.cpp | 18 + .../pseudo/include/clang-pseudo/GLR.h | 37 +- .../pseudo/include/clang-pseudo/Language.h | 29 + .../pseudo/include/clang-pseudo/cxx/CXX.h | 6 + .../pseudo/include/clang-pseudo/grammar/Grammar.h | 12 +- .../pseudo/include/clang-pseudo/grammar/LRGraph.h | 17 +- .../pseudo/include/clang-pseudo/grammar/LRTable.h | 230 +- clang-tools-extra/pseudo/lib/GLR.cpp | 311 +- clang-tools-extra/pseudo/lib/cli/CLI.cpp | 8 +- clang-tools-extra/pseudo/lib/cxx/CMakeLists.txt | 1 + clang-tools-extra/pseudo/lib/cxx/CXX.cpp | 42 + clang-tools-extra/pseudo/lib/cxx/cxx.bnf | 12 +- clang-tools-extra/pseudo/lib/grammar/Grammar.cpp | 7 +- .../pseudo/lib/grammar/GrammarBNF.cpp | 17 +- clang-tools-extra/pseudo/lib/grammar/LRGraph.cpp | 36 +- clang-tools-extra/pseudo/lib/grammar/LRTable.cpp | 78 +- .../pseudo/lib/grammar/LRTableBuild.cpp | 181 +- clang-tools-extra/pseudo/test/cxx/capture-list.cpp | 2 +- .../pseudo/test/cxx/contextual-keywords.cpp | 9 + .../pseudo/test/cxx/declarator-function.cpp | 2 +- .../pseudo/test/cxx/declarator-var.cpp | 2 +- .../pseudo/test/cxx/empty-member-spec.cpp | 4 +- clang-tools-extra/pseudo/test/cxx/keyword.cpp | 2 +- .../pseudo/test/cxx/mixed-designator.cpp | 2 +- .../pseudo/test/cxx/parameter-decl-clause.cpp | 2 +- .../pseudo/test/cxx/predefined-identifier.cpp | 2 +- .../pseudo/test/cxx/recovery-init-list.cpp | 13 + .../test/cxx/template-empty-type-parameter.cpp | 2 +- .../pseudo/test/cxx/unsized-array.cpp | 2 +- clang-tools-extra/pseudo/tool/ClangPseudo.cpp | 53 +- clang-tools-extra/pseudo/unittests/GLRTest.cpp | 329 +- clang-tools-extra/pseudo/unittests/LRTableTest.cpp | 22 +- .../test/clang-tidy/check_clang_tidy.py | 10 +- .../bugprone-assignment-in-if-condition.cpp | 103 + .../bugprone/branch-clone-unknown-expr.cpp | 9 + .../checkers/misc/confusable-identifiers.cpp | 96 +- clang/cmake/caches/Fuchsia-stage2.cmake | 1 - clang/docs/ClangCommandLineReference.rst | 10 + clang/docs/ClangFormat.rst | 84 +- clang/docs/ReleaseNotes.rst | 18 + clang/include/clang/AST/ASTImportError.h | 1 - clang/include/clang/AST/JSONNodeDumper.h | 2 + clang/include/clang/AST/Stmt.h | 38 +- clang/include/clang/AST/TextNodeDumper.h | 1 + .../FlowSensitive/DataflowAnalysisContext.h | 15 +- clang/include/clang/Analysis/SelectorExtras.h | 2 +- clang/include/clang/Basic/AlignedAllocation.h | 4 +- clang/include/clang/Basic/AttrDocs.td | 25 +- clang/include/clang/Basic/BuiltinsX86.def | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 5 +- clang/include/clang/Basic/LangOptions.h | 13 + clang/include/clang/Basic/riscv_vector.td | 99 +- clang/include/clang/Driver/Options.td | 2 + clang/include/clang/Sema/HLSLExternalSemaSource.h | 41 + clang/include/clang/Sema/ScopeInfo.h | 7 +- clang/include/clang/Sema/Sema.h | 35 +- clang/include/clang/Support/RISCVVIntrinsicUtils.h | 2 + clang/lib/AST/ASTContext.cpp | 3 + clang/lib/AST/ASTImporter.cpp | 17 +- clang/lib/AST/FormatString.cpp | 6 + clang/lib/AST/Interp/ByteCodeExprGen.cpp | 2 +- clang/lib/AST/JSONNodeDumper.cpp | 15 + clang/lib/AST/Stmt.cpp | 24 +- clang/lib/AST/StmtPrinter.cpp | 62 + clang/lib/AST/TextNodeDumper.cpp | 6 + clang/lib/Analysis/BodyFarm.cpp | 3 +- .../FlowSensitive/DataflowAnalysisContext.cpp | 8 +- clang/lib/Basic/LangOptions.cpp | 9 + clang/lib/Basic/Targets/X86.cpp | 6 + clang/lib/Basic/Targets/X86.h | 1 + clang/lib/CodeGen/BackendUtil.cpp | 12 + clang/lib/CodeGen/CGCall.cpp | 3 + clang/lib/CodeGen/CGCoroutine.cpp | 4 +- clang/lib/CodeGen/CGStmtOpenMP.cpp | 28 +- clang/lib/CodeGen/CodeGenTBAA.cpp | 37 +- clang/lib/Driver/ToolChains/Clang.cpp | 63 +- clang/lib/Driver/ToolChains/RISCVToolchain.cpp | 7 +- clang/lib/Format/ContinuationIndenter.cpp | 4 +- clang/lib/Format/Format.cpp | 25 +- clang/lib/Format/TokenAnnotator.cpp | 8 +- clang/lib/Format/UnwrappedLineParser.cpp | 16 +- clang/lib/Frontend/FrontendAction.cpp | 8 + clang/lib/Headers/CMakeLists.txt | 1 + clang/lib/Headers/hlsl/hlsl_basic_types.h | 54 +- clang/lib/Headers/opencl-c.h | 18 - clang/lib/Headers/rdpruintrin.h | 57 + clang/lib/Headers/x86intrin.h | 4 + clang/lib/Sema/CMakeLists.txt | 1 + clang/lib/Sema/HLSLExternalSemaSource.cpp | 96 + clang/lib/Sema/Sema.cpp | 3 +- clang/lib/Sema/SemaChecking.cpp | 335 +- clang/lib/Sema/SemaDeclAttr.cpp | 8 +- clang/lib/Sema/SemaDeclCXX.cpp | 8 +- clang/lib/Sema/SemaExprCXX.cpp | 5 +- clang/lib/Sema/SemaOpenMP.cpp | 16 +- clang/lib/Sema/SemaStmt.cpp | 11 +- clang/lib/Serialization/ASTReaderStmt.cpp | 8 +- clang/lib/Serialization/ASTWriterStmt.cpp | 3 + clang/lib/StaticAnalyzer/Core/SValBuilder.cpp | 6 + clang/runtime/CMakeLists.txt | 2 +- clang/test/AST/HLSL/vector-alias.hlsl | 53 + clang/test/AST/ast-dump-fpfeatures.cpp | 46 + clang/test/AST/ast-dump-pragma-json.c | 485 + clang/test/AST/ast-print-fp-pragmas.c | 69 + clang/test/Analysis/func-mapping-test.cpp | 2 + clang/test/Analysis/produce-symbolcast_x86.cpp | 9 + clang/test/Analysis/symbolcast-floatingpoint.cpp | 24 + clang/test/C/drs/dr253.c | 27 + clang/test/C/drs/dr2xx.c | 108 + clang/test/CodeGen/arm-target-features.c | 3 + clang/test/CodeGen/bounds-checking-fam.c | 45 +- clang/test/CodeGen/lower-mass-end-to-end.c | 148 + clang/test/CodeGen/rdpru-builtins.c | 37 + clang/test/CodeGen/tbaa-class.cpp | 59 +- clang/test/CodeGenCUDA/managed-var.cu | 6 +- clang/test/CodeGenObjC/exceptions.m | 15 +- clang/test/CodeGenObjCXX/exceptions-legacy.mm | 11 +- clang/test/Driver/arm-cortex-cpus-2.c | 3 + clang/test/Driver/arm-nofp-disabled-features.c | 2 + clang/test/Driver/arm-nopacbti-disabled-features.c | 7 + clang/test/Driver/instrprof-ld.c | 4 +- clang/test/Driver/linker-wrapper.c | 4 +- clang/test/Driver/modules.m | 30 +- clang/test/Driver/riscv32-toolchain.c | 4 +- clang/test/Driver/riscv64-toolchain.c | 4 +- .../test/Driver/unavailable_aligned_allocation.cpp | 8 +- clang/test/Driver/x86-target-features.c | 5 + clang/test/Frontend/optimization-remark-options.c | 2 +- clang/test/Interpreter/execute.cpp | 5 + clang/test/Misc/target-invalid-cpu-note.c | 2 +- clang/test/Modules/Inputs/concept/A.cppm | 3 - clang/test/Modules/Inputs/concept/foo.h | 13 - clang/test/Modules/concept.cppm | 50 +- clang/test/OpenMP/atomic_compare_codegen.cpp | 11721 ++++++++++++++++++- clang/test/OpenMP/atomic_messages.c | 21 +- clang/test/OpenMP/target_data_codegen.cpp | 3 +- clang/test/OpenMP/target_enter_data_codegen.cpp | 3 +- .../OpenMP/target_enter_data_depend_codegen.cpp | 3 +- clang/test/OpenMP/target_exit_data_codegen.cpp | 3 +- .../OpenMP/target_exit_data_depend_codegen.cpp | 3 +- clang/test/OpenMP/target_update_codegen.cpp | 3 +- clang/test/OpenMP/target_update_depend_codegen.cpp | 3 +- clang/test/Preprocessor/x86_target_features.c | 8 + clang/test/Sema/attr-format.c | 79 +- clang/test/Sema/format-strings.c | 1 + clang/test/SemaCXX/attr-format.cpp | 51 +- .../SemaCXX/unavailable_aligned_allocation.cpp | 12 +- clang/test/SemaHLSL/BuiltIns/vector-errors.hlsl | 30 + .../clang-extdef-mapping/ClangExtDefMapGen.cpp | 101 +- clang/tools/clang-format/ClangFormat.cpp | 10 +- .../clang-linker-wrapper/ClangLinkerWrapper.cpp | 9 +- clang/tools/clang-offload-packager/CMakeLists.txt | 1 + .../ClangOffloadPackager.cpp | 9 +- .../Analysis/FlowSensitive/TransferTest.cpp | 12 + clang/unittests/CodeGen/TBAAMetadataTest.cpp | 22 +- clang/unittests/Format/FormatTest.cpp | 19 + clang/unittests/StaticAnalyzer/RangeSetTest.cpp | 10 + clang/utils/TableGen/RISCVVEmitter.cpp | 10 + clang/www/c_dr_status.html | 28 +- compiler-rt/lib/lsan/lsan_allocator.cpp | 2 + compiler-rt/lib/orc/CMakeLists.txt | 5 +- compiler-rt/lib/orc/elfnix_platform.cpp | 13 + compiler-rt/lib/orc/elfnix_tls.aarch64.S | 94 + compiler-rt/lib/profile/GCDAProfiling.c | 11 +- .../sanitizer_common_interceptors.inc | 26 +- .../lib/sanitizer_common/sanitizer_linux.cpp | 19 +- .../lib/sanitizer_common/sanitizer_platform.h | 2 +- .../sanitizer_common/sanitizer_procmaps_mac.cpp | 8 +- compiler-rt/test/msan/Linux/dn_expand.cpp | 5 +- .../test/orc/TestCases/Linux/aarch64/trivial-tls.S | 66 + .../TestCases/Linux/malloc_usable_size.c | 21 + flang/docs/ParserCombinators.md | 5 +- flang/include/flang/Evaluate/common.h | 48 +- flang/include/flang/Evaluate/complex.h | 23 +- flang/include/flang/Evaluate/real.h | 53 +- flang/include/flang/Evaluate/rounding-bits.h | 2 + flang/include/flang/Evaluate/static-data.h | 15 +- flang/include/flang/Evaluate/target.h | 93 + flang/include/flang/Evaluate/tools.h | 1 + flang/include/flang/Evaluate/type.h | 9 +- flang/include/flang/Lower/Bridge.h | 12 +- flang/include/flang/Semantics/semantics.h | 8 + flang/lib/Evaluate/CMakeLists.txt | 2 +- flang/lib/Evaluate/call.cpp | 4 +- flang/lib/Evaluate/characteristics.cpp | 5 +- flang/lib/Evaluate/fold-implementation.h | 25 +- flang/lib/Evaluate/fold-integer.cpp | 5 +- flang/lib/Evaluate/host.cpp | 8 +- flang/lib/Evaluate/int-power.h | 9 +- flang/lib/Evaluate/intrinsics-library.cpp | 2 +- flang/lib/Evaluate/intrinsics.cpp | 3 +- flang/lib/Evaluate/real.cpp | 40 +- flang/lib/Evaluate/static-data.cpp | 31 +- flang/lib/Evaluate/target.cpp | 197 + flang/lib/Evaluate/tools.cpp | 20 +- flang/lib/Evaluate/type.cpp | 115 +- flang/lib/Frontend/FrontendActions.cpp | 1 + flang/lib/Lower/Bridge.cpp | 6 +- flang/lib/Lower/ConvertType.cpp | 4 + flang/lib/Lower/OpenMP.cpp | 35 +- flang/lib/Optimizer/Builder/FIRBuilder.cpp | 5 +- flang/lib/Optimizer/CodeGen/CodeGen.cpp | 77 +- flang/lib/Optimizer/Dialect/FIRType.cpp | 7 +- flang/lib/Parser/io-parsers.cpp | 128 +- flang/lib/Semantics/check-declarations.cpp | 25 +- flang/lib/Semantics/check-omp-structure.cpp | 4 +- flang/lib/Semantics/compute-offsets.cpp | 21 +- flang/lib/Semantics/data-to-inits.cpp | 5 +- flang/lib/Semantics/expression.cpp | 40 +- flang/lib/Semantics/resolve-names.cpp | 2 +- flang/lib/Semantics/semantics.cpp | 4 +- flang/lib/Semantics/symbol.cpp | 2 +- flang/lib/Semantics/type.cpp | 3 +- flang/runtime/edit-output.cpp | 19 +- flang/runtime/format.h | 21 +- flang/runtime/numeric.cpp | 13 +- flang/runtime/unit.cpp | 12 +- flang/test/Evaluate/fold-mod.f90 | 18 + flang/test/Fir/convert-to-llvm-openmp-and-fir.fir | 2 +- flang/test/Fir/embox.fir | 2 +- flang/test/Lower/OpenMP/simd.f90 | 20 +- flang/test/Lower/extent_triplets.f90 | 11 + flang/test/Semantics/coshape.f90 | 86 + flang/test/Semantics/data05.f90 | 10 +- flang/tools/bbc/bbc.cpp | 3 +- flang/unittests/Evaluate/expression.cpp | 6 +- flang/unittests/Evaluate/folding.cpp | 9 +- flang/unittests/Evaluate/fp-testing.h | 2 +- flang/unittests/Evaluate/intrinsics.cpp | 4 +- libc/lib/CMakeLists.txt | 9 +- libc/src/__support/str_to_float.h | 10 +- libc/test/src/string/memory_utils/CMakeLists.txt | 17 +- libcxx/CMakeLists.txt | 2 - libcxx/cmake/caches/Apple.cmake | 1 - libcxx/docs/BuildingLibcxx.rst | 9 - libcxx/docs/DesignDocs/VisibilityMacros.rst | 51 - libcxx/docs/ReleaseNotes.rst | 5 + libcxx/docs/Status/RangesAlgorithms.csv | 14 +- libcxx/include/CMakeLists.txt | 4 + libcxx/include/__algorithm/nth_element.h | 11 +- libcxx/include/__algorithm/partial_sort.h | 9 +- libcxx/include/__algorithm/ranges_merge.h | 142 + libcxx/include/__algorithm/ranges_remove.h | 64 + libcxx/include/__algorithm/ranges_remove_if.h | 85 + libcxx/include/__algorithm/sort.h | 7 +- libcxx/include/__config | 56 +- libcxx/include/__config_site.in | 1 - libcxx/include/__debug | 16 - libcxx/include/__debug_utils/randomize_range.h | 42 + libcxx/include/__hash_table | 16 +- libcxx/include/__iterator/iterator_traits.h | 6 + libcxx/include/__mutex_base | 12 +- libcxx/include/__split_buffer | 26 +- libcxx/include/__tree | 32 +- libcxx/include/__tuple | 6 +- libcxx/include/__type_traits/extent.h | 6 +- .../include/__type_traits/has_virtual_destructor.h | 2 +- libcxx/include/__type_traits/is_array.h | 4 +- libcxx/include/__type_traits/is_assignable.h | 6 +- libcxx/include/__type_traits/is_compound.h | 6 +- libcxx/include/__type_traits/is_const.h | 4 +- libcxx/include/__type_traits/is_convertible.h | 6 +- libcxx/include/__type_traits/is_destructible.h | 6 +- libcxx/include/__type_traits/is_function.h | 4 +- libcxx/include/__type_traits/is_fundamental.h | 6 +- libcxx/include/__type_traits/is_integral.h | 4 +- .../__type_traits/is_member_function_pointer.h | 6 +- .../__type_traits/is_member_object_pointer.h | 6 +- libcxx/include/__type_traits/is_member_pointer.h | 6 +- .../include/__type_traits/is_nothrow_assignable.h | 4 +- .../__type_traits/is_nothrow_constructible.h | 4 +- libcxx/include/__type_traits/is_object.h | 6 +- libcxx/include/__type_traits/is_pod.h | 4 +- libcxx/include/__type_traits/is_pointer.h | 6 +- libcxx/include/__type_traits/is_reference.h | 10 +- libcxx/include/__type_traits/is_scalar.h | 6 +- libcxx/include/__type_traits/is_signed.h | 6 +- libcxx/include/__type_traits/is_standard_layout.h | 2 +- libcxx/include/__type_traits/is_trivial.h | 2 +- .../__type_traits/is_trivially_destructible.h | 6 +- libcxx/include/__type_traits/is_unsigned.h | 6 +- libcxx/include/__type_traits/is_void.h | 4 +- libcxx/include/__type_traits/is_volatile.h | 4 +- libcxx/include/algorithm | 40 + libcxx/include/array | 7 +- libcxx/include/deque | 18 +- libcxx/include/exception | 4 +- libcxx/include/forward_list | 42 +- libcxx/include/list | 16 +- libcxx/include/map | 52 +- libcxx/include/module.modulemap.in | 8 + libcxx/include/regex | 7 +- libcxx/include/tuple | 16 +- libcxx/include/unordered_map | 12 +- libcxx/include/vector | 64 +- ...ges_robust_against_copying_comparators.pass.cpp | 10 +- ...ges_robust_against_copying_projections.pass.cpp | 14 +- .../aligned_alloc_availability.verify.cpp | 6 +- libcxx/test/libcxx/lint/lint_headers.sh.py | 8 +- .../aligned_allocation_macro.compile.pass.cpp | 2 +- libcxx/test/libcxx/private_headers.verify.cpp | 4 + .../libcxx/strings/basic.string/PR42676.sh.cpp | 22 - .../alg.remove/ranges.remove.pass.cpp | 207 + .../alg.remove/ranges.remove_if.pass.cpp | 224 + .../alg.sorting/alg.merge/ranges_merge.pass.cpp | 613 + .../deque/deque.cons/assign_iter_iter.pass.cpp | 34 +- .../new.delete.array/new_align_val_t.pass.cpp | 6 +- .../new_align_val_t_nothrow.pass.cpp | 6 +- .../new_align_val_t_nothrow_replace.pass.cpp | 6 +- .../new.delete.single/new_align_val_t.pass.cpp | 6 +- .../new_align_val_t_nothrow.pass.cpp | 6 +- .../new_align_val_t_nothrow_replace.pass.cpp | 6 +- .../niebloid.compile.pass.cpp | 6 +- libcxx/test/support/test_iterators.h | 40 +- lld/ELF/Config.h | 3 +- lld/ELF/Driver.cpp | 20 +- lld/ELF/LTO.cpp | 7 +- lld/ELF/Options.td | 2 + lld/ELF/OutputSections.cpp | 30 +- lld/ELF/OutputSections.h | 4 +- lld/ELF/Writer.cpp | 8 +- lld/MachO/Arch/ARM64.cpp | 16 +- lld/docs/ReleaseNotes.rst | 2 + lld/test/CMakeLists.txt | 1 + lld/test/ELF/crash-report.test | 10 + lld/test/ELF/lto/save-temps-eq.ll | 124 + lld/test/MachO/loh-adrp-ldr-got.s | 35 + lld/test/lit.cfg.py | 3 + lld/test/lit.site.cfg.py.in | 1 + lld/tools/lld/lld.cpp | 6 + .../Python/lldbsuite/test/lldbplatformutil.py | 14 +- lldb/packages/Python/lldbsuite/test/lldbtest.py | 1 + lldb/source/Core/Debugger.cpp | 15 +- .../Disassembler/LLVMC/DisassemblerLLVMC.cpp | 6 +- .../BSD-Archive/ObjectContainerBSDArchive.cpp | 208 +- .../BSD-Archive/ObjectContainerBSDArchive.h | 22 +- .../Plugins/ObjectFile/PDB/ObjectFilePDB.cpp | 2 - .../Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp | 3 - .../Plugins/Platform/Windows/PlatformWindows.cpp | 2 - lldb/test/API/functionalities/archives/Makefile | 11 +- .../functionalities/archives/TestBSDArchives.py | 7 + lldb/test/API/functionalities/archives/c.c | 11 + .../two_hits_one_actual/TestTwoHitsOneActual.py | 2 + .../functionalities/load_unload/TestLoadUnload.py | 2 - lldb/test/API/lit.cfg.py | 4 + .../{attach-wait => }/TestGdbRemoteAttachWait.py | 16 +- .../API/tools/lldb-server/TestGdbRemoteFork.py | 5 + .../tools/lldb-server/TestGdbRemoteForkNonStop.py | 5 + .../API/tools/lldb-server/attach-wait/Makefile | 1 - .../API/tools/lldb-server/attach-wait/main.cpp | 8 - .../API/tools/lldb-server/attach-wait/shim.cpp | 9 - lldb/test/CMakeLists.txt | 1 + .../command-disassemble-aarch64-extensions.s | 6 +- .../Shell/ObjectFile/PECOFF/settings-abi-i686.yaml | 2 +- llvm/CMakeLists.txt | 4 +- llvm/bindings/go/llvm/ir.go | 15 - llvm/bindings/ocaml/llvm/llvm.ml | 7 - llvm/bindings/ocaml/llvm/llvm.mli | 30 - llvm/bindings/ocaml/llvm/llvm_ocaml.c | 17 - llvm/cmake/config-ix.cmake | 21 + llvm/docs/AMDGPU/AMDGPUAsmGFX10.rst | 764 +- llvm/docs/AMDGPU/AMDGPUAsmGFX1030.rst | 432 +- llvm/docs/AMDGPU/gfx1030_hwreg.rst | 42 +- .../{gfx10_opt.rst => gfx1030_opt_0d447d.rst} | 4 +- .../{gfx1030_opt.rst => gfx1030_opt_847aed.rst} | 2 +- ...ffset_c40a5a.rst => gfx1030_soffset_73dae7.rst} | 6 +- ...ffset_59fade.rst => gfx1030_soffset_d01a5c.rst} | 6 +- ...0_vdata_c61803.rst => gfx1030_vdata_0aba12.rst} | 4 +- ...0_vdata_b2a787.rst => gfx1030_vdata_16d321.rst} | 4 +- ...0_vdata_325b78.rst => gfx1030_vdata_35851e.rst} | 6 +- llvm/docs/AMDGPU/gfx1030_vdata_87fb90.rst | 21 - ...0_vdata_87fb90.rst => gfx1030_vdata_890652.rst} | 4 +- ...0_vdata_4d8ecf.rst => gfx1030_vdata_a9ff5a.rst} | 6 +- llvm/docs/AMDGPU/gfx1030_vdata_b2a787.rst | 21 - ...x10_vdst_48d3a8.rst => gfx1030_vdst_2ea017.rst} | 6 +- ...030_vdst_a49b76.rst => gfx1030_vdst_322561.rst} | 6 +- llvm/docs/AMDGPU/gfx1030_vdst_5d50a1.rst | 17 - ...x10_vdst_5d50a1.rst => gfx1030_vdst_709347.rst} | 4 +- llvm/docs/AMDGPU/gfx1030_vdst_719833.rst | 21 - ...x10_vdst_a49b76.rst => gfx1030_vdst_81a6ed.rst} | 4 +- ...x10_vdst_f47754.rst => gfx1030_vdst_d71f1c.rst} | 4 +- llvm/docs/AMDGPU/gfx1030_vdst_d7c57e.rst | 17 - ...x10_vdst_d7c57e.rst => gfx1030_vdst_dd8a32.rst} | 4 +- llvm/docs/AMDGPU/gfx10_hwreg.rst | 42 +- .../AMDGPU/{gfx10_opt.rst => gfx10_opt_0d447d.rst} | 4 +- .../AMDGPU/{gfx10_opt.rst => gfx10_opt_847aed.rst} | 2 +- ...soffset_c40a5a.rst => gfx10_soffset_73dae7.rst} | 6 +- ...soffset_59fade.rst => gfx10_soffset_d01a5c.rst} | 6 +- ...030_vdata_c61803.rst => gfx10_vdata_0aba12.rst} | 4 +- ...x10_vdata_c61803.rst => gfx10_vdata_16d321.rst} | 4 +- ...030_vdata_325b78.rst => gfx10_vdata_35851e.rst} | 6 +- ...x10_vdata_c61803.rst => gfx10_vdata_890652.rst} | 4 +- ...030_vdata_4d8ecf.rst => gfx10_vdata_a9ff5a.rst} | 6 +- ...x1030_vdst_48d3a8.rst => gfx10_vdst_2ea017.rst} | 6 +- ...x1030_vdst_f47754.rst => gfx10_vdst_322561.rst} | 6 +- ...gfx10_vdst_5d50a1.rst => gfx10_vdst_709347.rst} | 4 +- llvm/docs/AMDGPU/gfx10_vdst_719833.rst | 21 - ...gfx10_vdst_5d50a1.rst => gfx10_vdst_81a6ed.rst} | 4 +- ...gfx10_vdst_5d50a1.rst => gfx10_vdst_d71f1c.rst} | 4 +- ...gfx10_vdst_5d50a1.rst => gfx10_vdst_dd8a32.rst} | 4 +- llvm/docs/DeveloperPolicy.rst | 38 +- llvm/docs/GettingInvolved.rst | 5 + llvm/docs/GlobalISel/GenericOpcode.rst | 5 +- llvm/docs/LangRef.rst | 22 +- llvm/docs/ReleaseNotes.rst | 19 + llvm/include/llvm-c/Core.h | 19 +- llvm/include/llvm/Analysis/TargetFolder.h | 32 +- llvm/include/llvm/Analysis/ValueTracking.h | 6 +- llvm/include/llvm/AsmParser/LLToken.h | 2 + llvm/include/llvm/Bitcode/LLVMBitCodes.h | 4 +- llvm/include/llvm/CodeGen/AsmPrinter.h | 7 +- .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 34 + llvm/include/llvm/CodeGen/ISDOpcodes.h | 7 + llvm/include/llvm/CodeGen/SelectionDAGISel.h | 1 + llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 4 + llvm/include/llvm/Config/llvm-config.h.cmake | 3 + llvm/include/llvm/DebugInfo/Symbolize/Symbolize.h | 2 + llvm/include/llvm/Debuginfod/Debuginfod.h | 83 +- llvm/include/llvm/Debuginfod/HTTPServer.h | 123 + .../include/llvm/ExecutionEngine/JITLink/aarch64.h | 6 +- llvm/include/llvm/IR/CMakeLists.txt | 2 +- llvm/include/llvm/IR/Constant.h | 4 - llvm/include/llvm/IR/ConstantFolder.h | 31 +- llvm/include/llvm/IR/Constants.h | 31 +- llvm/include/llvm/IR/Instructions.h | 12 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 10 + llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 2 +- llvm/include/llvm/IR/IntrinsicsDirectX.td | 10 +- llvm/include/llvm/IR/IntrinsicsX86.td | 6 + llvm/include/llvm/LTO/Config.h | 6 +- llvm/include/llvm/Support/ARMTargetParser.def | 3 + llvm/include/llvm/Support/TargetOpcodes.def | 2 + llvm/include/llvm/Support/X86TargetParser.def | 1 + llvm/include/llvm/Target/GenericOpcodes.td | 2 + .../llvm/Target/GlobalISel/SelectionDAGCompat.td | 2 + llvm/include/llvm/Target/TargetSelectionDAG.td | 4 + llvm/include/llvm/Transforms/Utils/Debugify.h | 66 +- llvm/include/llvm/Transforms/Utils/LoopUtils.h | 8 +- .../Vectorize/LoopVectorizationLegality.h | 7 - llvm/lib/Analysis/BranchProbabilityInfo.cpp | 6 +- llvm/lib/Analysis/ConstantFolding.cpp | 13 +- llvm/lib/Analysis/InstructionSimplify.cpp | 6 - llvm/lib/Analysis/MemoryBuiltins.cpp | 6 +- llvm/lib/Analysis/ScalarEvolution.cpp | 19 +- llvm/lib/Analysis/ValueTracking.cpp | 24 +- llvm/lib/AsmParser/LLLexer.cpp | 2 +- llvm/lib/AsmParser/LLParser.cpp | 48 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 5 + llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 5 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 120 +- llvm/lib/CodeGen/AtomicExpandPass.cpp | 2 + llvm/lib/CodeGen/ExpandVectorPredication.cpp | 3 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 6 + llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 14 + llvm/lib/CodeGen/PrologEpilogInserter.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 39 +- .../CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 17 + .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 57 + llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 3 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 + .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 67 +- .../lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 2 +- .../CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 2 + llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 99 +- llvm/lib/DebugInfo/Symbolize/Symbolize.cpp | 4 +- llvm/lib/Debuginfod/CMakeLists.txt | 14 + llvm/lib/Debuginfod/Debuginfod.cpp | 315 +- llvm/lib/Debuginfod/HTTPServer.cpp | 189 + llvm/lib/ExecutionEngine/JITLink/ELF_aarch64.cpp | 161 +- llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp | 30 +- llvm/lib/ExecutionEngine/JITLink/aarch64.cpp | 4 + llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp | 6 +- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 5 +- .../ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp | 2 +- llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 75 +- llvm/lib/IR/AsmWriter.cpp | 4 - llvm/lib/IR/ConstantFold.cpp | 27 +- llvm/lib/IR/Constants.cpp | 163 +- llvm/lib/IR/ConstantsContext.h | 60 +- llvm/lib/IR/Core.cpp | 48 +- llvm/lib/IR/Instructions.cpp | 4 + llvm/lib/LTO/LTOBackend.cpp | 52 +- llvm/lib/Linker/IRMover.cpp | 28 +- llvm/lib/ObjCopy/ELF/ELFObject.cpp | 7 +- llvm/lib/Support/Unicode.cpp | 2 +- llvm/lib/Support/X86TargetParser.cpp | 6 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 125 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 8 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 64 +- .../Target/AArch64/GISel/AArch64CallLowering.cpp | 29 +- .../lib/Target/AArch64/GISel/AArch64CallLowering.h | 4 + llvm/lib/Target/AArch64/SMEInstrFormats.td | 34 + llvm/lib/Target/AArch64/SVEInstrFormats.td | 6 + llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 3 + llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 53 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h | 8 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 2 + .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 43 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 13 + llvm/lib/Target/AMDGPU/CMakeLists.txt | 2 + llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp | 175 + llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp | 127 +- llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp | 212 + llvm/lib/Target/AMDGPU/GCNVOPDUtils.h | 32 + llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 12 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 3 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 63 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 29 + llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp | 2 +- llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 524 +- .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 15 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 4 + llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 2 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 34 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 14 + llvm/lib/Target/AMDGPU/VOP2Instructions.td | 6 +- llvm/lib/Target/AMDGPU/VOPCInstructions.td | 2 - llvm/lib/Target/AMDGPU/VOPInstructions.td | 6 +- llvm/lib/Target/ARM/ARM.td | 7 + llvm/lib/Target/DirectX/DXIL.td | 8 +- .../DirectX/DXILWriter/DXILBitcodeWriter.cpp | 4 + llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h | 4 + .../Target/LoongArch/LoongArchFloat32InstrInfo.td | 13 + .../Target/LoongArch/LoongArchFloat64InstrInfo.td | 26 + .../Target/LoongArch/LoongArchFrameLowering.cpp | 172 +- llvm/lib/Target/LoongArch/LoongArchFrameLowering.h | 18 + .../lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp | 23 +- llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h | 2 + .../lib/Target/LoongArch/LoongArchISelLowering.cpp | 243 + llvm/lib/Target/LoongArch/LoongArchISelLowering.h | 12 + llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp | 70 +- llvm/lib/Target/LoongArch/LoongArchInstrInfo.h | 10 + llvm/lib/Target/LoongArch/LoongArchInstrInfo.td | 162 +- llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp | 33 +- .../lib/Target/LoongArch/LoongArchRegisterInfo.cpp | 24 +- llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp | 4 - llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 45 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 9 +- llvm/lib/Target/PowerPC/PPCISelLowering.h | 1 + llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp | 20 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 65 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 349 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h | 12 +- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 6 +- llvm/lib/Target/RISCV/RISCVInstrInfo.h | 5 +- llvm/lib/Target/RISCV/RISCVInstrInfo.td | 1 - llvm/lib/Target/RISCV/RISCVInstrInfoV.td | 9 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 36 +- llvm/lib/Target/RISCV/RISCVInstrInfoZb.td | 16 +- llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 2 +- llvm/lib/Target/SystemZ/SystemZCallingConv.td | 6 +- llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp | 113 +- llvm/lib/Target/VE/VERegisterInfo.cpp | 203 +- .../WebAssembly/Utils/WebAssemblyTypeUtilities.cpp | 33 +- .../WebAssembly/Utils/WebAssemblyTypeUtilities.h | 8 +- .../WebAssembly/Utils/WebAssemblyUtilities.cpp | 22 + .../WebAssembly/Utils/WebAssemblyUtilities.h | 4 + .../Target/WebAssembly/WebAssemblyCFGStackify.cpp | 22 +- .../Target/WebAssembly/WebAssemblyInstrInfo.cpp | 18 +- .../Target/WebAssembly/WebAssemblyMCInstLower.cpp | 25 +- .../lib/Target/WebAssembly/WebAssemblyPeephole.cpp | 27 +- llvm/lib/Target/X86/X86.td | 3 + llvm/lib/Target/X86/X86ISelLowering.cpp | 33 +- llvm/lib/Target/X86/X86InstrInfo.td | 1 + llvm/lib/Target/X86/X86InstrSystem.td | 9 + llvm/lib/Target/X86/X86IntrinsicsInfo.h | 3 +- llvm/lib/ToolDrivers/llvm-lib/Options.td | 2 + llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 49 +- llvm/lib/Transforms/IPO/AttributorAttributes.cpp | 3 +- llvm/lib/Transforms/IPO/GlobalOpt.cpp | 6 +- llvm/lib/Transforms/IPO/MergeFunctions.cpp | 2 +- llvm/lib/Transforms/IPO/PruneEH.cpp | 2 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 2 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 78 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 10 + .../InstCombine/InstCombineAtomicRMW.cpp | 8 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 7 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 9 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 13 +- .../InstCombine/InstCombineVectorOps.cpp | 16 +- .../InstCombine/InstructionCombining.cpp | 8 +- .../Instrumentation/AddressSanitizer.cpp | 4 + llvm/lib/Transforms/Instrumentation/CGProfile.cpp | 3 +- llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp | 2 +- llvm/lib/Transforms/Scalar/GVN.cpp | 4 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 19 +- llvm/lib/Transforms/Scalar/LoopDistribute.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 25 +- .../Transforms/Scalar/LowerMatrixIntrinsics.cpp | 28 +- llvm/lib/Transforms/Scalar/Reassociate.cpp | 21 +- .../Transforms/Scalar/TailRecursionElimination.cpp | 4 +- llvm/lib/Transforms/Utils/Debugify.cpp | 47 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 51 +- llvm/lib/Transforms/Utils/LowerAtomic.cpp | 4 + .../Transforms/Utils/ScalarEvolutionExpander.cpp | 3 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 150 +- .../Vectorize/LoopVectorizationLegality.cpp | 30 - .../Vectorize/LoopVectorizationPlanner.h | 10 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 258 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 14 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 38 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 170 +- .../ScalarEvolution/annotation-intrinsics.ll | 4 +- .../ScalarEvolution/ptrtoint-constantexpr-loop.ll | 8 +- llvm/test/Assembler/ConstantExprFold.ll | 66 +- llvm/test/Assembler/atomic.ll | 12 + llvm/test/Assembler/flags.ll | 15 - llvm/test/Assembler/insertextractvalue.ll | 28 - llvm/test/Assembler/insertvalue-invalid-type-1.ll | 7 - llvm/test/Assembler/unsupported-constexprs.ll | 17 +- llvm/test/Bindings/OCaml/core.ml | 10 - .../Inputs/bitcode-parseconstant-delay-select.bc | Bin 0 -> 1420 bytes .../Bitcode/bitcode-parseconstant-delay-select.ll | 2 +- llvm/test/Bitcode/compatibility.ll | 6 + .../GlobalISel/call-lowering-sret-demotion.ll | 119 + .../GlobalISel/legalizer-info-validation.mir | 8 +- .../AArch64/GlobalISel/select-dbg-value.mir | 15 +- .../CodeGen/AArch64/GlobalISel/select-hint.mir | 56 +- llvm/test/CodeGen/AArch64/arm64-andCmpBrToTBZ.ll | 2 +- .../CodeGen/AArch64/global-merge-group-by-use.ll | 68 +- llvm/test/CodeGen/AArch64/sme-intrinsics-add.ll | 43 + .../CodeGen/AArch64/sve-extract-scalable-vector.ll | 336 + .../AArch64/sve-fix-length-and-combine-512.ll | 36 +- llvm/test/CodeGen/AArch64/sve-fp-reduce.ll | 323 +- llvm/test/CodeGen/AArch64/sve-insert-vector.ll | 684 +- llvm/test/CodeGen/AArch64/sve-int-log.ll | 39 + llvm/test/CodeGen/AArch64/sve-int-pred-reduce.ll | 121 +- .../CodeGen/AArch64/sve-intrinsics-reinterpret.ll | 21 + llvm/test/CodeGen/AArch64/sve-vecreduce-fold.ll | 6 +- llvm/test/CodeGen/AArch64/vector-gep.ll | 17 +- llvm/test/CodeGen/AArch64/vector-global-i1.ll | 14 + llvm/test/CodeGen/AArch64/vselect-ext.ll | 343 +- llvm/test/CodeGen/AArch64/win64_vararg.ll | 357 +- llvm/test/CodeGen/AArch64/win64_vararg_float.ll | 197 +- llvm/test/CodeGen/AArch64/win64_vararg_float_cc.ll | 221 +- .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 22 + .../llvm.amdgcn.ds.gws.sema.release.all.ll | 8 - .../GlobalISel/llvm.amdgcn.image.gather4.dim.ll | 2 +- .../AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll | 28 +- .../llvm.amdgcn.image.load.2darraymsaa.a16.ll | 2 +- .../llvm.amdgcn.image.load.2darraymsaa.ll | 34 +- .../GlobalISel/llvm.amdgcn.image.load.3d.a16.ll | 20 +- .../AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll | 38 +- .../GlobalISel/llvm.amdgcn.image.sample.g16.ll | 2 +- .../GlobalISel/llvm.amdgcn.image.store.2d.ll | 3 +- .../AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll | 5 +- .../AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll | 108 +- .../AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll | 25 + .../AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll | 28 + llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll | 491 +- llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll | 637 +- llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll | 155 +- llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll | 147 +- .../CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll | 4 + .../AMDGPU/atomic_optimizations_local_pointer.ll | 36 +- llvm/test/CodeGen/AMDGPU/build_vector.ll | 2 +- llvm/test/CodeGen/AMDGPU/clamp.ll | 34 +- llvm/test/CodeGen/AMDGPU/cluster_stores.ll | 51 +- llvm/test/CodeGen/AMDGPU/dpp64_combine.ll | 19 +- llvm/test/CodeGen/AMDGPU/dpp_combine.ll | 7 +- llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir | 810 ++ .../CodeGen/AMDGPU/dual-source-blend-export.ll | 14 +- llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll | 99 +- llvm/test/CodeGen/AMDGPU/flat-scratch.ll | 170 +- .../CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll | 8 +- llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 4 + .../AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll | 16 +- .../AMDGPU/llvm.amdgcn.ds.ordered.add.gfx11.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll | 192 +- .../AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll | 2 +- .../AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll | 112 +- .../CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll | 134 +- .../AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll | 5 +- .../CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll | 68 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll | 1 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll | 8 +- .../test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll | 36 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll | 12 +- llvm/test/CodeGen/AMDGPU/llvm.mulo.ll | 47 +- llvm/test/CodeGen/AMDGPU/mad_64_32.ll | 49 +- llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll | 30 +- .../CodeGen/AMDGPU/memory-legalizer-flat-agent.ll | 960 +- .../AMDGPU/memory-legalizer-flat-nontemporal.ll | 40 +- .../AMDGPU/memory-legalizer-flat-singlethread.ll | 960 +- .../CodeGen/AMDGPU/memory-legalizer-flat-system.ll | 960 +- .../AMDGPU/memory-legalizer-flat-volatile.ll | 58 +- .../AMDGPU/memory-legalizer-flat-wavefront.ll | 948 +- .../AMDGPU/memory-legalizer-flat-workgroup.ll | 912 +- .../AMDGPU/memory-legalizer-global-agent.ll | 498 +- .../AMDGPU/memory-legalizer-global-nontemporal.ll | 24 +- .../AMDGPU/memory-legalizer-global-singlethread.ll | 504 +- .../AMDGPU/memory-legalizer-global-system.ll | 474 +- .../AMDGPU/memory-legalizer-global-volatile.ll | 24 +- .../AMDGPU/memory-legalizer-global-wavefront.ll | 504 +- .../AMDGPU/memory-legalizer-global-workgroup.ll | 504 +- .../CodeGen/AMDGPU/memory-legalizer-local-agent.ll | 552 +- .../AMDGPU/memory-legalizer-local-nontemporal.ll | 12 +- .../AMDGPU/memory-legalizer-local-singlethread.ll | 552 +- .../AMDGPU/memory-legalizer-local-system.ll | 552 +- .../AMDGPU/memory-legalizer-local-volatile.ll | 24 +- .../AMDGPU/memory-legalizer-local-wavefront.ll | 552 +- .../AMDGPU/memory-legalizer-local-workgroup.ll | 552 +- .../AMDGPU/memory-legalizer-private-nontemporal.ll | 12 +- .../AMDGPU/memory-legalizer-private-volatile.ll | 12 +- llvm/test/CodeGen/AMDGPU/minmax.ll | 422 + .../opt-exec-masking-pre-ra-update-liveness.mir | 215 +- llvm/test/CodeGen/AMDGPU/verify-vopd.mir | 11 + llvm/test/CodeGen/AMDGPU/vopc_dpp.mir | 68 + llvm/test/CodeGen/AMDGPU/vopd-combine.mir | 543 + llvm/test/CodeGen/AMDGPU/waitcnt-vinterp.mir | 28 + llvm/test/CodeGen/AMDGPU/wqm-gfx11.ll | 8 +- llvm/test/CodeGen/ARM/build-attributes.ll | 19 + llvm/test/CodeGen/DirectX/comput_ids.ll | 16 +- llvm/test/CodeGen/LoongArch/double-imm.ll | 89 + llvm/test/CodeGen/LoongArch/float-imm.ll | 85 + llvm/test/CodeGen/LoongArch/frame.ll | 29 + llvm/test/CodeGen/LoongArch/ir-instruction/br.ll | 358 + llvm/test/CodeGen/LoongArch/ir-instruction/call.ll | 88 + .../CodeGen/LoongArch/ir-instruction/indirectbr.ll | 30 + .../CodeGen/LoongArch/ir-instruction/load-store.ll | 368 + .../ir-instruction/sdiv-udiv-srem-urem.ll | 685 ++ llvm/test/CodeGen/PowerPC/PR33636.ll | 706 +- llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll | 79 + llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll | 74 + llvm/test/CodeGen/PowerPC/aix-alias.ll | 16 +- llvm/test/CodeGen/PowerPC/tls-crash.mir | 25 + llvm/test/CodeGen/RISCV/rv64zba.ll | 193 +- .../RISCV/rvv/access-fixed-objects-by-rvv.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/active_lane_mask.ll | 221 + .../CodeGen/RISCV/rvv/addi-rvv-stack-object.mir | 60 + llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll | 98 +- llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll | 62 +- llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll | 162 +- llvm/test/CodeGen/RISCV/rvv/calling-conv.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll | 24 - llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll | 12 - llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll | 24 - .../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 16 +- .../RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll | 111 +- .../RISCV/rvv/fixed-vectors-calling-conv.ll | 301 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 148 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 36 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 5 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 10 +- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 24 +- .../RISCV/rvv/fixed-vectors-masked-gather.ll | 112 +- .../RISCV/rvv/fixed-vectors-masked-scatter.ll | 122 +- .../RISCV/rvv/fixed-vectors-reduction-int-vp.ll | 32 +- .../RISCV/rvv/fixed-vectors-reduction-int.ll | 24 +- .../RISCV/rvv/fixed-vectors-setcc-int-vp.ll | 36 +- .../CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll | 16 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll | 8 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll | 8 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll | 3 +- llvm/test/CodeGen/RISCV/rvv/localvar.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/masked-tama.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/memory-args.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll | 19 +- llvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir | 22 +- llvm/test/CodeGen/RISCV/rvv/scalar-stack-align.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll | 40 +- llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 7 +- llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll | 10 +- llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/vaadd.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vaaddu.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vadd.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vand-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vasub.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vasubu.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 8 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmul.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmulh.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmulhu.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vor-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vreductions-int.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vrsub.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vselect-int-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vsub.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vxor-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll | 16 +- .../test/CodeGen/RISCV/srem-seteq-illegal-types.ll | 74 +- .../test/CodeGen/RISCV/urem-seteq-illegal-types.ll | 4 +- .../CodeGen/Thumb2/constant-islands-cbzundef.mir | 30 +- llvm/test/CodeGen/VE/Scalar/load_stk.ll | 795 ++ llvm/test/CodeGen/VE/Scalar/store_stk.ll | 808 ++ llvm/test/CodeGen/X86/critical-edge-split-2.ll | 40 - llvm/test/CodeGen/X86/fold-tied-op.ll | 119 +- llvm/test/CodeGen/X86/nonconst-static-div.ll | 12 - llvm/test/CodeGen/X86/nonconst-static-iv.ll | 8 - llvm/test/CodeGen/X86/pr33396.ll | 27 - .../test/CodeGen/X86/pr49839-trapping-aggregate.ll | 33 - llvm/test/CodeGen/X86/pr56351.ll | 18 + llvm/test/CodeGen/X86/rdpru.ll | 85 + llvm/test/CodeGen/X86/selectiondag-dominator.ll | 30 - .../CodeGen/X86/selectiondag-stackmap-legalize.ll | 152 + .../DebugInfo/debugify-original-no-dbg-info.ll | 2 +- llvm/test/DebugInfo/verify-di-preserve.ll | 52 + .../RuntimeDyld/AArch64/ELF_ARM64_TSTBR14.s | 14 + llvm/test/Instrumentation/cgprofile.ll | 2 +- llvm/test/LTO/X86/diagnostic-handler-remarks.ll | 4 +- llvm/test/Linker/module-flags-8-a.ll | 8 +- .../test/Linker/module-flags-dont-change-others.ll | 8 +- llvm/test/MC/AMDGPU/gfx11-flat-errs.s | 4 + llvm/test/MC/Disassembler/AArch64/mattr-all.txt | 4 + llvm/test/MC/Disassembler/X86/x86-32.txt | 3 + llvm/test/MC/Disassembler/X86/x86-64.txt | 3 + llvm/test/MC/X86/RDPRU.s | 17 + llvm/test/ThinLTO/X86/selective-save-temps.ll | 160 + .../Transforms/Coroutines/coro-debug-coro-frame.ll | 88 +- .../dfa-jump-threading-transform.ll | 4 +- .../DFAJumpThreading/dfa-unfold-select.ll | 6 +- llvm/test/Transforms/FunctionImport/cg_profile.ll | 2 +- llvm/test/Transforms/GVN/remarks-selfdomination.ll | 21 + llvm/test/Transforms/GVNSink/sink-common-code.ll | 2 +- .../test/Transforms/GlobalOpt/constant-can-trap.ll | 87 - .../GlobalOpt/ctor-list-opt-constexpr.ll | 2 +- llvm/test/Transforms/IRCE/decrementing-loop.ll | 11 +- .../Transforms/IndVarSimplify/floating-point-iv.ll | 34 + llvm/test/Transforms/IndVarSimplify/pr22222.ll | 32 +- llvm/test/Transforms/IndVarSimplify/pr56242.ll | 6 +- llvm/test/Transforms/InstCombine/and.ll | 60 + llvm/test/Transforms/InstCombine/atomicrmw.ll | 29 + .../Transforms/InstCombine/indexed-gep-compares.ll | 30 - .../InstCombine/lshr-and-negC-icmpeq-zero.ll | 52 +- llvm/test/Transforms/InstCombine/not-add.ll | 6 +- llvm/test/Transforms/InstCombine/pow-4.ll | 35 +- .../Transforms/InstCombine/sadd-with-overflow.ll | 2 +- llvm/test/Transforms/InstCombine/sitofp.ll | 31 +- llvm/test/Transforms/InstCombine/sqrt.ll | 41 +- .../Transforms/InstCombine/ssub-with-overflow.ll | 2 +- llvm/test/Transforms/InstCombine/sub-minmax.ll | 145 +- .../Transforms/InstCombine/uadd-with-overflow.ll | 2 +- .../vscale_extractelement-inseltpoison.ll | 42 +- .../InstCombine/vscale_extractelement.ll | 10 +- llvm/test/Transforms/InstCombine/with_overflow.ll | 30 +- .../InstSimplify/ConstProp/2007-02-23-sdiv.ll | 5 - .../ConstProp/2009-06-20-constexpr-zero-lhs.ll | 4 - .../InstSimplify/ConstProp/constant-expr.ll | 9 - llvm/test/Transforms/InstSimplify/div.ll | 108 + llvm/test/Transforms/InstSimplify/phi.ll | 64 - llvm/test/Transforms/LICM/callbr-crash.ll | 21 +- .../LoopStrengthReduce/remove_scev_indvars.ll | 36 + .../AArch64/runtime-check-size-based-threshold.ll | 18 +- .../AArch64/sve-tail-folding-forced.ll | 2 +- .../AArch64/sve-tail-folding-unroll.ll | 4 +- .../LoopVectorize/AArch64/sve-tail-folding.ll | 22 +- .../LoopVectorize/RISCV/low-trip-count.ll | 63 +- .../LoopVectorize/RISCV/scalable-tailfold.ll | 273 + .../Transforms/LoopVectorize/X86/gather_scatter.ll | 2 +- .../LoopVectorize/X86/masked_load_store.ll | 68 - .../X86/pointer-runtime-checks-unprofitable.ll | 60 +- llvm/test/Transforms/LoopVectorize/X86/pr23997.ll | 2 +- llvm/test/Transforms/LoopVectorize/X86/pr35432.ll | 2 +- llvm/test/Transforms/LoopVectorize/X86/pr54634.ll | 2 +- .../Transforms/LoopVectorize/X86/runtime-limit.ll | 22 +- .../LoopVectorize/first-order-recurrence.ll | 3158 +---- .../test/Transforms/LoopVectorize/if-conversion.ll | 57 - .../LoopVectorize/vplan-sink-scalars-and-merge.ll | 21 +- llvm/test/Transforms/LowerAtomic/atomic-load.ll | 22 + .../bigger-expressions-double.ll | 12 +- .../multiply-right-transpose.ll | 4 +- .../LowerMatrixIntrinsics/propagate-backward.ll | 12 +- .../propagate-backwards-unsupported.ll | 18 +- .../LowerMatrixIntrinsics/propagate-forward.ll | 16 +- .../LowerMatrixIntrinsics/propagate-mixed-users.ll | 8 +- .../propagate-multiple-iterations.ll | 8 +- .../transpose-double-row-major.ll | 18 +- .../LowerMatrixIntrinsics/transpose-double.ll | 26 +- .../transpose-float-row-major.ll | 18 +- .../LowerMatrixIntrinsics/transpose-float.ll | 26 +- .../transpose-i32-row-major.ll | 18 +- .../LowerMatrixIntrinsics/transpose-i32.ll | 26 +- .../transpose-opts-iterator-invalidation.ll | 4 +- .../LowerMatrixIntrinsics/transpose-opts.ll | 12 +- .../MergeFunc/mergefunc-struct-return.ll | 2 +- .../Transforms/SLPVectorizer/AArch64/loadorder.ll | 151 +- .../X86/load-partial-vector-shuffle.ll | 73 + .../Transforms/SimplifyCFG/2006-10-19-UncondDiv.ll | 29 - .../SimplifyCFG/ConditionalTrappingConstantExpr.ll | 171 - llvm/test/Transforms/SimplifyCFG/PR16069.ll | 33 - llvm/test/Transforms/SimplifyCFG/PR17073.ll | 98 - .../Transforms/SimplifyCFG/X86/sink-common-code.ll | 4 +- .../Transforms/SimplifyCFG/hoist-skip-token.ll | 39 + llvm/test/Transforms/SimplifyCFG/jump-threading.ll | 209 +- llvm/test/Transforms/SimplifyCFG/pr55765.ll | 4 +- llvm/test/Transforms/SimplifyCFG/wc-widen-block.ll | 11 +- .../2010-06-26-MultipleReturnValues.ll | 6 +- .../Transforms/TailCallElim/accum_recursion.ll | 2 +- llvm/test/Transforms/TailCallElim/basic.ll | 2 +- .../Util/Debugify/loc-only-original-mode.ll | 8 +- .../VectorCombine/AArch64/select-shuffle.ll | 344 +- .../Transforms/WholeProgramDevirt/expand-check.ll | 2 +- .../Inputs/loongarch_function_name.ll | 8 + .../Inputs/loongarch_function_name.ll.expected | 13 + .../Inputs/loongarch_generated_funcs.ll | 63 + ...loongarch_generated_funcs.ll.generated.expected | 148 + ...ongarch_generated_funcs.ll.nogenerated.expected | 147 + .../loongarch-function-name.test | 5 + .../loongarch_generated_funcs.test | 17 + llvm/test/tools/llvm-ar/Inputs/mri-crlf.mri | 2 + llvm/test/tools/llvm-ar/mri-crlf.test | 9 +- llvm/test/tools/llvm-ar/mri-delete.test | 188 +- llvm/test/tools/llvm-ar/mri-end.test | 140 +- llvm/test/tools/llvm-ar/mri-nonascii.test | 37 +- .../tools/llvm-objcopy/ELF/binary-no-paddr.test | 22 +- llvm/test/tools/llvm-objcopy/ELF/binary-paddr.test | 40 + llvm/tools/llvm-lto2/llvm-lto2.cpp | 30 +- llvm/tools/opt/NewPMDriver.cpp | 39 +- llvm/tools/opt/NewPMDriver.h | 5 +- llvm/tools/opt/opt.cpp | 15 +- llvm/unittests/Analysis/ValueTrackingTest.cpp | 14 - llvm/unittests/Debuginfod/CMakeLists.txt | 1 + llvm/unittests/Debuginfod/HTTPServerTests.cpp | 309 + llvm/unittests/IR/ConstantsTest.cpp | 25 +- llvm/unittests/Support/TargetParserTest.cpp | 8 +- llvm/utils/UpdateTestChecks/asm.py | 24 +- .../clang-tools-extra/clang-tidy/bugprone/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn | 1 + llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 5 +- llvm/utils/gn/secondary/lld/test/BUILD.gn | 1 + .../gn/secondary/llvm/include/llvm/Config/BUILD.gn | 1 + .../gn/secondary/llvm/include/llvm/IR/BUILD.gn | 2 +- .../gn/secondary/llvm/lib/Debuginfod/BUILD.gn | 1 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 2 + .../gn/secondary/llvm/tools/llvm-reduce/BUILD.gn | 1 + .../secondary/llvm/unittests/Debuginfod/BUILD.gn | 5 +- mlir/cmake/modules/AddMLIRPython.cmake | 2 +- mlir/docs/AttributesAndTypes.md | 4 +- mlir/docs/Dialects/Affine.md | 5 +- mlir/docs/LangRef.md | 104 +- .../mlir/Analysis/Presburger/IntegerRelation.h | 14 +- .../mlir/Analysis/Presburger/PWMAFunction.h | 41 +- .../mlir/Analysis/Presburger/PresburgerSpace.h | 117 +- mlir/include/mlir/Dialect/CommonFolders.h | 48 +- mlir/include/mlir/Dialect/GPU/IR/GPUDialect.h | 1 + mlir/include/mlir/Dialect/GPU/IR/GPUOps.td | 21 +- mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h | 1 + mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 16 +- mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 9 + mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td | 12 +- mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td | 201 +- .../mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td | 2 +- mlir/include/mlir/Dialect/SCF/IR/SCFOps.td | 109 - mlir/include/mlir/Dialect/Tensor/IR/Tensor.h | 1 + mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td | 149 + mlir/include/mlir/Dialect/Vector/IR/VectorOps.td | 1 + mlir/include/mlir/ExecutionEngine/MemRefUtils.h | 2 +- mlir/include/mlir/IR/AffineMap.h | 6 + mlir/include/mlir/IR/AttrTypeBase.td | 2 +- mlir/include/mlir/IR/Attributes.h | 3 +- mlir/include/mlir/IR/OpBase.td | 2 +- mlir/include/mlir/IR/OpDefinition.h | 5 +- mlir/include/mlir/IR/Types.h | 3 +- mlir/include/mlir/Interfaces/ViewLikeInterface.td | 15 +- mlir/include/mlir/Support/InterfaceSupport.h | 37 + mlir/include/mlir/Tools/PDLL/ODS/Operation.h | 1 + mlir/lib/Analysis/Presburger/IntegerRelation.cpp | 13 + mlir/lib/Analysis/Presburger/PWMAFunction.cpp | 140 + mlir/lib/Analysis/Presburger/PresburgerSpace.cpp | 49 +- mlir/lib/Dialect/Affine/IR/AffineOps.cpp | 2 +- .../Transforms/AllocTensorElimination.cpp | 21 +- mlir/lib/Dialect/GPU/CMakeLists.txt | 2 + .../Dialect/GPU/IR/InferIntRangeInterfaceImpls.cpp | 97 + mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 24 + .../lib/Dialect/Linalg/Transforms/DropUnitDims.cpp | 75 +- mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 28 + mlir/lib/Dialect/Math/IR/MathOps.cpp | 38 +- mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | 47 +- mlir/lib/Dialect/MemRef/Transforms/MultiBuffer.cpp | 4 +- mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp | 111 +- mlir/lib/Dialect/SCF/IR/CMakeLists.txt | 1 - mlir/lib/Dialect/SCF/IR/SCF.cpp | 143 +- .../SCF/Transforms/BufferizableOpInterfaceImpl.cpp | 246 +- .../SparseTensor/Transforms/SparseTensorPasses.cpp | 13 +- .../SparseTensor/Transforms/Sparsification.cpp | 76 + mlir/lib/Dialect/Tensor/IR/CMakeLists.txt | 1 + mlir/lib/Dialect/Tensor/IR/TensorOps.cpp | 256 +- .../Transforms/BufferizableOpInterfaceImpl.cpp | 309 +- mlir/lib/Dialect/Vector/IR/VectorOps.cpp | 60 +- .../Transforms/VectorTransferOpTransforms.cpp | 4 +- .../Dialect/Vector/Transforms/VectorTransforms.cpp | 21 +- mlir/lib/ExecutionEngine/OptUtils.cpp | 2 +- mlir/lib/ExecutionEngine/SparseTensorUtils.cpp | 2 +- mlir/lib/IR/AffineMap.cpp | 19 +- mlir/lib/IR/AsmPrinter.cpp | 68 +- mlir/lib/Interfaces/ViewLikeInterface.cpp | 19 - mlir/lib/Parser/AffineParser.cpp | 54 +- mlir/lib/Parser/DialectSymbolParser.cpp | 214 +- mlir/lib/Parser/Parser.h | 35 +- mlir/lib/Parser/ParserState.h | 26 +- mlir/lib/TableGen/AttrOrTypeDef.cpp | 10 +- .../Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp | 32 + mlir/test/Dialect/EmitC/types.mlir | 12 +- mlir/test/Dialect/GPU/int-range-interface.mlir | 128 + mlir/test/Dialect/GPU/invalid.mlir | 4 +- mlir/test/Dialect/LLVMIR/callgraph.mlir | 93 + .../test/Dialect/Linalg/drop-unit-extent-dims.mlir | 20 + mlir/test/Dialect/Math/canonicalize.mlir | 10 + mlir/test/Dialect/OpenACC/ops.mlir | 20 +- mlir/test/Dialect/OpenMP/invalid.mlir | 127 +- mlir/test/Dialect/OpenMP/ops.mlir | 174 +- mlir/test/Dialect/Quant/parse-any-invalid.mlir | 4 +- .../Dialect/Quant/parse-calibrated-invalid.mlir | 4 +- mlir/test/Dialect/Quant/parse-uniform-invalid.mlir | 4 +- mlir/test/Dialect/SCF/canonicalize.mlir | 25 - .../SCF/foreach-thread-canonicalization.mlir | 50 +- mlir/test/Dialect/SCF/invalid.mlir | 8 +- .../one-shot-bufferize-tensor-copy-insertion.mlir | 4 +- mlir/test/Dialect/SCF/one-shot-bufferize.mlir | 6 +- mlir/test/Dialect/SCF/ops.mlir | 4 +- mlir/test/Dialect/SparseTensor/rewriting.mlir | 87 + mlir/test/Dialect/Tensor/bufferize.mlir | 129 +- mlir/test/Dialect/Tensor/canonicalize.mlir | 27 + mlir/test/Dialect/Tensor/one-shot-bufferize.mlir | 24 + mlir/test/Dialect/Vector/canonicalize.mlir | 27 + mlir/test/Dialect/Vector/invalid.mlir | 2 +- .../Dialect/Vector/vector-reduce-to-contract.mlir | 35 + mlir/test/IR/affine-set.mlir | 113 + mlir/test/IR/enum-attr-invalid.mlir | 2 +- mlir/test/IR/enum-attr-roundtrip.mlir | 12 +- mlir/test/IR/invalid.mlir | 33 +- mlir/test/IR/parser.mlir | 30 +- .../Dialect/SparseTensor/CPU/sparse_reshape.mlir | 129 + mlir/test/Target/Cpp/types.mlir | 12 +- mlir/test/Target/LLVMIR/openmp-llvm.mlir | 92 +- mlir/test/lib/Dialect/Test/TestTypeDefs.td | 2 +- .../mlir-tblgen/attr-or-type-format-roundtrip.mlir | 8 +- mlir/test/mlir-tblgen/attr-or-type-format.mlir | 18 +- mlir/test/mlir-tblgen/testdialect-attrdefs.mlir | 4 +- mlir/test/python/ir/attributes.py | 2 +- mlir/tools/mlir-tblgen/AttrOrTypeFormatGen.cpp | 4 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 2 +- .../Analysis/Presburger/PWMAFunctionTest.cpp | 328 + .../Analysis/Presburger/PresburgerSpaceTest.cpp | 52 +- mlir/unittests/Dialect/MemRef/InferShapeTest.cpp | 6 +- mlir/unittests/Dialect/SparseTensor/MergerTest.cpp | 14 + mlir/unittests/IR/CMakeLists.txt | 1 + mlir/unittests/IR/InterfaceTest.cpp | 77 + openmp/libomptarget/include/device.h | 22 +- openmp/libomptarget/include/omptarget.h | 235 +- openmp/libomptarget/include/omptargetplugin.h | 4 +- openmp/libomptarget/include/rtl.h | 16 +- openmp/libomptarget/plugins/amdgpu/src/rtl.cpp | 1833 ++- .../plugins/common/elf_common/elf_common.cpp | 16 +- .../plugins/common/elf_common/elf_common.h | 4 +- openmp/libomptarget/plugins/cuda/src/rtl.cpp | 328 +- .../plugins/generic-elf-64bit/src/rtl.cpp | 224 +- openmp/libomptarget/src/api.cpp | 240 +- openmp/libomptarget/src/device.cpp | 163 +- openmp/libomptarget/src/interface.cpp | 491 +- openmp/libomptarget/src/interop.cpp | 206 +- openmp/libomptarget/src/omptarget.cpp | 305 +- openmp/libomptarget/src/private.h | 72 +- openmp/libomptarget/src/rtl.cpp | 217 +- openmp/runtime/src/dllexports | 7 + openmp/runtime/src/kmp.h | 8 + openmp/runtime/src/kmp_csupport.cpp | 57 +- openmp/runtime/src/kmp_dispatch.cpp | 213 + utils/bazel/llvm-project-overlay/clang/BUILD.bazel | 6 +- utils/bazel/llvm-project-overlay/llvm/BUILD.bazel | 2 +- utils/bazel/llvm-project-overlay/mlir/BUILD.bazel | 6 + 1177 files changed, 51825 insertions(+), 24219 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/bugprone/AssignmentInIfConditionCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/bugprone/AssignmentInIfConditionCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/bugprone/assignment-in [...] create mode 100644 clang-tools-extra/pseudo/test/cxx/contextual-keywords.cpp create mode 100644 clang-tools-extra/pseudo/test/cxx/recovery-init-list.cpp create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-assignment- [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone/branch-clon [...] create mode 100644 clang/include/clang/Sema/HLSLExternalSemaSource.h create mode 100644 clang/lib/Headers/rdpruintrin.h create mode 100644 clang/lib/Sema/HLSLExternalSemaSource.cpp create mode 100644 clang/test/AST/HLSL/vector-alias.hlsl create mode 100644 clang/test/AST/ast-dump-pragma-json.c create mode 100644 clang/test/AST/ast-print-fp-pragmas.c create mode 100644 clang/test/Analysis/symbolcast-floatingpoint.cpp create mode 100644 clang/test/C/drs/dr253.c create mode 100644 clang/test/CodeGen/lower-mass-end-to-end.c create mode 100644 clang/test/CodeGen/rdpru-builtins.c create mode 100644 clang/test/Driver/arm-nopacbti-disabled-features.c delete mode 100644 clang/test/Modules/Inputs/concept/A.cppm delete mode 100644 clang/test/Modules/Inputs/concept/foo.h create mode 100644 clang/test/SemaHLSL/BuiltIns/vector-errors.hlsl create mode 100644 compiler-rt/lib/orc/elfnix_tls.aarch64.S create mode 100644 compiler-rt/test/orc/TestCases/Linux/aarch64/trivial-tls.S create mode 100644 compiler-rt/test/sanitizer_common/TestCases/Linux/malloc_usable_size.c create mode 100644 flang/include/flang/Evaluate/target.h create mode 100644 flang/lib/Evaluate/target.cpp create mode 100644 flang/test/Lower/extent_triplets.f90 create mode 100644 flang/test/Semantics/coshape.f90 create mode 100644 libcxx/include/__algorithm/ranges_merge.h create mode 100644 libcxx/include/__algorithm/ranges_remove.h create mode 100644 libcxx/include/__algorithm/ranges_remove_if.h create mode 100644 libcxx/include/__debug_utils/randomize_range.h delete mode 100644 libcxx/test/libcxx/strings/basic.string/PR42676.sh.cpp create mode 100644 libcxx/test/std/algorithms/alg.modifying.operations/alg.remove/ [...] create mode 100644 libcxx/test/std/algorithms/alg.modifying.operations/alg.remove/ [...] create mode 100644 libcxx/test/std/algorithms/alg.sorting/alg.merge/ranges_merge.pass.cpp create mode 100644 lld/test/ELF/crash-report.test create mode 100644 lld/test/ELF/lto/save-temps-eq.ll create mode 100644 lld/test/MachO/loh-adrp-ldr-got.s create mode 100644 lldb/test/API/functionalities/archives/c.c rename lldb/test/API/tools/lldb-server/{attach-wait => }/TestGdbRemoteAttachWait.py (80%) delete mode 100644 lldb/test/API/tools/lldb-server/attach-wait/Makefile delete mode 100644 lldb/test/API/tools/lldb-server/attach-wait/main.cpp delete mode 100644 lldb/test/API/tools/lldb-server/attach-wait/shim.cpp copy llvm/docs/AMDGPU/{gfx10_opt.rst => gfx1030_opt_0d447d.rst} (82%) rename llvm/docs/AMDGPU/{gfx1030_opt.rst => gfx1030_opt_847aed.rst} (91%) rename llvm/docs/AMDGPU/{gfx1030_soffset_c40a5a.rst => gfx1030_soffset_73dae7.rst} (72%) rename llvm/docs/AMDGPU/{gfx1030_soffset_59fade.rst => gfx1030_soffset_d01a5c.rst} (61%) copy llvm/docs/AMDGPU/{gfx10_vdata_c61803.rst => gfx1030_vdata_0aba12.rst} (80%) rename llvm/docs/AMDGPU/{gfx10_vdata_b2a787.rst => gfx1030_vdata_16d321.rst} (80%) rename llvm/docs/AMDGPU/{gfx10_vdata_325b78.rst => gfx1030_vdata_35851e.rst} (81%) delete mode 100644 llvm/docs/AMDGPU/gfx1030_vdata_87fb90.rst rename llvm/docs/AMDGPU/{gfx10_vdata_87fb90.rst => gfx1030_vdata_890652.rst} (80%) rename llvm/docs/AMDGPU/{gfx10_vdata_4d8ecf.rst => gfx1030_vdata_a9ff5a.rst} (81%) delete mode 100644 llvm/docs/AMDGPU/gfx1030_vdata_b2a787.rst rename llvm/docs/AMDGPU/{gfx10_vdst_48d3a8.rst => gfx1030_vdst_2ea017.rst} (76%) rename llvm/docs/AMDGPU/{gfx1030_vdst_a49b76.rst => gfx1030_vdst_322561.rst} (70%) delete mode 100644 llvm/docs/AMDGPU/gfx1030_vdst_5d50a1.rst copy llvm/docs/AMDGPU/{gfx10_vdst_5d50a1.rst => gfx1030_vdst_709347.rst} (76%) delete mode 100644 llvm/docs/AMDGPU/gfx1030_vdst_719833.rst rename llvm/docs/AMDGPU/{gfx10_vdst_a49b76.rst => gfx1030_vdst_81a6ed.rst} (75%) rename llvm/docs/AMDGPU/{gfx10_vdst_f47754.rst => gfx1030_vdst_d71f1c.rst} (75%) delete mode 100644 llvm/docs/AMDGPU/gfx1030_vdst_d7c57e.rst rename llvm/docs/AMDGPU/{gfx10_vdst_d7c57e.rst => gfx1030_vdst_dd8a32.rst} (75%) copy llvm/docs/AMDGPU/{gfx10_opt.rst => gfx10_opt_0d447d.rst} (83%) rename llvm/docs/AMDGPU/{gfx10_opt.rst => gfx10_opt_847aed.rst} (91%) rename llvm/docs/AMDGPU/{gfx10_soffset_c40a5a.rst => gfx10_soffset_73dae7.rst} (72%) rename llvm/docs/AMDGPU/{gfx10_soffset_59fade.rst => gfx10_soffset_d01a5c.rst} (61%) rename llvm/docs/AMDGPU/{gfx1030_vdata_c61803.rst => gfx10_vdata_0aba12.rst} (80%) copy llvm/docs/AMDGPU/{gfx10_vdata_c61803.rst => gfx10_vdata_16d321.rst} (80%) rename llvm/docs/AMDGPU/{gfx1030_vdata_325b78.rst => gfx10_vdata_35851e.rst} (81%) rename llvm/docs/AMDGPU/{gfx10_vdata_c61803.rst => gfx10_vdata_890652.rst} (80%) rename llvm/docs/AMDGPU/{gfx1030_vdata_4d8ecf.rst => gfx10_vdata_a9ff5a.rst} (81%) rename llvm/docs/AMDGPU/{gfx1030_vdst_48d3a8.rst => gfx10_vdst_2ea017.rst} (76%) rename llvm/docs/AMDGPU/{gfx1030_vdst_f47754.rst => gfx10_vdst_322561.rst} (71%) copy llvm/docs/AMDGPU/{gfx10_vdst_5d50a1.rst => gfx10_vdst_709347.rst} (76%) delete mode 100644 llvm/docs/AMDGPU/gfx10_vdst_719833.rst copy llvm/docs/AMDGPU/{gfx10_vdst_5d50a1.rst => gfx10_vdst_81a6ed.rst} (76%) copy llvm/docs/AMDGPU/{gfx10_vdst_5d50a1.rst => gfx10_vdst_d71f1c.rst} (76%) rename llvm/docs/AMDGPU/{gfx10_vdst_5d50a1.rst => gfx10_vdst_dd8a32.rst} (76%) create mode 100644 llvm/include/llvm/Debuginfod/HTTPServer.h create mode 100644 llvm/lib/Debuginfod/HTTPServer.cpp create mode 100644 llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp create mode 100644 llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp create mode 100644 llvm/lib/Target/AMDGPU/GCNVOPDUtils.h delete mode 100644 llvm/test/Assembler/insertvalue-invalid-type-1.ll create mode 100644 llvm/test/Bitcode/Inputs/bitcode-parseconstant-delay-select.bc create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll create mode 100644 llvm/test/CodeGen/AArch64/sme-intrinsics-add.ll create mode 100644 llvm/test/CodeGen/AArch64/vector-global-i1.ll delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.rel [...] create mode 100644 llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir create mode 100644 llvm/test/CodeGen/AMDGPU/minmax.ll create mode 100644 llvm/test/CodeGen/AMDGPU/verify-vopd.mir create mode 100644 llvm/test/CodeGen/AMDGPU/vopc_dpp.mir create mode 100644 llvm/test/CodeGen/AMDGPU/vopd-combine.mir create mode 100644 llvm/test/CodeGen/AMDGPU/waitcnt-vinterp.mir create mode 100644 llvm/test/CodeGen/LoongArch/double-imm.ll create mode 100644 llvm/test/CodeGen/LoongArch/float-imm.ll create mode 100644 llvm/test/CodeGen/LoongArch/frame.ll create mode 100644 llvm/test/CodeGen/LoongArch/ir-instruction/br.ll create mode 100644 llvm/test/CodeGen/LoongArch/ir-instruction/call.ll create mode 100644 llvm/test/CodeGen/LoongArch/ir-instruction/indirectbr.ll create mode 100644 llvm/test/CodeGen/LoongArch/ir-instruction/load-store.ll create mode 100644 llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll create mode 100644 llvm/test/CodeGen/PowerPC/tls-crash.mir create mode 100644 llvm/test/CodeGen/RISCV/rvv/active_lane_mask.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/addi-rvv-stack-object.mir create mode 100644 llvm/test/CodeGen/VE/Scalar/load_stk.ll create mode 100644 llvm/test/CodeGen/VE/Scalar/store_stk.ll delete mode 100644 llvm/test/CodeGen/X86/critical-edge-split-2.ll delete mode 100644 llvm/test/CodeGen/X86/nonconst-static-div.ll delete mode 100644 llvm/test/CodeGen/X86/nonconst-static-iv.ll delete mode 100644 llvm/test/CodeGen/X86/pr33396.ll delete mode 100644 llvm/test/CodeGen/X86/pr49839-trapping-aggregate.ll create mode 100644 llvm/test/CodeGen/X86/pr56351.ll create mode 100644 llvm/test/CodeGen/X86/rdpru.ll delete mode 100644 llvm/test/CodeGen/X86/selectiondag-dominator.ll create mode 100644 llvm/test/CodeGen/X86/selectiondag-stackmap-legalize.ll create mode 100644 llvm/test/DebugInfo/verify-di-preserve.ll create mode 100644 llvm/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_TSTBR14.s create mode 100644 llvm/test/MC/X86/RDPRU.s create mode 100644 llvm/test/ThinLTO/X86/selective-save-temps.ll create mode 100644 llvm/test/Transforms/GVN/remarks-selfdomination.ll delete mode 100644 llvm/test/Transforms/GlobalOpt/constant-can-trap.ll delete mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/2007-02-23-sdiv.ll create mode 100644 llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/load-partial-vector-shuffle.ll delete mode 100644 llvm/test/Transforms/SimplifyCFG/2006-10-19-UncondDiv.ll delete mode 100644 llvm/test/Transforms/SimplifyCFG/ConditionalTrappingConstantExpr.ll delete mode 100644 llvm/test/Transforms/SimplifyCFG/PR16069.ll delete mode 100644 llvm/test/Transforms/SimplifyCFG/PR17073.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/hoist-skip-token.ll create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/loongar [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/loongar [...] create mode 100644 llvm/unittests/Debuginfod/HTTPServerTests.cpp create mode 100644 mlir/lib/Dialect/GPU/IR/InferIntRangeInterfaceImpls.cpp create mode 100644 mlir/test/Dialect/GPU/int-range-interface.mlir create mode 100644 mlir/test/Dialect/LLVMIR/callgraph.mlir create mode 100644 mlir/test/Dialect/SparseTensor/rewriting.mlir create mode 100644 mlir/test/IR/affine-set.mlir create mode 100644 mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reshape.mlir create mode 100644 mlir/unittests/IR/InterfaceTest.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 1 month

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig updated (dcc9b683dc -> 3d5d6bd554)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig in repository toolchain/ci/binutils-gdb. from dcc9b683dc Automatic date update in version.in adds 1e3a4f12e7 Automatic date update in version.in adds 0f2f2e7019 RISC-V: Update Zihintpause extension version adds 9386188e95 x86-64: improve handling of branches to absolute addresses adds 02b83698ef x86: restore masking of displacement kinds adds a775efc84d x86: fold Disp32S and Disp32 adds 58098fd779 gas/testsuite: properly exclude aout in all/weakref1u adds 2c474c4694 [gdb/symtab] Add get/set functions for per_cu->lang/unit_type adds a0f3a4c646 opcodes/avr: Implement style support in the disassembler adds 407115429b Modified changes for split-dwarf and dwarf-5. adds d8efadbdd9 Synchronize libbierty sources with gcc. adds 0772daccb3 objcopy: bfd_alloc orelocation adds eeeaf705fe alloc gas seginfo on notes obstack adds 96c33f79de Fix snafu in rust demangler recursion limit code adds 10e52570b8 Automatic date update in version.in adds 8180707f90 x86: de-duplicate sub-architecture strings accumulation adds 6ceeed2506 x86: macro-ize cpu_arch[] entries adds c368d2a802 x86: introduce fake processor type to mark sub-arch entries [...] adds 4694a0e5fe Support for location and range lists for split-dwarf and dwarf-5. adds 736918239b gdb: LoongArch: add orig_a0 into register set adds 3acd9a692d Make 'import gdb.events' work adds 99298c958c Add gdb.Objfile.is_file attribute adds 22f8e2e726 [gdb/exp] Fix internal error when printing C++ pointer-to-member adds 8df9766816 Automatic date update in version.in adds d92c7521f9 x86: don't leak sub-architecture accumulated strings adds 3ce2ebcf88 x86: permit "default" with .arch adds ae89daecb1 x86: generalize disabling of sub-architectures adds f68697e823 x86: introduce a state stack for .arch adds ad349f2493 Descriptive DWARF operations dump support for DW_AT_rank adds c975cec5ff x86: fix 3-operand insn reverse-matching adds 3d0738af2a x86: fold two switch() statements in match_template() adds 8bd915b770 x86: make D attribute usable for XOP and FMA4 insns adds fb5a4a581d elf: Copy p_align of PT_GNU_STACK for stack alignment adds 41bbac64c3 gprofng: implement a functional gp-display-html adds 2025522ac7 Automatic date update in version.in adds 9b5ebf652b PR29320, 'struct obstack' declared inside parameter list adds 37cf60c6a6 RISC-V: Fix requirement handling on Zhinx+{D,Q} adds 3d5d6bd554 RISC-V: Fix disassembling Zfinx with -M numeric No new revisions were added by this update. Summary of changes: ChangeLog | 13 + bfd/elf.c | 4 +- bfd/elfxx-riscv.c | 32 +- bfd/version.h | 2 +- binutils/bucomm.c | 13 + binutils/bucomm.h | 2 + binutils/dwarf.c | 54 +- binutils/dwarf.h | 2 + binutils/objcopy.c | 37 +- gas/as.h | 3 + gas/config/tc-i386-intel.c | 9 +- gas/config/tc-i386.c | 996 +- gas/config/tc-i386.h | 8 +- gas/doc/c-i386.texi | 3 +- gas/frags.h | 2 - gas/output-file.c | 42 +- gas/subsegs.c | 37 +- gas/testsuite/gas/all/weakref1u.d | 2 +- gas/testsuite/gas/i386/arch-dflt.l | 19 + gas/testsuite/gas/i386/arch-dflt.s | 14 + gas/testsuite/gas/i386/arch-stk.l | 43 + gas/testsuite/gas/i386/arch-stk.s | 34 + gas/testsuite/gas/i386/i386.exp | 3 + gas/testsuite/gas/i386/inval-avx.l | 25 +- gas/testsuite/gas/i386/inval-avx.s | 6 + gas/testsuite/gas/i386/x86-64-branch-6.d | 21 + gas/testsuite/gas/i386/x86-64-branch-6.e | 7 + gas/testsuite/gas/i386/x86-64-branch-6.s | 18 + gas/testsuite/gas/riscv/fp-zhinx-insns.d | 2 +- gas/testsuite/gas/riscv/zfinx-dis-numeric.d | 10 + gas/testsuite/gas/riscv/zfinx-dis-numeric.s | 2 + gdb/NEWS | 3 + gdb/cp-valprint.c | 5 +- gdb/doc/python.texi | 7 + gdb/dwarf2/cooked-index.c | 10 +- gdb/dwarf2/cu.c | 2 +- gdb/dwarf2/index-write.c | 2 +- gdb/dwarf2/read.c | 223 +- gdb/dwarf2/read.h | 41 +- gdb/features/loongarch/base32.c | 1 + gdb/features/loongarch/base32.xml | 1 + gdb/features/loongarch/base64.c | 1 + gdb/features/loongarch/base64.xml | 1 + gdb/loongarch-linux-nat.c | 2 + gdb/loongarch-linux-tdep.c | 8 + gdb/loongarch-tdep.c | 1 + gdb/loongarch-tdep.h | 7 +- gdb/python/lib/gdb/__init__.py | 5 + gdb/python/py-evtregistry.c | 4 +- gdb/python/py-evts.c | 28 +- gdb/python/py-objfile.c | 14 + gdb/python/python-internal.h | 4 +- gdb/python/python.c | 16 +- gdb/testsuite/gdb.base/jit-reader.exp | 12 + gdb/testsuite/gdb.cp/pointer-to-member.cc | 34 + gdb/testsuite/gdb.cp/pointer-to-member.exp | 28 + gdb/testsuite/gdb.python/py-events.exp | 2 + gprofng/gp-display-html/gp-display-html.in | 14631 ++++++++++++++- libiberty/ChangeLog | 146 +- libiberty/configure | 1 + libiberty/configure.ac | 1 + libiberty/rust-demangle.c | 47 +- opcodes/ChangeLog | 9 + opcodes/avr-dis.c | 51 +- opcodes/disassemble.c | 5 + opcodes/i386-gen.c | 10 +- opcodes/i386-init.h | 132 +- opcodes/i386-opc.h | 8 +- opcodes/i386-opc.tbl | 90 +- opcodes/i386-tbl.h | 25959 +++++++++++++------------- opcodes/riscv-dis.c | 2 +- 71 files changed, 28620 insertions(+), 14399 deletions(-) create mode 100644 gas/testsuite/gas/i386/arch-dflt.l create mode 100644 gas/testsuite/gas/i386/arch-dflt.s create mode 100644 gas/testsuite/gas/i386/arch-stk.l create mode 100644 gas/testsuite/gas/i386/arch-stk.s create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.d create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.e create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.s create mode 100644 gas/testsuite/gas/riscv/zfinx-dis-numeric.d create mode 100644 gas/testsuite/gas/riscv/zfinx-dis-numeric.s create mode 100644 gdb/testsuite/gdb.cp/pointer-to-member.cc create mode 100644 gdb/testsuite/gdb.cp/pointer-to-member.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig updated (cd575a87 -> a0890ed1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig in repository toolchain/ci/base-artifacts. discards cd575a87 0: update: binutils-llvm-linux-qemu: boot new a0890ed1 0: update: binutils-llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (cd575a87) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1656 -> 1680 bytes 02-prepare_abe/console.log.xz | Bin 2732 -> 2728 bytes 03-build_abe-binutils/console.log.xz | Bin 30424 -> 30664 bytes 04-build_kernel_llvm/console.log.xz | Bin 62684 -> 65228 bytes 05-build_abe-qemu/console.log.xz | Bin 32656 -> 32560 bytes 06-build_linux/console.log.xz | Bin 3372 -> 3908 bytes 07-boot_linux/console.log.xz | Bin 6212 -> 6236 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 10 +++++----- jenkins/manifest.sh | 22 +++++++++++----------- 10 files changed, 16 insertions(+), 16 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 1 month

[gcc] branch master updated (7922f5ee649 -> e5a9d603178)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 7922f5ee649 Mips: Fix the ASAN shadow offset hook for the n32 ABI new e5a9d603178 Speed up LC SSA rewrite The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/tree-ssa-loop-manip.cc | 95 +++++++++++++++++++++++++++------------------- 1 file changed, 56 insertions(+), 39 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 1 month

[gcc] branch devel/omp/gcc-12 updated (f2cf3109e3e -> 72777e6c3cd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch devel/omp/gcc-12 in repository gcc. from f2cf3109e3e Merge branch 'releases/gcc-12' into devel/omp/gcc-12 new 5e7baa3c887 OpenMP: Move omp requires checks to libgomp new 6670b6cef3f libgomp nvptx plugin: Remove '--with-cuda-driver=[...]' etc [...] new 0c65939b4fc Define 'OMP_REQUIRES_[...]', 'GOMP_REQUIRES_[...]' in a sin [...] new 72777e6c3cd Restore 'GOMP_offload_unregister_ver' functionality The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog.omp | 42 ++++++ gcc/c/ChangeLog.omp | 21 +++ gcc/c/c-parser.cc | 10 +- gcc/config/gcn/mkoffload.cc | 35 ++++- gcc/config/nvptx/mkoffload.cc | 37 ++++-- gcc/cp/ChangeLog.omp | 21 +++ gcc/cp/parser.cc | 9 +- gcc/fortran/ChangeLog.omp | 12 ++ gcc/fortran/openmp.cc | 2 +- gcc/fortran/parse.cc | 40 +++--- gcc/lto-cgraph.cc | 117 +++++++++++++++- gcc/omp-general.h | 8 +- gcc/omp-low.cc | 5 + gcc/omp-offload.cc | 18 --- gcc/testsuite/ChangeLog.omp | 22 +++ .../c-c++-common/gomp/reverse-offload-1.c | 2 +- .../c-c++-common/gomp/target-device-ancestor-2.c | 8 +- .../c-c++-common/gomp/target-device-ancestor-5.c | 2 +- gcc/testsuite/gfortran.dg/gomp/requires-8.f90 | 14 +- .../gfortran.dg/gomp/target-device-ancestor-2a.f90 | 80 +++++++++++ .../gfortran.dg/gomp/target-device-ancestor-5.f90 | 8 +- include/ChangeLog.omp | 17 +++ include/gomp-constants.h | 6 +- libgcc/ChangeLog.omp | 10 ++ libgcc/offloadstuff.c | 9 -- libgomp/ChangeLog.omp | 74 +++++++++++ libgomp/Makefile.in | 51 +++---- libgomp/configure | 143 +------------------- libgomp/libgomp-plugin.h | 3 +- libgomp/libgomp.h | 1 - libgomp/libgomp.texi | 7 +- libgomp/oacc-host.c | 11 +- libgomp/oacc-init.c | 16 +-- libgomp/plugin/Makefrag.am | 25 ++-- libgomp/plugin/configfrag.ac | 90 +------------ libgomp/plugin/plugin-gcn.c | 19 +-- libgomp/plugin/plugin-nvptx.c | 24 ++-- libgomp/target.c | 148 +++++++++++++-------- libgomp/testsuite/Makefile.in | 5 - libgomp/testsuite/lib/libgomp.exp | 13 -- libgomp/testsuite/libgomp-test-support.exp.in | 3 - .../libgomp.c-c++-common/requires-1-aux.c | 2 +- .../testsuite/libgomp.c-c++-common/requires-1.c | 9 +- .../libgomp.c-c++-common/requires-2-aux.c | 2 - .../testsuite/libgomp.c-c++-common/requires-2.c | 10 +- .../{requires-1-aux.c => requires-3-aux.c} | 2 +- .../testsuite/libgomp.c-c++-common/requires-3.c | 24 ++++ .../libgomp.c-c++-common/requires-4-aux.c | 13 ++ .../testsuite/libgomp.c-c++-common/requires-4.c | 23 ++++ .../{requires-2-aux.c => requires-5-aux.c} | 2 +- .../testsuite/libgomp.c-c++-common/requires-5.c | 21 +++ .../testsuite/libgomp.c-c++-common/requires-6.c | 17 +++ .../libgomp.c-c++-common/requires-7-aux.c | 11 ++ .../testsuite/libgomp.c-c++-common/requires-7.c | 24 ++++ .../testsuite/libgomp.fortran/requires-1-aux.f90 | 14 ++ libgomp/testsuite/libgomp.fortran/requires-1.f90 | 26 ++++ liboffloadmic/ChangeLog.omp | 18 +++ liboffloadmic/plugin/libgomp-plugin-intelmic.cpp | 14 +- 58 files changed, 908 insertions(+), 512 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/gomp/target-device-ancestor-2a.f90 copy libgomp/testsuite/libgomp.c-c++-common/{requires-1-aux.c => requires-3-aux.c} (71%) create mode 100644 libgomp/testsuite/libgomp.c-c++-common/requires-3.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/requires-4-aux.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/requires-4.c copy libgomp/testsuite/libgomp.c-c++-common/{requires-2-aux.c => requires-5-aux.c} (54%) create mode 100644 libgomp/testsuite/libgomp.c-c++-common/requires-5.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/requires-6.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/requires-7-aux.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/requires-7.c create mode 100644 libgomp/testsuite/libgomp.fortran/requires-1-aux.f90 create mode 100644 libgomp/testsuite/libgomp.fortran/requires-1.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 1 month

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allmodconfig updated (e8e86b484e -> 8e9398e3b1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allmodconfig in repository toolchain/ci/qemu. from e8e86b484e Merge tag 'pull-riscv-to-apply-20220703-1' of github.com:ali [...] adds 8e72ceee5c Rename docs/specs/fw_cfg.txt to .rst adds 701caa3d6a Convert fw_cfg.rst to reStructuredText syntax adds 839a482695 ui/console: allow display device to be labeled with given id adds 8c0d80245f ui/cocoa: Fix clipboard text release adds ada270cd18 hw/usb/canokey: Fix CCID ZLP adds 1042563027 hw/usb/canokey: fix compatibility of qemu-xhci adds 8607b5149e docs/system/devices/usb/canokey: remove limitations on qemu-xhci adds 927b968d1b hw: canokey: Remove HS support as not compliant to the spec adds dfe2382f06 Merge tag 'kraxel-20220704-pull-request' of https://gitlab.c [...] adds 070f735333 linux-user: Add LoongArch generic header files adds 9d5cd6587a linux-user: Add LoongArch signal support adds 3418fe25fa linux-user: Add LoongArch elf support adds 1f63019632 linux-user: Add LoongArch syscall support adds da8c70ea82 linux-user: Add LoongArch cpu_loop support adds 0caebb9160 scripts: add loongarch64 binfmt config adds fffca8f227 target/loongarch: remove badaddr from CPULoongArch adds 7d552f0e0a target/loongarch: Fix missing update CSR_BADV adds 7fe7eea6ff target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong e [...] adds 9bc92b5013 target/loongarch: remove unused include hw/loader.h adds 0093b9a5ee target/loongarch: Adjust functions and structure to support [...] adds d32688ecdb default-configs: Add loongarch linux-user support adds 227e73c986 target/loongarch: Update README adds 490c03ab11 hw/intc/loongarch_pch_msi: Fix msi vector convertion adds 4f2c65877c hw/rtc/ls7a_rtc: Fix uninitialied bugs and toymatch writing [...] adds df11f3ea69 hw/rtc/ls7a_rtc: Fix timer call back function adds 53a5eb2e7a hw/rtc/ls7a_rtc: Remove unimplemented device in realized function adds e5c0367e2b hw/rtc/ls7a_rtc: Add reset function adds 6935f132e5 hw/rtc/ls7a_rtc: Fix rtc enable and disable function adds 582788c3fb hw/rtc/ls7a_rtc: Use tm struct pointer as arguments in toy_t [...] adds 59e52dcff7 hw/rtc/ls7a_rtc: Fix 'calculate' spelling errors adds 4623367697 target/loongarch: Fix the meaning of ECFG reg's VS field adds eb1e9ff8bb target/loongarch: Add lock when writing timer clear reg adds 1437479e5e Merge tag 'pull-la-20220704' of https://gitlab.com/rth7680/q [...] adds c1ca312a6f hw/rtc/ls7a_rtc: Drop unused inline functions adds 3517fb7267 target/loongarch: Clean up tlb when cpu reset adds f8d1ae8262 scripts/qemu-binfmt-conf: Add LoongArch to qemu_get_family() adds 0df0a66555 tcg/tci: Remove CONFIG_DEBUG_TCG_INTERPRETER adds ddf9326184 hw/intc/loongarch_ipi: Fix ipi device access of 64bits adds bf7ce37f8f hw/intc/loongarch_ipi: Fix mail send and any send function adds 19361471b5 Merge tag 'pull-la-20220705' of https://gitlab.com/rth7680/q [...] adds 9323af2e81 tests: fix test-cutils leaks adds e0a2602070 tests/fp: Do not build softfloat3 tests if TCG is disabled adds 94b731874a gitlab: normalize indentation in edk2/opensbi rules adds 37a2b95231 gitlab: tweak comments in edk2/opensbi jobs adds 6e131bf69b gitlab: honour QEMU_CI variable in edk2/opensbi jobs adds 3a751770ee gitlab-ci: Extend timeout for ubuntu-20.04-s390x-all to 75m adds 276dfd03f0 tests: wait max 120 seconds for migration test status changes adds 8d4e897a99 tests: wait for migration completion before looking for STOP event adds 6843ad8c03 tests: increase migration test converge downtime to 30 seconds adds 886dfe9db3 tests: use consistent bandwidth/downtime limits in migration tests adds 2116650254 disas: Remove libvixl disassembler adds 6d17020a80 po: add ukrainian translation adds 1ec8c2c01e meson.build: Require a recent version of libpng adds 7a890b7566 include/qemu/host-utils: Remove unused code in the *_overflo [...] adds d82423a697 Merge tag 'pull-request-2022-07-05' of https://gitlab.com/th [...] adds be9c61da9f xen/pass-through: merge emulated bits correctly adds c0e86b7624 xen/pass-through: don't create needless register group adds 39e19f5f67 Merge tag 'pull-xen-20220705' of https://xenbits.xen.org/git [...] adds 034d00d485 e1000: set RX descriptor status in a separate operation adds a495eba03c ebpf: replace deprecated bpf_program__set_socket_filter adds 180c2f24d5 Merge tag 'net-pull-request' of https://github.com/jasowang/ [...] adds 23f0a6c80d m68k: use correct variable name in boot info string macro adds a988465d0e m68k: virt: pass RNG seed via bootinfo block adds 0e3723005b Merge tag 'm68k-for-7.1-pull-request' of https://github.com/ [...] adds 1c69cb4e75 ppc/pnv: move root port attach to pnv_phb4_realize() adds 8625164a38 ppc/pnv: attach phb3/phb4 root ports in QOM tree adds 792e8bb629 ppc/pnv: assign pnv-phb-root-port chassis/slot earlier adds da6be50136 ppc/pnv: make pnv_ics_get() use the chip8->phbs[] array adds ca45948991 ppc/pnv: make pnv_ics_resend() use chip8->phbs[] adds 8a69bca77a ppc/pnv: make pnv_chip_power8_pic_print_info() use chip8->phbs[] adds 71cd3e5ecb ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb3 root bus adds 21870aab36 ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb4 root bus adds 59f11543e2 target/ppc: Change FPSCR_* to follow POWER ISA numbering convention adds 31cc81f728 spapr/ddw: Reset DMA when the last non-default window is removed adds c0e765dafb spapr/ddw: Implement 64bit query extension adds e82ca8acdd target/ppc: use int128.h methods in vpmsumd adds 7ca0428687 target/ppc: use int128.h methods in vadduqm adds 896d92c81d target/ppc: use int128.h methods in vaddecuq and vaddeuqm adds 8290ea509f target/ppc: use int128.h methods in vaddcuq adds b132be53a4 target/ppc: use int128.h methods in vsubuqm adds e6a5ad43de target/ppc: use int128.h methods in vsubecuq and vsubeuqm adds b7d30fae5b target/ppc: use int128.h methods in vsubcuq adds 95444afcab ppc: Define SETFIELD for the ppc target adds 81b205cecf ppc/spapr: Implement H_WATCHDOG adds bbecdb22ae target/ppc: Fix insn32.decode style issues adds bf8adfd88b target/ppc: Move mffscrn[i] to decodetree adds 394c2e2fda target/ppc: Move mffsce to decodetree adds 3e5bce70ef target/ppc: Move mffsl to decodetree adds f80d04d548 target/ppc: Move mffs[.] to decodetree adds 6cef305fe7 target/ppc: Implement mffscdrn[i] instructions adds 7141a173c8 tests/tcg/ppc64: Add mffsce test adds 4dc5f8abdc target/ppc: Add flag for ISA v2.06 BCDA instructions adds 6addef4d27 target/ppc: implement addg6s adds 38d3690bda target/ppc: implement cbcdtd adds 6b924d4afc target/ppc: implement cdtbcd adds c7e89de132 target/ppc: Return default CPU for max CPU adds 7886605961 target/ppc/cpu-models: Remove the "default" CPU alias adds 0b83377f46 target/ppc: Fix MPC8555 and MPC8560 core type to e500v1 adds 8e9398e3b1 Merge tag 'pull-ppc-20220706' of https://gitlab.com/danielhb [...] No new revisions were added by this update. Summary of changes: .gitlab-ci.d/custom-runners/ubuntu-20.04-s390x.yml | 1 + .gitlab-ci.d/edk2.yml | 133 +- .gitlab-ci.d/opensbi.yml | 134 +- MAINTAINERS | 4 - configs/targets/loongarch64-linux-user.mak | 3 + disas.c | 3 - disas/arm-a64.cc | 101 - disas/libvixl/LICENCE | 30 - disas/libvixl/README | 11 - disas/libvixl/meson.build | 7 - disas/libvixl/vixl/a64/assembler-a64.h | 4624 -------------------- disas/libvixl/vixl/a64/constants-a64.h | 2116 --------- disas/libvixl/vixl/a64/cpu-a64.h | 83 - disas/libvixl/vixl/a64/decoder-a64.cc | 877 ---- disas/libvixl/vixl/a64/decoder-a64.h | 275 -- disas/libvixl/vixl/a64/disasm-a64.cc | 3495 --------------- disas/libvixl/vixl/a64/disasm-a64.h | 177 - disas/libvixl/vixl/a64/instructions-a64.cc | 622 --- disas/libvixl/vixl/a64/instructions-a64.h | 757 ---- disas/libvixl/vixl/code-buffer.h | 113 - disas/libvixl/vixl/compiler-intrinsics.cc | 144 - disas/libvixl/vixl/compiler-intrinsics.h | 155 - disas/libvixl/vixl/globals.h | 155 - disas/libvixl/vixl/invalset.h | 775 ---- disas/libvixl/vixl/platform.h | 39 - disas/libvixl/vixl/utils.cc | 142 - disas/libvixl/vixl/utils.h | 286 -- disas/meson.build | 5 - docs/specs/{fw_cfg.txt => fw_cfg.rst} | 211 +- docs/specs/index.rst | 1 + docs/system/devices/canokey.rst | 10 - ebpf/ebpf_rss.c | 2 +- hw/intc/loongarch_ipi.c | 92 +- hw/intc/loongarch_pch_msi.c | 22 +- hw/intc/pnv_xive.c | 20 - hw/intc/pnv_xive2.c | 20 - hw/loongarch/loongson3.c | 6 +- hw/m68k/bootinfo.h | 18 +- hw/m68k/virt.c | 7 + hw/net/e1000.c | 5 +- hw/pci-host/pnv_phb3.c | 22 +- hw/pci-host/pnv_phb4.c | 40 +- hw/pci-host/pnv_phb4_pec.c | 3 - hw/ppc/pnv.c | 102 +- hw/ppc/spapr.c | 4 + hw/ppc/spapr_iommu.c | 3 +- hw/ppc/spapr_pci.c | 6 +- hw/ppc/spapr_rtas_ddw.c | 34 +- hw/rtc/ls7a_rtc.c | 154 +- hw/usb/canokey.c | 31 +- hw/watchdog/meson.build | 1 + hw/watchdog/spapr_watchdog.c | 274 ++ hw/watchdog/trace-events | 7 + hw/xen/xen_pt_config_init.c | 25 +- include/exec/poison.h | 2 - include/hw/intc/loongarch_ipi.h | 7 +- include/hw/intc/loongarch_pch_msi.h | 2 + include/hw/pci-host/pnv_phb3_regs.h | 16 - include/hw/ppc/pnv.h | 3 +- include/hw/ppc/spapr.h | 26 +- include/qemu/host-utils.h | 65 - include/standard-headers/asm-m68k/bootinfo-virt.h | 1 + include/ui/console.h | 1 + linux-user/elfload.c | 91 + linux-user/loongarch64/cpu_loop.c | 96 + linux-user/loongarch64/signal.c | 335 ++ linux-user/loongarch64/sockbits.h | 11 + linux-user/loongarch64/syscall_nr.h | 312 ++ linux-user/loongarch64/target_cpu.h | 34 + linux-user/loongarch64/target_elf.h | 12 + linux-user/loongarch64/target_errno_defs.h | 12 + linux-user/loongarch64/target_fcntl.h | 11 + linux-user/{arm => loongarch64}/target_prctl.h | 0 linux-user/loongarch64/target_resource.h | 11 + linux-user/loongarch64/target_signal.h | 13 + linux-user/loongarch64/target_structs.h | 11 + linux-user/loongarch64/target_syscall.h | 48 + linux-user/loongarch64/termbits.h | 11 + linux-user/syscall_defs.h | 6 +- meson.build | 6 +- po/LINGUAS | 1 + po/uk.po | 75 + scripts/clean-header-guards.pl | 4 +- scripts/clean-includes | 2 +- scripts/coverity-scan/COMPONENTS.md | 3 - scripts/gensyscalls.sh | 2 + scripts/qemu-binfmt-conf.sh | 9 +- target/arm/cpu.c | 7 - target/loongarch/README | 39 +- target/loongarch/cpu.c | 39 +- target/loongarch/cpu.h | 8 +- target/loongarch/csr_helper.c | 2 + target/loongarch/gdbstub.c | 2 +- target/loongarch/helper.h | 2 + target/loongarch/insn_trans/trans_privileged.c.inc | 36 + target/loongarch/internals.h | 2 + target/loongarch/op_helper.c | 10 +- target/ppc/cpu-models.c | 17 +- target/ppc/cpu-models.h | 14 +- target/ppc/cpu.h | 89 +- target/ppc/cpu_init.c | 29 +- target/ppc/dfp_helper.c | 65 + target/ppc/helper.h | 20 +- target/ppc/insn32.decode | 71 +- target/ppc/int_helper.c | 229 +- target/ppc/internal.h | 3 - target/ppc/translate/fixedpoint-impl.c.inc | 51 + target/ppc/translate/fp-impl.c.inc | 203 +- target/ppc/translate/fp-ops.c.inc | 9 - target/ppc/translate/vmx-impl.c.inc | 32 +- target/ppc/translate/vmx-ops.c.inc | 9 +- tcg/tci/tcg-target.c.inc | 7 - tcg/tci/tcg-target.h | 5 - tests/fp/meson.build | 3 + tests/qtest/migration-helpers.c | 14 + tests/qtest/migration-test.c | 59 +- tests/tcg/ppc64/Makefile.target | 1 + tests/tcg/ppc64le/Makefile.target | 1 + tests/tcg/ppc64le/mffsce.c | 37 + tests/unit/test-cutils.c | 42 +- ui/cocoa.m | 4 +- ui/console.c | 41 +- 122 files changed, 2736 insertions(+), 16092 deletions(-) create mode 100644 configs/targets/loongarch64-linux-user.mak delete mode 100644 disas/arm-a64.cc delete mode 100644 disas/libvixl/LICENCE delete mode 100644 disas/libvixl/README delete mode 100644 disas/libvixl/meson.build delete mode 100644 disas/libvixl/vixl/a64/assembler-a64.h delete mode 100644 disas/libvixl/vixl/a64/constants-a64.h delete mode 100644 disas/libvixl/vixl/a64/cpu-a64.h delete mode 100644 disas/libvixl/vixl/a64/decoder-a64.cc delete mode 100644 disas/libvixl/vixl/a64/decoder-a64.h delete mode 100644 disas/libvixl/vixl/a64/disasm-a64.cc delete mode 100644 disas/libvixl/vixl/a64/disasm-a64.h delete mode 100644 disas/libvixl/vixl/a64/instructions-a64.cc delete mode 100644 disas/libvixl/vixl/a64/instructions-a64.h delete mode 100644 disas/libvixl/vixl/code-buffer.h delete mode 100644 disas/libvixl/vixl/compiler-intrinsics.cc delete mode 100644 disas/libvixl/vixl/compiler-intrinsics.h delete mode 100644 disas/libvixl/vixl/globals.h delete mode 100644 disas/libvixl/vixl/invalset.h delete mode 100644 disas/libvixl/vixl/platform.h delete mode 100644 disas/libvixl/vixl/utils.cc delete mode 100644 disas/libvixl/vixl/utils.h rename docs/specs/{fw_cfg.txt => fw_cfg.rst} (58%) create mode 100644 hw/watchdog/spapr_watchdog.c create mode 100644 linux-user/loongarch64/cpu_loop.c create mode 100644 linux-user/loongarch64/signal.c create mode 100644 linux-user/loongarch64/sockbits.h create mode 100644 linux-user/loongarch64/syscall_nr.h create mode 100644 linux-user/loongarch64/target_cpu.h create mode 100644 linux-user/loongarch64/target_elf.h create mode 100644 linux-user/loongarch64/target_errno_defs.h create mode 100644 linux-user/loongarch64/target_fcntl.h copy linux-user/{arm => loongarch64}/target_prctl.h (100%) create mode 100644 linux-user/loongarch64/target_resource.h create mode 100644 linux-user/loongarch64/target_signal.h create mode 100644 linux-user/loongarch64/target_structs.h create mode 100644 linux-user/loongarch64/target_syscall.h create mode 100644 linux-user/loongarch64/termbits.h create mode 100644 po/uk.po create mode 100644 tests/tcg/ppc64le/mffsce.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 1 month

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allmodconfig updated (f0b3db3175 -> 2365eacffe)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allmodconfig in repository toolchain/ci/binutils-gdb. from f0b3db3175 Automatic date update in version.in adds 37eaf1f099 Automatic date update in version.in adds 178b942b8e Automatic date update in version.in adds 3972c8ffe0 Automatic date update in version.in adds 2365eacffe Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allmodconfig updated (1fad17fa -> f9eafea4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards 1fad17fa 2: update: binutils-llvm-linux-qemu: 22465 new f9eafea4 2: update: binutils-llvm-linux-qemu: 22465 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1fad17fa) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1628 -> 1888 bytes 02-prepare_abe/console.log.xz | Bin 2736 -> 2760 bytes 03-build_abe-binutils/console.log.xz | Bin 29884 -> 30800 bytes 04-build_kernel_llvm/console.log.xz | Bin 60296 -> 60384 bytes 05-build_abe-qemu/console.log.xz | Bin 32480 -> 32380 bytes 06-build_linux/console.log.xz | Bin 5084 -> 5524 bytes 08-check_regression/console.log.xz | Bin 480 -> 480 bytes 09-update_baseline/console.log | 12 ++++++------ jenkins/manifest.sh | 14 +++++++------- 9 files changed, 13 insertions(+), 13 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 1 month

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits July 2022