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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allyesconfig in repository toolchain/ci/llvm-project.
from 4b2f37b2202 [clang] fix undefined behaviour in RawComment::getFormattedText() adds 17d0ddd522b [WebAssembly] Add section names for some DWARF5 sections adds 3de89abf189 [PowerPC] Do not attempt to reuse load for 64-bit FP_TO_UIN [...] adds f3164f75270 [ARM] Only produce qadd8b under hasV6Ops adds f79cd71e145 [arm] Add big-endian version of pcrel fixups for adr instructions
No new revisions were added by this update.
Summary of changes: llvm/lib/MC/MCObjectFileInfo.cpp | 12 ++++- llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 +- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 20 +++----- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 5 +- llvm/test/CodeGen/ARM/sadd_sat.ll | 1 + llvm/test/CodeGen/PowerPC/pr43976.ll | 59 ++++++++++++++++++++++ llvm/test/MC/ARM/pcrel-global.s | 2 + 7 files changed, 85 insertions(+), 16 deletions(-) create mode 100644 llvm/test/CodeGen/PowerPC/pr43976.ll