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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/qemu.
from ca61fa4b80 Merge remote-tracking branch 'remotes/quic/tags/pull-hex-202 [...] adds c5b4ee5bb7 target/riscv: Introduce temporary in gen_add_uw() adds e47fb6c1e9 target/riscv: fix clzw implementation to operate on arg1 adds 45d1749c1c target/riscv: clwz must ignore high bits (use shift-left & c [...] adds 878dd0e9ac target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties adds bb4dc158e0 target/riscv: Reassign instructions to the Zba-extension adds dd98a74034 target/riscv: Remove the W-form instructions from Zbs adds 628d8c88c1 target/riscv: Remove shift-one instructions (proposed Zbo in [...] adds f36a4a89aa target/riscv: Reassign instructions to the Zbs-extension adds fd4b81a304 target/riscv: Add instructions of the Zbc-extension adds 16c38f36f5 target/riscv: Reassign instructions to the Zbb-extension adds d7a4fcb034 target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci adds 7e68e6c79b target/riscv: Add a REQUIRE_32BIT macro adds a1095bdcb0 target/riscv: Add rev8 instruction, removing grev/grevi adds 06dfa8a5c5 target/riscv: Add zext.h instructions to Zbb, removing pack/ [...] adds 9916ea3c97 target/riscv: Remove RVB (replaced by Zb[abcs]) adds 02c1b569a1 disas/riscv: Add Zb[abcs] instructions adds a88f040239 target/riscv: Set mstatus_hs.[SD|FS] bits if Clean and V=1 i [...] adds 34229c46a7 hw/char: ibex_uart: Register device in 'input' category adds 5515ff162e hw/char: shakti_uart: Register device in 'input' category adds 6a03349007 hw/char: sifive_uart: Register device in 'input' category adds 284a66a8f6 hw/char/mchp_pfsoc_mmuart: Simplify MCHP_PFSOC_MMUART_REG de [...] adds 24ce762df7 hw/char/mchp_pfsoc_mmuart: Use a MemoryRegion container adds 31ca70b5ff hw/char/mchp_pfsoc_mmuart: QOM'ify PolarFire MMUART adds b7af62ae2c hw/dma: sifive_pdma: Fix Control.claim bit detection adds 47b5fbf5a3 hw/dma: sifive_pdma: Don't run DMA when channel is disclaimed adds 9ae6ecd848 hw/riscv: shakti_c: Mark as not user creatable adds 3c01933983 Merge remote-tracking branch 'remotes/alistair23/tags/pull-r [...]
No new revisions were added by this update.
Summary of changes: disas/riscv.c | 157 +++++++++++- hw/char/ibex_uart.c | 1 + hw/char/mchp_pfsoc_mmuart.c | 116 +++++++-- hw/char/shakti_uart.c | 1 + hw/char/sifive_uart.c | 1 + hw/dma/sifive_pdma.c | 13 +- hw/riscv/shakti_c.c | 7 + include/hw/char/mchp_pfsoc_mmuart.h | 17 +- target/riscv/bitmanip_helper.c | 65 +---- target/riscv/cpu.c | 30 +-- target/riscv/cpu.h | 11 +- target/riscv/helper.h | 6 +- target/riscv/insn32.decode | 115 ++++----- target/riscv/insn_trans/trans_rvb.c.inc | 419 ++++++++++---------------------- target/riscv/translate.c | 36 ++- 15 files changed, 516 insertions(+), 479 deletions(-)