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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig in repository toolchain/ci/llvm-project.
from 57d8b8d6f0b [openmp] Fixed hang if detached task was serialized. adds 79f059c4ac8 [mlir] NFC - Fix OperationSupport.cpp::findNamedAttr adds 03092f2fa7b [mlir] Add BoolArrayAttr in Tablegen + Builder support adds 5b0502dff5b [pstl] A fix for move placement-new (and destroy) allocated [...] adds 22d40cc3a72 [Analyzer][StreamChecker] Changed representation of stream [...] adds 1907f28b47c [Analyzer][StreamChecker] Fixed compile error - NFC. adds 10e2e7de0c0 [WebAssembly] iterate stack in DebugFixup from the top. adds 364c595403c [SVE] Ignore scalable vectors in InterleavedLoadCombinePass adds 36cdc17f8cf [mlir][Vector] Make minor identity permutation map optional [...] adds 1870e787af9 [mlir][Vector] Add an optional "masked" boolean array attri [...] adds 681a161ff54 AMDGPU: Remove outdated comment adds 4c70074e543 AMDGPU/GlobalISel: Fix splitting wide VALU, non-vector loads adds d1866f89472 [MLIR] [Linalg] Add option to use the partial view after pr [...] adds a4cb9bec1ca [mlir] Support optional attributes in assembly formats adds 23dc948d362 [MLIR] Use `MLIR_INCLUDE_TESTS` to conditionally compile tests. adds 623b2542446 [Local] Do not ignore zexts in salvageDebugInfo, PR45923 adds 2084330e41d [lldb/Reproducers] Add skipIfReproducer to more tests adds 691980ebb47 [llvm][NFC] Fixed non-compliant style in InlineAdvisor.h adds 31ecef76275 [SystemZ] Don't create PERMUTE nodes with an undef operand.
No new revisions were added by this update.
Summary of changes: .../lib/StaticAnalyzer/Checkers/StreamChecker.cpp | 252 +++++++--------- .../step_over_breakpoint/TestStepOverBreakpoint.py | 1 + .../deleted-executable/TestDeletedExecutable.py | 1 + .../functionalities/load_unload/TestLoadUnload.py | 1 + .../postmortem/elf-core/TestLinuxCore.py | 12 + .../postmortem/netbsd-core/TestNetBSDCore.py | 6 + llvm/include/llvm/Analysis/InlineAdvisor.h | 6 +- llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp | 17 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 15 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 7 - llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 3 +- .../Target/WebAssembly/WebAssemblyDebugFixup.cpp | 5 +- llvm/lib/Transforms/IPO/Inliner.cpp | 6 +- llvm/lib/Transforms/Utils/Local.cpp | 9 +- .../AMDGPU/GlobalISel/regbankselect-load.mir | 320 ++++++++++++++------- llvm/test/CodeGen/SystemZ/vec-perm-14.ll | 27 ++ .../SystemZ/vector-constrained-fp-intrinsics.ll | 6 +- .../test/Transforms/InstCombine/cast-mul-select.ll | 6 +- mlir/CMakeLists.txt | 11 +- .../mlir/Dialect/Linalg/Transforms/Transforms.h | 23 ++ mlir/include/mlir/Dialect/Vector/EDSC/Intrinsics.h | 3 + mlir/include/mlir/Dialect/Vector/VectorOps.h | 9 + mlir/include/mlir/Dialect/Vector/VectorOps.td | 141 ++++++--- mlir/include/mlir/IR/Builders.h | 1 + mlir/include/mlir/IR/OpBase.td | 4 + .../VectorToLLVM/ConvertVectorToLLVM.cpp | 69 +++-- mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp | 65 +++-- .../Dialect/Affine/Transforms/SuperVectorize.cpp | 8 +- mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp | 30 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 169 +++++++++-- mlir/lib/Dialect/Vector/VectorTransforms.cpp | 10 +- mlir/lib/IR/Builders.cpp | 7 +- mlir/lib/IR/OperationSupport.cpp | 2 +- .../AffineToStandard/lower-affine-to-vector.mlir | 18 +- .../Conversion/VectorToLLVM/vector-to-llvm.mlir | 18 ++ .../Conversion/VectorToLoops/vector-to-loops.mlir | 35 ++- .../Affine/SuperVectorize/vectorize_1d.mlir | 47 ++- .../Affine/SuperVectorize/vectorize_2d.mlir | 20 +- .../Affine/SuperVectorize/vectorize_3d.mlir | 2 +- mlir/test/Dialect/Linalg/promote.mlir | 15 +- mlir/test/Dialect/Vector/invalid.mlir | 69 ++++- mlir/test/Dialect/Vector/ops.mlir | 8 +- mlir/test/Dialect/Vector/vector-transforms.mlir | 32 +-- mlir/test/lib/Dialect/Test/TestOps.td | 8 +- mlir/test/lib/Transforms/TestLinalgTransforms.cpp | 16 +- mlir/test/mlir-tblgen/op-format.mlir | 7 + mlir/tools/mlir-opt/CMakeLists.txt | 18 +- mlir/tools/mlir-opt/mlir-opt.cpp | 4 + mlir/tools/mlir-tblgen/OpFormatGen.cpp | 10 +- pstl/include/pstl/internal/algorithm_impl.h | 120 ++++++-- pstl/include/pstl/internal/memory_impl.h | 67 ++++- .../include/pstl/internal/parallel_backend_utils.h | 118 ++++++++ .../algorithms/alg.merge/inplace_merge.pass.cpp | 7 + .../alg.modifying.operations/remove.pass.cpp | 7 + .../alg.modifying.operations/rotate.pass.cpp | 3 + .../alg.modifying.operations/unique.pass.cpp | 6 + .../alg.sorting/alg.set.operations/set.pass.cpp | 151 +++++++++- .../alg.sorting/partial_sort_copy.pass.cpp | 5 + pstl/test/support/utils.h | 76 +++++ 59 files changed, 1553 insertions(+), 586 deletions(-) create mode 100644 llvm/test/CodeGen/SystemZ/vec-perm-14.ll