[Tcwg-commits] [llvm] branch master updated (b6b723f1bfa -> be92ae330e4)

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from b6b723f1bfa [X86][AsmParser] Check for invalid 16-bit base register in [...] new be92ae330e4 [X86][SSE] Add sdiv by (nonuniform) minus one tests (PR37119)

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Summary of changes: test/CodeGen/X86/combine-sdiv.ll | 297 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 297 insertions(+)