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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/llvm-project.
from 3829d85cc61 [lldb/PlatformDarwin] Return POSIX path from FindXcodeConte [...] adds cc691f3384c Disable loader-uninitialized tests on Windows adds 68f163df0ec [AMDGPU] Print DWARF register numbers in AMDGPUInstPrinter adds a11b3304188 [lldb/Bindings] Check that process isn't None before callin [...] adds c9b454a1b7e AMDGPU/GlobalISel: Fix verifier errors on image atomics adds f2f8bdc2b16 Fix `-Wunused-variable` warning. NFC. adds a9e05d5711a [libc] Add AOR testing dependencies for buildbot workers. adds 4e0fe038f43 Revert "Avoid emitting unreachable SP adjustments after `throw`" adds ab2dcff309f Support repeated machine outlining adds 7b166d51823 Revert "Support repeated machine outlining" adds 7ca473a27bd [MLIR] Add support for out of tree external projects using MLIR adds 2fae7878d55 [mlir][Vector] Mostly-NFC - Restructure options for lowerin [...] adds 3145427dd73 [mlir][NFC] Replace all usages of PatternMatchResult with L [...] adds bd0ca2627cf [mlir] Update DRR patterns to notify the rewriter why a pat [...] adds d577193c0f7 [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d adds e7a811b3193 PR45133: Don't crash if the active member of a union change [...] adds 34d0d6ba74f [mlir][DialectConversion] Print the operation being legaliz [...] adds 9bca8fc4cf5 Revert "AMDGPU/GlobalISel: Fully handle 0 dmask case during [...] adds 4d35055635a [libc] Add sigaction adds 974d649f8ea CET for Exception Handle adds c3df69faa03 [Alignment][NFC] Deprecate getTransientStackAlignment adds bd763e2cf7c [clang] Fix crash on visiting null nestedNameSpecifier. adds ef56b55e129 [NFC][ARM] Add thumb triple to test adds 5672ae8d868 [SCCP] Use constant ranges for select, if cond is overdefined. adds cda2b0769f5 [InstCombine][X86] Tests for variable but in-range per-elem [...] adds 8d019cda851 Fix ac1d23ed7de01fb3 interaction with gold plugin adds 28c5d97beec [ARM,MVE] Add intrinsics and isel for MVE integer VMLA. adds 928776de923 [ARM,MVE] Add intrinsics for the VQDMLAH family. adds c5b81466c2b Reland D75470 [SVE] Auto-generate builtins and header for svld1. adds f4e495a18e8 [InstCombine][X86] simplifyX86varShift - convert variable i [...] adds 0db7244295b [SCCP] Precommit some additional tests for integer ranges. adds a0a3a9c5a83 [DebugInfo] Fix multi-byte entry values in call site values adds 940ba1465b2 Fix possible assertion when using PBQP with debug info adds 4788ca450fe [AArch64][SVE] Change pointer type of nontemporal load/stor [...] adds 9bdcd9bf443 [llvm][SVE] Addressing mode for FF/NF loads. adds b09cce07c7e [OPENMP50]Codegen for detach clause. adds db31e2e1e6c [lldb/Target] Support more than 2 symbols in StackFrameRecognizer adds a8901a03544 [mlir] NFC: Fix trivial typos in documents adds 6739805e24c [ARM] Track epilogue instructions with FrameDestroy flag (NFC) adds 4cf01ed75e3 [hip] Revise `GlobalDecl` constructors. NFC. adds 2aaafaf5005 [NFC] Add missing REQUIRES clause to a test adds 96b70809d95 [NFC][PowerPC] Add a new MIR file to test if-converter pass adds d000655a8cd [Alignment][NFC] Deprecate getMaxAlignment adds 73cea83a6f5 [IPRA][ARM] Spill extra registers at -Oz adds 85334b030a6 [NFCI][SCEV] Avoid recursion in SCEVExpander::isHighCostExp [...] adds f3e297d90fc Fix build with gcc 7.5 by adding a "redundant move" adds 4d506da91c4 Fix `warning: extra ‘;’` (NFC) adds 24c2e61362a [InstCombine][X86] Add additional demandedelts style test f [...] adds 3481062bc68 [lldb] [testsuite] Enable forgotten -gsplit-dwarf for 2 testfiles adds c21866476e1 [PowerPC][AIX] Implement by-val caller arguments in a singl [...] adds ef64ba83119 [InstCombine] GEPOperator::accumulateConstantOffset does no [...] adds dd12826808f [Syntax] Build template declaration nodes adds 9f981e9adf9 Reland "[gn build] (manually) port 8b409eaba" adds 06150e8356c [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds f57290ec57d [gn build] add rebase changes that should have been in 9f98 [...] adds d1a7bfca743 [AMDGPU] Fix AMDGPUUnifyDivergentExitNodes adds ea4597eef10 Reapply "AMDGPU/GlobalISel: Fully handle 0 dmask case durin [...] adds 4ea1baf6a0e AMDGPU: Initial, crude support for indirect calls adds fc2a5ef9c87 [NFC][PowerPC] Update test adds 642a424bc49 [gn build] remove a workaround that is no longer needed adds 04a309dd0be [libc] Adding memcpy implementation for x86_64 adds 881f5b5a7b2 Revert "[Syntax] Build template declaration nodes" adds e13d153c1b5 [ARM,MVE] Add intrinsics for the VQDMLAD family. adds e6a74803d4e [VPlan] Use underlying value for printing, if available. adds 0d896278c81 Support repeated machine outlining adds 1cc09dcefcc Add missing module map entry. adds 1e4ee0bfc52 [Dominators] Fixup comments in GenericDominatorTreeConstruc [...] adds dc5f9826396 [GlobalISel] Port some basic undef combines from DAGCombiner.cpp adds 9c6458ecf8c [InstSimplify] Add bitreverse/bswap vector tests adds 746bd860c9c Replace get*Alignment() methods with get*Align() equivalents. adds e009fad342c [PowerPC] Remove UB from PPCInstrInfo when handling rotates [...] adds f8e8f0a6038 [TSan] Support pointer authentication in setjmp/longjmp int [...] adds 6f79f80e6e4 [HIP] Fix duplicate clang -cc1 options on MSVC toolchain adds 1010c44b4c0 [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds 2f8894a5b8b [OPENMP50]Add support for extended device clause in target [...] adds ebec984e14a [AliasAnalysis] Misc fixes for checking aliasing with scala [...] adds 4e8830830ee [libc] Add a missing deps to the linux syscalls target. adds e225e770f7e [TableGen][GlobalISel] Rework RegisterBankEmitter for easie [...] adds e9f22fd4293 [TableGen][GlobalISel] Account for HwMode in RegisterBank r [...] adds 4be504a97f9 [mlir] Add support for detecting single use callables in th [...] adds b40ee7ff1b1 [lldb/MemoryHistoryAsan] Fix address resolution for recorde [...] adds 1e431322099 [mlir][LLVM] Add masked reads and writes. adds 6bdb0efa42b [InstSimplify] Regenerate OR tests adds 47ce1406c8e [InstSimplify] Add missing vector OR test to show lack of D [...] adds 9d40292a642 [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds 64a5e57a61b [mlir] Disable notifyMatchFailure in NDEBUG adds 498b53890d8 [SelectionDAGBuilder][FPEnv] Take into account SelectionDAG [...] adds 22c66c1a28c [JumpThreading] add a miscompile test based on discussion i [...] adds c682a605eb4 [Fuchsia] Include llvm-gsymutil tool in the Fuchsia toolchain adds e24e95fe900 Remove CompositeType class. adds 49bdfd888d3 [InstSimplify] Add missing vector masked add tests to show [...] adds 30ccc2e8d24 [libc++] Add missing visibility annotation for __base adds faba1d034a0 [LangRef] add explanatory text for select poison semantics [...] adds acaf1442226 [LangRef] fix formatting tick; NFC adds 00c1cd19349 [VPlan] Record underlying value for VPValues created by add [...] adds 9bb5685b216 [clang-tidy] misc-unconventional-assign-operator suggest to [...] adds ae7bda5dac7 [mlir][Linalg] Remove initial value for conditions. adds fd2c15e6024 [VPlan] Do not print mapping for Value2VPValue. adds 85bd4369610 [Host] Remove some code that's not needed anymore. adds 7b5d4669daa [MLIR] Allow global with an external linkage to include ini [...] adds 99336bf95ab [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds f3c857fae29 [OPENMP50]Add basic codegen support for ancestor device modifier. adds f951b0f82df [lit] Add builtin support for flaky tests in lit adds 14970669dde [lldb/Test] Add unittest for FileSpec::operator bool() adds 5ffb30fd6c7 [lldb/PlatformDarwin] Expose current toolchain and CL tools [...] adds 1365ab4b63b [clang-tidy] RenamerClangTidy now correctly renames `using [...] adds 47622efc6f0 [clang/test] Add test for DIFlagAllCallsDescribed under -gg [...]
No new revisions were added by this update.
Summary of changes: .../misc/UnconventionalAssignOperatorCheck.cpp | 5 +- .../clang-tidy/utils/RenamerClangTidyCheck.cpp | 5 + ...isc-unconventional-assign-operator-precxx11.cpp | 6 + .../checkers/readability-identifier-naming.cpp | 5 + clang/cmake/caches/Fuchsia-stage2.cmake | 1 + clang/include/clang/AST/GlobalDecl.h | 22 +- clang/include/clang/AST/OpenMPClause.h | 28 +- clang/include/clang/Basic/BuiltinsAArch64.def | 13 - clang/include/clang/Basic/BuiltinsSVE.def | 20 + clang/include/clang/Basic/CMakeLists.txt | 10 +- clang/include/clang/Basic/DiagnosticASTKinds.td | 3 + clang/include/clang/Basic/OpenMPKinds.def | 8 + clang/include/clang/Basic/OpenMPKinds.h | 7 + clang/include/clang/Basic/TargetBuiltins.h | 49 ++ clang/include/clang/Basic/arm_mve.td | 61 ++ clang/include/clang/Basic/arm_sve.td | 125 ++++ clang/include/clang/Parse/Parser.h | 4 +- clang/include/clang/Sema/Sema.h | 4 +- clang/include/clang/module.modulemap | 1 + clang/lib/AST/Expr.cpp | 2 +- clang/lib/AST/ExprConstant.cpp | 35 +- clang/lib/AST/ItaniumMangle.cpp | 10 +- clang/lib/AST/Mangle.cpp | 2 +- clang/lib/AST/OpenMPClause.cpp | 5 + clang/lib/Basic/OpenMPKinds.cpp | 17 +- clang/lib/Basic/Targets/AArch64.cpp | 4 + clang/lib/CodeGen/CGBuiltin.cpp | 105 ++-- clang/lib/CodeGen/CGDebugInfo.cpp | 3 +- clang/lib/CodeGen/CGDecl.cpp | 2 +- clang/lib/CodeGen/CGExpr.cpp | 4 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 61 +- clang/lib/CodeGen/CGOpenMPRuntime.h | 33 +- clang/lib/CodeGen/CGStmtOpenMP.cpp | 5 +- clang/lib/CodeGen/CodeGenFunction.h | 1 + clang/lib/CodeGen/CodeGenModule.cpp | 9 +- clang/lib/CodeGen/CodeGenModule.h | 3 - clang/lib/Driver/ToolChains/MSVC.cpp | 6 +- clang/lib/Parse/ParseOpenMP.cpp | 31 +- clang/lib/Sema/SemaOpenMP.cpp | 38 +- clang/lib/Sema/SemaTemplate.cpp | 5 +- clang/lib/Sema/TreeTransform.h | 13 +- clang/lib/Serialization/ASTReader.cpp | 2 + clang/lib/Serialization/ASTWriter.cpp | 2 + clang/test/CodeGen/arm-mve-intrinsics/ternary.c | 645 ++++++++++++++++++++ clang/test/CodeGen/arm-mve-intrinsics/vqdmlad.c | 677 +++++++++++++++++++++ clang/test/CodeGen/attr-loader-uninitialized.c | 1 + .../test/CodeGenCXX/attr-loader-uninitialized.cpp | 1 + .../CodeGenCXX/dbg-info-all-calls-described.cpp | 12 + clang/test/Driver/hip-options.hip | 5 + clang/test/OpenMP/target_ast_print.cpp | 18 +- clang/test/OpenMP/target_data_device_messages.cpp | 5 +- clang/test/OpenMP/target_device_codegen.cpp | 50 ++ clang/test/OpenMP/target_device_messages.cpp | 14 +- .../OpenMP/target_enter_data_device_messages.cpp | 5 +- .../OpenMP/target_exit_data_device_messages.cpp | 5 +- .../test/OpenMP/target_update_device_messages.cpp | 5 +- clang/test/OpenMP/task_codegen.c | 12 +- clang/test/Parser/cxx-template-decl.cpp | 6 + clang/test/SemaCXX/constant-expression-cxx2a.cpp | 35 ++ clang/unittests/CodeGen/CodeGenExternalTest.cpp | 2 +- clang/utils/TableGen/SveEmitter.cpp | 664 +++++++++++++++++++- clang/utils/TableGen/TableGen.cpp | 18 + clang/utils/TableGen/TableGenBackends.h | 3 + compiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp | 8 + libc/CMakeLists.txt | 1 + libc/cmake/modules/LLVMLibCCheckCpuFeatures.cmake | 180 +++--- libc/cmake/modules/LLVMLibCRules.cmake | 9 +- libc/cmake/modules/cpu_features/check_avx.cpp | 8 - libc/cmake/modules/cpu_features/check_avx512f.cpp | 8 - .../modules/cpu_features/check_cpu_features.cpp.in | 29 + libc/cmake/modules/cpu_features/check_sse.cpp | 8 - libc/cmake/modules/cpu_features/check_sse2.cpp | 8 - libc/config/linux/CMakeLists.txt | 2 + libc/config/linux/api.td | 19 + libc/config/linux/signal.h.in | 4 + libc/lib/CMakeLists.txt | 2 + libc/spec/posix.td | 18 +- libc/spec/stdc.td | 1 - libc/src/signal/linux/CMakeLists.txt | 33 + libc/src/signal/linux/__restore.cpp | 20 + libc/src/signal/linux/sigaction.cpp | 56 ++ libc/src/signal/sigaction.h | 22 + libc/src/string/CMakeLists.txt | 63 +- libc/src/string/memcpy.cpp | 22 + libc/src/string/memcpy.h | 21 + libc/src/string/memcpy_arch_specific.h.def | 65 ++ libc/src/string/memory_utils/CMakeLists.txt | 7 +- libc/src/string/memory_utils/memcpy_utils.h | 100 +++ libc/src/string/memory_utils/utils.h | 7 +- libc/src/string/x86/CMakeLists.txt | 4 + libc/src/string/x86/memcpy_arch_specific.h.inc | 35 ++ libc/test/src/signal/CMakeLists.txt | 15 + libc/test/src/signal/sigaction_test.cpp | 66 ++ libc/test/src/string/CMakeLists.txt | 21 + libc/test/src/string/memcpy_test.cpp | 53 ++ libc/test/src/string/memory_utils/CMakeLists.txt | 7 + .../src/string/memory_utils/memcpy_utils_test.cpp | 208 +++++++ libc/test/src/string/memory_utils/utils_test.cpp | 8 + libc/utils/buildbot/Dockerfile | 3 + libcxx/include/functional | 2 +- lldb/bindings/interface/SBAddress.i | 2 +- lldb/include/lldb/Target/StackFrameRecognizer.h | 14 +- lldb/packages/Python/lldbsuite/test/lldbutil.py | 2 +- lldb/source/Commands/CommandObjectFrame.cpp | 41 +- lldb/source/Commands/Options.td | 3 +- lldb/source/Host/macosx/objcxx/Host.mm | 37 -- .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp | 3 +- .../MemoryHistory/asan/MemoryHistoryASan.cpp | 7 +- .../Plugins/Platform/MacOSX/PlatformDarwin.cpp | 27 + .../Plugins/Platform/MacOSX/PlatformDarwin.h | 9 + .../Plugins/Process/Utility/HistoryThread.cpp | 5 +- .../source/Plugins/Process/Utility/HistoryThread.h | 3 +- .../Plugins/Process/Utility/HistoryUnwind.cpp | 11 +- .../source/Plugins/Process/Utility/HistoryUnwind.h | 6 +- lldb/source/Target/AssertFrameRecognizer.cpp | 24 +- lldb/source/Target/StackFrameRecognizer.cpp | 51 +- .../frame/recognizer/TestFrameRecognizer.py | 62 +- lldb/test/API/commands/frame/recognizer/main.m | 5 +- .../Shell/SymbolFile/DWARF/debug-types-basic.test | 2 +- .../SymbolFile/DWARF/debug-types-expressions.test | 8 +- lldb/unittests/Platform/PlatformDarwinTest.cpp | 18 + lldb/unittests/Target/StackFrameRecognizerTest.cpp | 3 +- lldb/unittests/Utility/FileSpecTest.cpp | 6 + llvm/docs/LangRef.rst | 5 +- .../LLJITWithLazyReexports.cpp | 2 +- llvm/examples/ThinLtoJIT/ThinLtoJIT.cpp | 2 +- llvm/examples/ThinLtoJIT/ThinLtoModuleIndex.cpp | 2 +- llvm/include/llvm/Analysis/MemoryLocation.h | 10 + .../llvm/Analysis/ScalarEvolutionExpander.h | 16 +- llvm/include/llvm/CodeGen/DIE.h | 19 +- .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 13 + .../include/llvm/CodeGen/GlobalISel/RegisterBank.h | 13 +- .../llvm/CodeGen/GlobalISel/RegisterBankInfo.h | 3 +- llvm/include/llvm/CodeGen/MachineFrameInfo.h | 8 +- llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 13 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 2 +- llvm/include/llvm/CodeGen/TargetFrameLowering.h | 13 +- llvm/include/llvm/IR/Constants.h | 2 +- llvm/include/llvm/IR/DerivedTypes.h | 35 +- llvm/include/llvm/IR/Instructions.h | 15 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 13 +- llvm/include/llvm/IR/IntrinsicsARM.td | 26 + .../llvm/Support/GenericDomTreeConstruction.h | 40 +- llvm/include/llvm/Target/GlobalISel/Combine.td | 31 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 4 + llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 48 +- llvm/lib/Analysis/ValueTracking.cpp | 37 +- llvm/lib/CodeGen/Analysis.cpp | 37 +- llvm/lib/CodeGen/CalcSpillWeights.cpp | 9 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 31 + llvm/lib/CodeGen/GlobalISel/RegisterBank.cpp | 8 +- llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp | 5 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineFrameInfo.cpp | 19 +- llvm/lib/CodeGen/MachineOutliner.cpp | 47 +- llvm/lib/CodeGen/MachineRegisterInfo.cpp | 50 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 51 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 25 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 3 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 47 +- llvm/lib/CodeGen/TargetRegisterInfo.cpp | 4 +- llvm/lib/FuzzMutate/Operations.cpp | 18 +- llvm/lib/IR/ConstantFold.cpp | 3 +- llvm/lib/IR/Constants.cpp | 11 +- llvm/lib/IR/Instructions.cpp | 65 +- llvm/lib/IR/Operator.cpp | 5 + llvm/lib/IR/Type.cpp | 58 +- llvm/lib/IR/Value.cpp | 7 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 3 +- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 10 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 4 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 55 +- llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h | 5 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 71 +-- .../AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp | 17 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 14 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp | 1 + llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 7 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 42 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 12 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 11 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 341 +++++++++-- llvm/lib/Target/ARM/ARMFrameLowering.h | 9 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 65 +- llvm/lib/Target/ARM/ARMISelLowering.h | 1 + llvm/lib/Target/ARM/ARMInstrMVE.td | 130 ++-- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 2 +- llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 25 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 8 +- llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 10 +- llvm/lib/Target/Lanai/LanaiFrameLowering.cpp | 4 +- llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | 6 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 4 +- llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp | 31 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 35 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 90 ++- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 2 +- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 2 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 14 +- llvm/lib/Target/RISCV/RISCVRegisterBankInfo.cpp | 4 +- llvm/lib/Target/RISCV/RISCVRegisterBankInfo.h | 2 +- llvm/lib/Target/RISCV/RISCVSubtarget.cpp | 2 +- llvm/lib/Target/Sparc/SparcFrameLowering.cpp | 11 +- .../WebAssembly/WebAssemblyFrameLowering.cpp | 6 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 22 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 6 + llvm/lib/Target/X86/X86IndirectBranchTracking.cpp | 13 +- llvm/lib/Target/XCore/XCoreFrameLowering.cpp | 9 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 4 +- llvm/lib/Transforms/IPO/GlobalOpt.cpp | 2 +- llvm/lib/Transforms/IPO/StripSymbols.cpp | 8 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 22 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 6 +- .../InstCombine/InstructionCombining.cpp | 5 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 16 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 2 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 39 +- llvm/lib/Transforms/Vectorize/VPlan.h | 22 +- llvm/lib/Transforms/Vectorize/VPlanValue.h | 2 + llvm/test/Analysis/CostModel/ARM/select.ll | 38 +- llvm/test/Analysis/MemorySSA/scalable-vec.ll | 25 + .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 10 - .../GlobalISel/prelegalizercombiner-undef.mir | 168 +++++ .../CodeGen/AArch64/machine-outliner-iterative.mir | 149 +++++ .../CodeGen/AArch64/sve-intrinsics-loads-ff.ll | 192 ++++++ .../CodeGen/AArch64/sve-intrinsics-loads-nf.ll | 273 +++++++++ llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll | 42 +- llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll | 42 +- ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 76 ++- ...ed-non-temporal-ldst-addressing-mode-reg-reg.ll | 77 ++- .../legalize-llvm.amdgcn.image.atomic.dim.a16.ll | 4 +- llvm/test/CodeGen/AMDGPU/indirect-call.ll | 201 ++++++ .../CodeGen/AMDGPU/multi-divergent-exit-region.ll | 40 ++ llvm/test/CodeGen/AMDGPU/update-phi.ll | 2 - .../CodeGen/ARM/ipra-extra-spills-exceptions.ll | 149 +++++ llvm/test/CodeGen/ARM/ipra-extra-spills.ll | 406 ++++++++++++ llvm/test/CodeGen/Generic/csw-debug-assert.ll | 64 ++ llvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir | 4 +- llvm/test/CodeGen/PowerPC/aix-byval-param.ll | 16 - .../CodeGen/PowerPC/aix-cc-byval-limitation1.ll | 16 + .../CodeGen/PowerPC/aix-cc-byval-limitation2.ll | 16 + .../CodeGen/PowerPC/aix-cc-byval-limitation3.ll | 16 + llvm/test/CodeGen/PowerPC/aix-cc-byval.ll | 206 +++++++ llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll | 146 +++++ .../CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 54 ++ llvm/test/CodeGen/PowerPC/fma-precision.ll | 27 +- llvm/test/CodeGen/PowerPC/ifcvt.mir | 53 ++ llvm/test/CodeGen/PowerPC/recipest.ll | 9 +- llvm/test/CodeGen/Thumb2/ifcvt-minsize.ll | 13 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/ternary.ll | 591 ++++++++++++++++++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmlad.ll | 589 ++++++++++++++++++ llvm/test/CodeGen/X86/fp-intrinsics-flags.ll | 4 +- .../CodeGen/X86/indirect-branch-tracking-eh.ll | 31 + llvm/test/CodeGen/X86/noreturn-call-win64.ll | 58 -- .../AArch64/dbgcall-site-float-entry-value.ll | 49 ++ llvm/test/DebugInfo/AMDGPU/print-reg-name.s | 12 +- llvm/test/DebugInfo/AMDGPU/register-mapping.s | 37 -- .../InstCombine/X86/x86-vector-shifts.ll | 116 ++++ llvm/test/Transforms/InstCombine/gep-vector.ll | 21 + llvm/test/Transforms/InstSimplify/add-mask.ll | 79 ++- llvm/test/Transforms/InstSimplify/bitreverse.ll | 51 +- llvm/test/Transforms/InstSimplify/bswap.ll | 57 +- llvm/test/Transforms/InstSimplify/or.ll | 108 ++-- llvm/test/Transforms/JumpThreading/select.ll | 28 + .../PowerPC/p8-unrolling-legalize-vectors.ll | 198 +++++- .../SCCP/binaryops-range-special-cases.ll | 103 ++++ llvm/test/Transforms/SCCP/ip-ranges-select.ll | 95 +++ llvm/test/Transforms/SCCP/ipsccp-range-crashes.ll | 195 ++++++ llvm/test/Transforms/SCCP/range-and.ll | 39 +- llvm/test/Transforms/SCCP/select.ll | 30 +- llvm/tools/gold/gold-plugin.cpp | 2 +- .../Transforms/Vectorize/VPlanHCFGTest.cpp | 40 ++ llvm/unittests/Transforms/Vectorize/VPlanTest.cpp | 32 +- llvm/utils/TableGen/CodeGenRegisters.cpp | 4 +- llvm/utils/TableGen/CodeGenRegisters.h | 2 +- llvm/utils/TableGen/RegisterBankEmitter.cpp | 95 +-- .../secondary/clang/include/clang/Basic/BUILD.gn | 15 + llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn | 2 + llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn | 1 + llvm/utils/lit/lit/Test.py | 4 + llvm/utils/lit/lit/TestRunner.py | 39 +- .../allow-retries/does-not-succeed-within-limit.py | 3 + llvm/utils/lit/tests/Inputs/allow-retries/lit.cfg | 9 + .../more-than-one-allow-retries-lines.py | 4 + .../Inputs/allow-retries/not-a-valid-integer.py | 3 + .../Inputs/allow-retries/succeeds-within-limit.py | 24 + .../lit/tests/Inputs/test_retry_attempts/lit.cfg | 10 + .../lit/tests/Inputs/test_retry_attempts/test.py | 22 + .../Inputs/testrunner-custom-parsers/test.txt | 3 + llvm/utils/lit/tests/allow-retries.py | 41 ++ llvm/utils/lit/tests/unit/TestRunner.py | 12 + llvm/utils/vim/syntax/llvm.vim | 1 + llvm/utils/vscode/llvm/syntaxes/ll.tmLanguage.yaml | 2 + mlir/cmake/modules/CMakeLists.txt | 41 +- mlir/cmake/modules/MLIRConfig.cmake.in | 35 ++ mlir/docs/CreatingADialect.md | 2 +- mlir/docs/DialectConversion.md | 2 +- mlir/docs/Dialects/SPIR-V.md | 2 +- mlir/docs/LangRef.md | 2 +- mlir/docs/OpDefinitions.md | 2 +- mlir/docs/QuickstartRewrites.md | 8 +- mlir/docs/RationaleLinalgDialect.md | 4 +- mlir/docs/Tutorials/Toy/Ch-3.md | 6 +- mlir/docs/Tutorials/Toy/Ch-5.md | 4 +- mlir/examples/toy/Ch3/mlir/ToyCombine.cpp | 6 +- mlir/examples/toy/Ch4/mlir/ToyCombine.cpp | 6 +- mlir/examples/toy/Ch4/toyc.cpp | 1 - mlir/examples/toy/Ch5/mlir/LowerToAffineLoops.cpp | 22 +- mlir/examples/toy/Ch5/mlir/ToyCombine.cpp | 6 +- mlir/examples/toy/Ch5/toyc.cpp | 1 - mlir/examples/toy/Ch6/mlir/LowerToAffineLoops.cpp | 22 +- mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp | 4 +- mlir/examples/toy/Ch6/mlir/ToyCombine.cpp | 6 +- mlir/examples/toy/Ch6/toyc.cpp | 1 - mlir/examples/toy/Ch7/mlir/LowerToAffineLoops.cpp | 22 +- mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp | 4 +- mlir/examples/toy/Ch7/mlir/ToyCombine.cpp | 6 +- mlir/examples/toy/Ch7/toyc.cpp | 1 - mlir/include/mlir/Analysis/CallGraph.h | 3 + .../Conversion/VectorToLLVM/ConvertVectorToLLVM.h | 2 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 31 + .../Linalg/Transforms/LinalgTransformPatterns.td | 10 +- mlir/include/mlir/Dialect/SPIRV/SPIRVCastOps.td | 2 +- mlir/include/mlir/Dialect/Vector/VectorOps.h | 12 +- mlir/include/mlir/IR/PatternMatch.h | 69 ++- mlir/include/mlir/Transforms/DialectConversion.h | 18 +- mlir/lib/Analysis/CallGraph.cpp | 17 + .../AffineToStandard/AffineToStandard.cpp | 88 +-- .../GPUCommon/IndexIntrinsicsOpLowering.h | 6 +- .../Conversion/GPUCommon/OpToFuncCallLowering.h | 6 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 12 +- .../Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp | 60 +- mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp | 65 +- .../lib/Conversion/LinalgToSPIRV/LinalgToSPIRV.cpp | 14 +- .../LoopToStandard/ConvertLoopToStandard.cpp | 32 +- mlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp | 16 +- .../StandardToLLVM/ConvertStandardToLLVM.cpp | 195 +++--- .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 70 +-- .../StandardToSPIRV/LegalizeStandardForSPIRV.cpp | 24 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 124 ++-- .../VectorToLoops/ConvertVectorToLoops.cpp | 12 +- mlir/lib/Dialect/AffineOps/AffineOps.cpp | 16 +- .../FxpMathOps/Transforms/LowerUniformRealMath.cpp | 30 +- .../Dialect/GPU/Transforms/AllReduceLowering.cpp | 6 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 10 +- .../Dialect/Linalg/Transforms/LinalgToLoops.cpp | 40 +- mlir/lib/Dialect/Quant/Transforms/ConvertConst.cpp | 20 +- .../Dialect/Quant/Transforms/ConvertSimQuant.cpp | 8 +- mlir/lib/Dialect/SPIRV/SPIRVCanonicalization.cpp | 39 +- mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp | 10 +- .../DecorateSPIRVCompositeTypeLayoutPass.cpp | 12 +- .../SPIRV/Transforms/LowerABIAttributesPass.cpp | 12 +- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 102 ++-- mlir/lib/Dialect/Vector/VectorOps.cpp | 18 +- mlir/lib/Dialect/Vector/VectorTransforms.cpp | 174 +++--- mlir/lib/IR/PatternMatch.cpp | 2 +- .../Transforms/RemoveInstrumentationPass.cpp | 6 +- mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 3 +- mlir/lib/Transforms/DialectConversion.cpp | 16 +- mlir/lib/Transforms/Inliner.cpp | 385 ++++++++++-- .../Dialect/Vector/vector-contract-transforms.mlir | 2 +- mlir/test/Target/llvmir-intrinsics.mlir | 16 + mlir/test/Transforms/inlining-dce.mlir | 53 ++ mlir/test/lib/Dialect/SPIRV/TestAvailability.cpp | 40 +- mlir/test/lib/TestDialect/TestDialect.cpp | 6 +- mlir/test/lib/TestDialect/TestPatterns.cpp | 58 +- mlir/test/lib/Transforms/TestVectorTransforms.cpp | 14 +- mlir/tools/mlir-tblgen/RewriterGen.cpp | 81 ++- 369 files changed, 11826 insertions(+), 2433 deletions(-) create mode 100644 clang-tools-extra/test/clang-tidy/checkers/misc-unconventional- [...] create mode 100644 clang/include/clang/Basic/BuiltinsSVE.def create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vqdmlad.c create mode 100644 clang/test/OpenMP/target_device_codegen.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_avx.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_avx512f.cpp create mode 100644 libc/cmake/modules/cpu_features/check_cpu_features.cpp.in delete mode 100644 libc/cmake/modules/cpu_features/check_sse.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_sse2.cpp create mode 100644 libc/src/signal/linux/__restore.cpp create mode 100644 libc/src/signal/linux/sigaction.cpp create mode 100644 libc/src/signal/sigaction.h create mode 100644 libc/src/string/memcpy.cpp create mode 100644 libc/src/string/memcpy.h create mode 100644 libc/src/string/memcpy_arch_specific.h.def create mode 100644 libc/src/string/memory_utils/memcpy_utils.h create mode 100644 libc/src/string/x86/CMakeLists.txt create mode 100644 libc/src/string/x86/memcpy_arch_specific.h.inc create mode 100644 libc/test/src/signal/sigaction_test.cpp create mode 100644 libc/test/src/string/memcpy_test.cpp create mode 100644 libc/test/src/string/memory_utils/memcpy_utils_test.cpp create mode 100644 llvm/test/Analysis/MemorySSA/scalable-vec.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-undef.mir create mode 100644 llvm/test/CodeGen/AArch64/machine-outliner-iterative.mir create mode 100644 llvm/test/CodeGen/AMDGPU/indirect-call.ll create mode 100644 llvm/test/CodeGen/ARM/ipra-extra-spills-exceptions.ll create mode 100644 llvm/test/CodeGen/ARM/ipra-extra-spills.ll create mode 100644 llvm/test/CodeGen/Generic/csw-debug-assert.ll delete mode 100644 llvm/test/CodeGen/PowerPC/aix-byval-param.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation1.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation2.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation3.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll create mode 100644 llvm/test/CodeGen/PowerPC/ifcvt.mir create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmlad.ll create mode 100644 llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll create mode 100644 llvm/test/DebugInfo/AArch64/dbgcall-site-float-entry-value.ll delete mode 100644 llvm/test/DebugInfo/AMDGPU/register-mapping.s create mode 100644 llvm/test/Transforms/SCCP/binaryops-range-special-cases.ll create mode 100644 llvm/test/Transforms/SCCP/ipsccp-range-crashes.ll create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/does-not-succeed-with [...] create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/lit.cfg create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/more-than-one-allow-r [...] create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/not-a-valid-integer.py create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/succeeds-within-limit.py create mode 100644 llvm/utils/lit/tests/Inputs/test_retry_attempts/lit.cfg create mode 100644 llvm/utils/lit/tests/Inputs/test_retry_attempts/test.py create mode 100644 llvm/utils/lit/tests/allow-retries.py create mode 100644 mlir/cmake/modules/MLIRConfig.cmake.in create mode 100644 mlir/test/Transforms/inlining-dce.mlir