[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (d9166ad2728 -> f61f6ffe112)

13 May 2020


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig
in repository toolchain/ci/llvm-project.
from  d9166ad2728 [lldb/Driver] Support terminal resizing
      adds  661b234cbcf [MLIR] Rename SideEffects.td -> SideEffectInterfaces.td
      adds  11c8c2a551c [analyzer] SATestBuild.py: Fix support for #NOPREFIX.
      adds  7a17f3ccd10 [MLIR] Fix dependencies for Analysis libraries
      adds  6c29073efb0 PR45589: Properly decompose overloaded `&&` and `||` operat [...]
      adds  32f5ee830b0 [Attributor] Fixup block addresses after rewriting function [...]
      adds  363393c4b35 [libc++abi] Adjust XFAIL on macOS for bug that was fixed in [...]
      adds  66055230bf6 [TargetLoweringObjectFileImpl] Produce .text.hot. instead o [...]
      adds  aa1eb5152d9 [X86][ISelLowering] refactor Varargs handling in X86ISelLow [...]
      adds  59ba19c56e1 [VirtualFileSystem] Add unit test that showcases YAMLVFSWriter bug
      adds  58bc507b6fe [VirtualFileSystem] Add unit test that showcases another YA [...]
      adds  56926ae0faa [SampleFDO] Rename llvm-profdata flag -partial-profile to - [...]
      adds  293c6d38212 Fix buildbots after aa1eb5152d9a5bd588c8479a376fa65cbeabbc9f.
      adds  0138cc01250 PowerPC: Treat llvm.fma.f* intrinsic as using CTR with SPE
      adds  1c44430e738 Fix buildbots #2 after aa1eb5152d9a5bd588c8479a376fa65cbeabbc9f.
      adds  99d60a1d0b3 [GlobalISel] Assign the correct location when combining G_SEXT.
      adds  473bdaf2e81 [mlir] Move Conversion/StandardToStandard to Dialect/Standa [...]
      adds  a9e85626514 [GIsel] Update a comment and make it more precise.
      adds  f490ca76b0e [x86][CGP] enable target hook to sink funnel shift intrinsi [...]
      adds  759465ee34c [YAMLVFSWriter] Fix for delimiters
      adds  452e2fc409d Revert of Revert of [mlir][shape] Tidy up shape.shape_of
      adds  ab22f71dd75 [lldb/Reproducers] Also record directories FileSystem::Collect.
      adds  71ed66d97fd [AMDGPU] Make v4i64/v4f64/v8i64/v8f64 legal
      adds  2c861e8a121 [libc++][test] Properly mark libc++-only XFAILs
      adds  e17a47b2d35 [libc][Obvious] Fix deps of few threads targets.
      adds  759bae956ab [lld-macho] Ignore -platform_version and -syslibroot flags.
      adds  cb22ab74035 Add nomerge function attribute to supress tail merge optimi [...]
      adds  63c0e72b2f8 [mlir] Revisit std.subview handling of static information.
      adds  0796b170fb3 Fix error in TestNumThreads.py when frame.GetFunctionName r [...]
      adds  d3eb51f0626 [ValueTracking] Fix crash in isGuaranteedNotToBeUndefOrPois [...]
      adds  96282b1a0c4 test commit
      adds  8aa2266fd8d [libcxx] Constrain function assignment operator (2574).
      adds  af48351cc8f [Attributor][FIX] Stabilize the state of AAReturnedValues e [...]
      adds  302c492cc5d [LLDB] Fix minidebuginfo-set-and-hit-breakpoint.test for ar [...]
      adds  fb2c4d50f14 [mlir] [VectorOps] Implement vector.constant_mask lowering  [...]
      adds  6805a77eb66 [LLDB] Mark some xfails for arm-linux
      adds  67087a7b765 [LLDB] Fix typo in xfail decorator assert.test
      adds  272bc25bc14 [LoopReroll] Fix rerolling loop with use outside the loop
      adds  7d4167430c4 [gcov] Fix simultaneous .gcda creation/lock
      adds  085234bedc3 [cmake] Update creation of object library dependencies for  [...]
      adds  782a4dd1a47 [PowerPC] Use add instead of addReg in ppc-early-ret pass
      adds  d2a95698501 [mlir][Linalg] Allow reshapes to collapse to a zero-rank tensor.
      adds  5440d0a12d7 [mlir][Linalg] Add folders and canonicalizers for linalg.re [...]
      adds  e9753822b5a [PowerPC] Respect SDNodeFlags in lowering SELECT_CC
      adds  49e6c191004 [mlir][StandardToLLVM] Add SinOp to LLVM dialect and loweri [...]
      adds  6bbad7285c4 [CostModel] Modify BasicTTI getCastInstrCost
      adds  8ffe8891cd5 [PowerPC] Exploit VSX neg, abs and nabs for f32
      adds  ad60ff70eb5 [NFC] Code cleanup in TargetInfo.cpp
      adds  eef95f2746c [BrachProbablityInfo] Set edge probabilities at once. NFC.
      adds  e59744fd9b4 [DebugInfo] Fortran module DebugInfo support in LLVM
      adds  678bd84c4df [DebugInfo] Fixes windows bot failure due to a test failure
      adds  524457edbc3 [mips] Fix typo in FileCheck directives - replace \0xa0 cha [...]
      adds  cac6a26f381 [TableGen] Fix register class handling in TableGen's DAG IS [...]
      adds  2866c6cad47 [NFC] [PowerPC] Narrow fast-math flags in tests
      adds  e25a2601aaa [libc++] [LWG3321] Mark "year_month_day_last::day() specifi [...]
      adds  855f0ce79bf [analyzer] Fix crash for non-pointers annotated as nonnull
      adds  f8972662bc3 [examples] Skip building the Bye pass plugin on windows
      adds  1febe289827 [libcxx testing] Remove ALLOW_RETRIES from wait_for futures test
      adds  e16111ce2fc [lldb] Also recognize DWARF UTF base types using their size
      adds  8cbd3f431a9 [analyzer] SATestBuild.py: Be defensive against corrupt pli [...]
      adds  ab61fe41505 Revert "[libc++] [LWG3321] Mark "year_month_day_last::day() [...]
      adds  18a5428e602 [AMDGPU][MC][GFX9+] Enabled clamp for v_add_i32 and v_sub_i32
      adds  e072b20bdea [lldb] Merge PlatformXXX::ResolveExecutable
      adds  881c3bb6a73 [mlir] Adapted standard Alloc and Alloca ops to use new sid [...]
      adds  f61f6ffe112 [compiler-rt] [builtin] Switch the return type of __atomic_ [...]
No new revisions were added by this update.
Summary of changes:
 clang/include/clang/Sema/Sema.h                    |   7 +-
 clang/lib/CodeGen/TargetInfo.cpp                   |   4 +-
 clang/lib/Sema/SemaConcept.cpp                     | 121 ++--
 clang/lib/Sema/SemaExpr.cpp                        |   5 -
 .../Checkers/NonNullParamChecker.cpp               |   8 +-
 clang/test/Analysis/UserNullabilityAnnotations.m   |  13 +
 clang/test/SemaTemplate/constraints.cpp            |  26 +
 clang/utils/analyzer/SATestBuild.py                |  18 +-
 compiler-rt/lib/builtins/atomic.c                  |   9 +-
 compiler-rt/lib/profile/GCDAProfiling.c            |  23 +-
 .../profile/Posix/instrprof-gcov-parallel.test     |   2 -
 flang/include/flang/Optimizer/Dialect/FIROps.td    |   2 +-
 libc/src/threads/linux/CMakeLists.txt              |   2 +-
 libc/test/src/threads/CMakeLists.txt               |   4 -
 libcxx/include/functional                          |   2 +-
 libcxx/test/std/strings/c.strings/cuchar.pass.cpp  |   2 +-
 .../futures.shared_future/wait_for.pass.cpp        | 158 +++--
 .../func.search/func.search.bm/default.pass.cpp    |   2 +-
 .../func.search/func.search.bm/hash.pass.cpp       |   2 +-
 .../func.search/func.search.bm/hash.pred.pass.cpp  |   2 +-
 .../func.search/func.search.bm/pred.pass.cpp       |   2 +-
 .../func.search/func.search.bmh/default.pass.cpp   |   2 +-
 .../func.search/func.search.bmh/hash.pass.cpp      |   2 +-
 .../func.search/func.search.bmh/hash.pred.pass.cpp |   2 +-
 .../func.search/func.search.bmh/pred.pass.cpp      |   2 +-
 .../func.wrap.func.con/F_assign.pass.cpp           |  20 +
 libcxx/www/cxx1z_status.html                       |   2 +-
 .../test/thread_local_destruction_order.pass.cpp   |  17 +-
 lld/MachO/Driver.cpp                               |  20 +-
 lld/MachO/Options.td                               |   2 +
 lld/test/MachO/platform-version.test               |  16 +
 lld/test/MachO/silent-ignore.test                  |   3 +-
 lldb/include/lldb/Target/RemoteAwarePlatform.h     |   4 +
 lldb/source/Host/common/FileSystem.cpp             |   8 +-
 .../Plugins/Platform/POSIX/PlatformPOSIX.cpp       | 143 -----
 lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.h |   4 -
 .../Plugins/Platform/Windows/PlatformWindows.cpp   | 105 ----
 .../Plugins/Platform/Windows/PlatformWindows.h     |   5 -
 .../Plugins/TypeSystem/Clang/TypeSystemClang.cpp   |  25 +-
 lldb/source/Target/RemoteAwarePlatform.cpp         | 146 +++++
 .../load_using_paths/TestLoadUsingPaths.py         |   1 +
 .../thread/num_threads/TestNumThreads.py           |   2 +
 lldb/test/API/python_api/thread/TestThreadAPI.py   |   1 +
 .../ELF/minidebuginfo-set-and-hit-breakpoint.test  |   2 +-
 lldb/test/Shell/Recognizer/assert.test             |   1 +
 .../DWARF/DW_TAG_basic_type_DW_ATE_UTF_nonC.ll     |  82 +++
 llvm/cmake/modules/AddLLVM.cmake                   |   3 +-
 llvm/docs/LangRef.rst                              |   8 +
 llvm/examples/Bye/CMakeLists.txt                   |  22 +-
 llvm/include/llvm/Analysis/BranchProbabilityInfo.h |  10 +
 .../llvm/Analysis/TargetTransformInfoImpl.h        |   7 +-
 llvm/include/llvm/Bitcode/LLVMBitCodes.h           |   1 +
 llvm/include/llvm/CodeGen/BasicTTIImpl.h           |  15 +-
 .../GlobalISel/LegalizationArtifactCombiner.h      |   2 +-
 llvm/include/llvm/CodeGen/TargetLowering.h         |   7 +-
 llvm/include/llvm/IR/Attributes.td                 |   3 +
 llvm/include/llvm/IR/DIBuilder.h                   |   9 +-
 llvm/include/llvm/IR/DebugInfoMetadata.h           |  72 ++-
 llvm/include/llvm/IR/InstrTypes.h                  |   3 +
 llvm/lib/Analysis/BranchProbabilityInfo.cpp        |  99 ++--
 llvm/lib/Analysis/ValueTracking.cpp                |   7 +-
 llvm/lib/AsmParser/LLLexer.cpp                     |   1 +
 llvm/lib/AsmParser/LLParser.cpp                    |  18 +-
 llvm/lib/AsmParser/LLToken.h                       |   1 +
 llvm/lib/Bitcode/Reader/BitcodeReader.cpp          |   2 +
 llvm/lib/Bitcode/Reader/MetadataLoader.cpp         |  14 +-
 llvm/lib/Bitcode/Writer/BitcodeWriter.cpp          |   3 +
 llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp          |   5 +
 llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp  |   8 +-
 llvm/lib/IR/AsmWriter.cpp                          |   2 +
 llvm/lib/IR/Attributes.cpp                         |   2 +
 llvm/lib/IR/DIBuilder.cpp                          |   8 +-
 llvm/lib/IR/DebugInfoMetadata.cpp                  |  18 +-
 llvm/lib/IR/LLVMContextImpl.h                      |  19 +-
 llvm/lib/IR/Verifier.cpp                           |   1 +
 llvm/lib/Support/VirtualFileSystem.cpp             |  27 +-
 llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp      |  26 +
 llvm/lib/Target/AMDGPU/SIISelLowering.cpp          |  39 ++
 llvm/lib/Target/AMDGPU/SIInstructions.td           |  21 +
 llvm/lib/Target/AMDGPU/SIRegisterInfo.td           |  20 +-
 llvm/lib/Target/AMDGPU/VOP3Instructions.td         |   4 +-
 llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp         |   6 +-
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp        |  10 +-
 llvm/lib/Target/PowerPC/PPCInstrVSX.td             |  18 +
 llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp |   1 +
 llvm/lib/Target/X86/X86ISelLowering.cpp            | 380 +++++++-----
 llvm/lib/Target/X86/X86ISelLowering.h              |   5 +
 llvm/lib/Transforms/IPO/Attributor.cpp             |   8 +
 llvm/lib/Transforms/IPO/AttributorAttributes.cpp   |  46 +-
 llvm/lib/Transforms/Scalar/JumpThreading.cpp       |   3 +-
 llvm/lib/Transforms/Scalar/LoopRerollPass.cpp      |   6 +
 llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp   |   4 +-
 llvm/lib/Transforms/Utils/CodeExtractor.cpp        |  13 +-
 llvm/lib/Transforms/Utils/SimplifyCFG.cpp          |  11 +-
 llvm/test/Analysis/CostModel/AArch64/cast.ll       |  10 +-
 llvm/test/Analysis/CostModel/ARM/cast.ll           |  58 +-
 .../CostModel/X86/masked-intrinsic-cost.ll         |   2 +-
 llvm/test/Assembler/dimodule.ll                    |   4 +-
 llvm/test/Bitcode/DIModule-clang-module.ll         |  22 +
 llvm/test/Bitcode/DIModule-clang-module.ll.bc      | Bin 0 -> 1580 bytes
 llvm/test/Bitcode/DIModule-fortran-module.ll       |  34 ++
 llvm/test/Bitcode/DIModule-fortran-module.ll.bc    | Bin 0 -> 1948 bytes
 llvm/test/CMakeLists.txt                           |   6 +-
 .../AArch64/GlobalISel/combine-ext-debugloc.mir    |   2 +-
 .../AArch64/GlobalISel/combine-sext-debugloc.mir   |  50 ++
 llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll      | 204 ++++---
 llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll  |  36 +-
 llvm/test/CodeGen/AMDGPU/idot2.ll                  | 110 ++--
 llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll   |  41 +-
 llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll      | 148 ++---
 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll       |  22 +-
 llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll        |  22 +-
 llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll        |  22 +-
 llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll         |  76 ++-
 llvm/test/CodeGen/AMDGPU/saddo.ll                  | 354 +++++------
 llvm/test/CodeGen/AMDGPU/select.f16.ll             | 368 ++++++------
 llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll      |  32 +-
 llvm/test/CodeGen/AMDGPU/shift-i128.ll             | 456 +++++++--------
 llvm/test/CodeGen/AMDGPU/shift-i64-opts.ll         |  10 +-
 llvm/test/CodeGen/AMDGPU/v_madak_f16.ll            |  98 ++--
 llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll  |  22 +-
 llvm/test/CodeGen/PowerPC/combine-fneg.ll          |   4 +-
 llvm/test/CodeGen/PowerPC/early-ret-verify.mir     |   4 +-
 llvm/test/CodeGen/PowerPC/early-ret.mir            |  14 +-
 llvm/test/CodeGen/PowerPC/fdiv.ll                  |   2 +-
 llvm/test/CodeGen/PowerPC/float-logic-ops.ll       |   6 +-
 llvm/test/CodeGen/PowerPC/fma-assoc.ll             |   8 +-
 llvm/test/CodeGen/PowerPC/fma-combine.ll           |  24 +-
 llvm/test/CodeGen/PowerPC/fma-mutate.ll            |   2 +-
 llvm/test/CodeGen/PowerPC/fma-negate.ll            |  40 +-
 llvm/test/CodeGen/PowerPC/fma-precision.ll         |  68 +--
 llvm/test/CodeGen/PowerPC/fma.ll                   |   6 +
 llvm/test/CodeGen/PowerPC/fmf-propagation.ll       |  46 +-
 llvm/test/CodeGen/PowerPC/fsub-fneg.ll             |   6 +-
 llvm/test/CodeGen/PowerPC/load-two-flts.ll         |  24 +-
 llvm/test/CodeGen/PowerPC/pow.75.ll                |  24 +-
 llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll         |  20 +-
 llvm/test/CodeGen/PowerPC/qpx-recipest.ll          |  28 +-
 llvm/test/CodeGen/PowerPC/recipest.ll              |  46 +-
 llvm/test/CodeGen/PowerPC/repeated-fp-divisors.ll  |   4 +-
 llvm/test/CodeGen/PowerPC/scalar-equal.ll          |  42 +-
 llvm/test/CodeGen/PowerPC/scalar-min-max.ll        |  32 +-
 llvm/test/CodeGen/PowerPC/scalar_cmp.ll            | 244 +++-----
 llvm/test/CodeGen/PowerPC/spe.ll                   |  67 +++
 llvm/test/CodeGen/PowerPC/vec-min-max.ll           |   8 +-
 .../CodeGen/PowerPC/vsx-fma-mutate-trivial-copy.ll |   6 +-
 llvm/test/CodeGen/PowerPC/vsx-recip-est.ll         |   8 +-
 llvm/test/CodeGen/X86/vector-fshl-128.ll           | 103 ++--
 llvm/test/DebugInfo/X86/Fortran-DIModule.ll        |  44 ++
 llvm/test/Feature/load_extension.ll                |   1 +
 llvm/test/MC/AMDGPU/gfx10_asm_all.s                |   6 +
 llvm/test/MC/AMDGPU/vop3-gfx9.s                    |  16 +
 .../test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt |   6 +
 llvm/test/MC/Disassembler/AMDGPU/vop3_gfx9.txt     |   5 +
 llvm/test/MC/Mips/micromips-jump-pc-region.s       |   2 +-
 llvm/test/MC/Mips/mips-jump-pc-region.s            |   4 +-
 llvm/test/TableGen/dag-isel-regclass-emit-enum.td  |  39 ++
 llvm/test/Transforms/Attributor/misc_crash.ll      |  33 ++
 llvm/test/Transforms/Attributor/returned.ll        |  47 +-
 llvm/test/Transforms/CodeGenPrepare/X86/section.ll |   6 +
 .../CodeGenPrepare/X86/x86-shuffle-sink.ll         |  70 ++-
 .../test/Transforms/DivRemPairs/PowerPC/pr45885.ll |  24 +
 llvm/test/Transforms/LoopReroll/external_use.ll    |  60 ++
 .../Transforms/SLPVectorizer/X86/load-merge.ll     |  14 +-
 llvm/test/Transforms/SimplifyCFG/nomerge.ll        |  71 +++
 llvm/test/tools/llvm-profdata/show-prof-info.test  |   2 +-
 llvm/tools/llvm-profdata/llvm-profdata.cpp         |  19 +-
 llvm/unittests/IR/MetadataTest.cpp                 |  35 +-
 llvm/unittests/Support/VirtualFileSystemTest.cpp   |  64 ++
 llvm/utils/TableGen/DAGISelMatcherGen.cpp          |  16 +-
 .../standalone/include/Standalone/StandaloneOps.td |   2 +-
 mlir/examples/toy/Ch2/include/toy/Ops.td           |   2 +-
 mlir/examples/toy/Ch3/include/toy/Ops.td           |   2 +-
 mlir/examples/toy/Ch4/include/toy/Ops.td           |   2 +-
 mlir/examples/toy/Ch5/include/toy/Ops.td           |   2 +-
 mlir/examples/toy/Ch6/include/toy/Ops.td           |   2 +-
 mlir/examples/toy/Ch7/include/toy/Ops.td           |   2 +-
 mlir/include/mlir/Dialect/AVX512/AVX512.td         |   2 +-
 mlir/include/mlir/Dialect/Affine/IR/AffineOps.td   |   2 +-
 mlir/include/mlir/Dialect/GPU/GPUOps.td            |   2 +-
 mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td        |   3 +-
 mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td        |   2 +-
 mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td       |   2 +-
 mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td   |  27 +-
 mlir/include/mlir/Dialect/Quant/QuantOps.td        |   2 +-
 mlir/include/mlir/Dialect/SCF/SCFOps.td            |   2 +-
 .../mlir/Dialect/SPIRV/SPIRVArithmeticOps.td       |   2 +-
 mlir/include/mlir/Dialect/SPIRV/SPIRVBitOps.td     |   2 +-
 mlir/include/mlir/Dialect/SPIRV/SPIRVCastOps.td    |   2 +-
 .../mlir/Dialect/SPIRV/SPIRVCompositeOps.td        |   2 +-
 .../mlir/Dialect/SPIRV/SPIRVControlFlowOps.td      |   2 +-
 mlir/include/mlir/Dialect/SPIRV/SPIRVGLSLOps.td    |   2 +-
 mlir/include/mlir/Dialect/SPIRV/SPIRVLogicalOps.td |   2 +-
 mlir/include/mlir/Dialect/SPIRV/SPIRVOps.td        |   2 +-
 .../mlir/Dialect/SPIRV/SPIRVStructureOps.td        |   2 +-
 mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td     |   6 +-
 mlir/include/mlir/Dialect/StandardOps/IR/Ops.td    | 140 +++--
 .../StandardOps/Transforms/FuncConversions.h}      |  10 +-
 mlir/include/mlir/Dialect/Vector/VectorOps.td      |   2 +-
 mlir/include/mlir/Interfaces/CMakeLists.txt        |   2 +-
 .../{SideEffects.td => SideEffectInterfaces.td}    |   5 +-
 mlir/include/mlir/Interfaces/SideEffects.h         |   7 +
 mlir/lib/Analysis/CMakeLists.txt                   |   6 +
 mlir/lib/Conversion/CMakeLists.txt                 |   1 -
 .../Conversion/StandardToLLVM/StandardToLLVM.cpp   |  96 ++-
 .../Conversion/StandardToStandard/CMakeLists.txt   |  12 -
 mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp           | 131 ++++-
 mlir/lib/Dialect/StandardOps/IR/Ops.cpp            | 648 ++++++++++++---------
 .../Dialect/StandardOps/Transforms/CMakeLists.txt  |   3 +-
 .../StandardOps/Transforms/FuncConversions.cpp}    |   4 +-
 mlir/lib/Dialect/Vector/VectorTransforms.cpp       |  52 +-
 .../StandardToLLVM/convert-to-llvmir.mlir          | 105 ++--
 mlir/test/Conversion/StandardToLLVM/invalid.mlir   |   2 +-
 .../StandardToLLVM/standard-to-llvm.mlir           |  10 +
 .../Conversion/StandardToSPIRV/legalization.mlir   |  11 +-
 .../StandardToSPIRV/subview-to-spirv.mlir          |   2 +-
 .../Conversion/VectorToLLVM/vector-to-llvm.mlir    |  17 +
 mlir/test/Dialect/Affine/ops.mlir                  |   4 +-
 mlir/test/Dialect/LLVMIR/roundtrip.mlir            |   3 +
 mlir/test/Dialect/Linalg/canonicalize.mlir         | 156 ++++-
 mlir/test/Dialect/Linalg/llvm.mlir                 | 145 +++--
 mlir/test/Dialect/Linalg/promote.mlir              |  18 +-
 mlir/test/Dialect/Linalg/roundtrip.mlir            |  23 +
 mlir/test/Dialect/Shape/ops.mlir                   |   5 +
 .../Dialect/Vector/vector-contract-transforms.mlir |  46 ++
 mlir/test/IR/core-ops.mlir                         |  60 +-
 mlir/test/IR/invalid-ops.mlir                      | 127 +---
 mlir/test/Target/vector-to-llvm-ir.mlir            |  23 +
 mlir/test/Transforms/canonicalize.mlir             | 168 +++---
 mlir/test/lib/Dialect/Test/CMakeLists.txt          |   2 +-
 mlir/test/lib/Dialect/Test/TestOps.td              |   4 +-
 mlir/test/lib/Dialect/Test/TestPatterns.cpp        |   2 +-
 mlir/test/lib/Transforms/CMakeLists.txt            |   2 +-
 mlir/test/mlir-tblgen/op-decl.td                   |   2 +-
 mlir/test/mlir-tblgen/op-side-effects.td           |   2 +-
 mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp      |   2 +-
 236 files changed, 4878 insertions(+), 2992 deletions(-)
 create mode 100644 clang/test/SemaTemplate/constraints.cpp
 create mode 100644 lld/test/MachO/platform-version.test
 create mode 100644 lldb/test/Shell/SymbolFile/DWARF/DW_TAG_basic_type_DW_ATE_UTF_nonC.ll
 create mode 100644 llvm/test/Bitcode/DIModule-clang-module.ll
 create mode 100644 llvm/test/Bitcode/DIModule-clang-module.ll.bc
 create mode 100644 llvm/test/Bitcode/DIModule-fortran-module.ll
 create mode 100644 llvm/test/Bitcode/DIModule-fortran-module.ll.bc
 create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/combine-sext-debugloc.mir
 create mode 100644 llvm/test/DebugInfo/X86/Fortran-DIModule.ll
 create mode 100644 llvm/test/TableGen/dag-isel-regclass-emit-enum.td
 create mode 100644 llvm/test/Transforms/DivRemPairs/PowerPC/pr45885.ll
 create mode 100644 llvm/test/Transforms/LoopReroll/external_use.ll
 create mode 100644 llvm/test/Transforms/SimplifyCFG/nomerge.ll
 rename mlir/include/mlir/{Conversion/StandardToStandard/StandardToStandard.h => Di [...]
 rename mlir/include/mlir/Interfaces/{SideEffects.td => SideEffectInterfaces.td} (97%)
 delete mode 100644 mlir/lib/Conversion/StandardToStandard/CMakeLists.txt
 rename mlir/lib/{Conversion/StandardToStandard/StandardToStandard.cpp => Dialect/S [...]
 create mode 100644 mlir/test/Target/vector-to-llvm-ir.mlir
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (d9166ad2728 -> f61f6ffe112)