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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/llvm-project.
from a0f50d73163 [Concepts] Requires Expressions adds e68c1e00eba [Concepts] Fix name-type conflict compilation issues adds 9583a3f2625 [AsmPrinter] Delete dead takeDeletedSymbsForFunction() adds 0cb415c1890 [X86][BranchAlign] Suppress branch alignment for {,_}__tls_ [...] adds 5fa2022ec00 [X86] Remove X86ISD::FILD_FLAG and stop gluing nodes together. adds 26ba1f77b55 [DebugInfo][test] Change two MIR tests to use -start-before [...] adds a72d15e37c5 [XRay] Set hasSideEffects flag of PATCHABLE_FUNCTION_{ENTER,EXIT} adds 9a24488cb67 [CodeGen] Move fentry-insert, xray-instrumentation and patc [...] adds 46be1689770 fix doc typos to cycle bots adds 4612e48d2fd [gn build] Port a0f50d73163 adds d82adf328fb Allow space after C-style cast in C# code adds 14c044756e7 [clang-format] Add IndentCaseBlocks option adds ea2be452542 [clang-format] Expand the SpacesAroundConditions option to [...] adds badc7e6cf9f Remove extra "\01" prefix in EH docs adds 70b53a30188 Fix gcc `-Wunused-variable` warning. NFC. adds 84217ad6611 [ORC] Add weak symbol support to defineMaterializing, fix f [...] adds 8e8a75ad508 [TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true
No new revisions were added by this update.
Summary of changes: clang/docs/ClangFormatStyleOptions.rst | 35 +++++++++- clang/docs/ReleaseNotes.rst | 19 ++++++ clang/docs/SanitizerCoverage.rst | 4 +- clang/include/clang/Format/Format.h | 26 +++++++- clang/lib/Format/Format.cpp | 2 + clang/lib/Format/TokenAnnotator.cpp | 7 +- clang/lib/Format/UnwrappedLineParser.cpp | 3 +- clang/lib/Parse/ParseDecl.cpp | 8 +-- clang/lib/Serialization/ASTReaderStmt.cpp | 6 +- clang/unittests/Format/FormatTest.cpp | 54 +++++++++++++++ clang/unittests/Format/FormatTestCSharp.cpp | 9 +++ llvm/docs/ExceptionHandling.rst | 14 ++-- llvm/include/llvm/CodeGen/MachineModuleInfo.h | 7 -- llvm/include/llvm/CodeGen/TargetRegisterInfo.h | 2 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 13 ++-- llvm/include/llvm/Target/Target.td | 4 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 10 --- llvm/lib/CodeGen/MachineModuleInfo.cpp | 49 +------------- llvm/lib/CodeGen/TargetPassConfig.cpp | 12 ++-- llvm/lib/ExecutionEngine/Orc/Core.cpp | 77 ++++++++++++++-------- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 4 +- .../Orc/RTDyldObjectLinkingLayer.cpp | 43 +++++++++++- llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp | 3 - llvm/lib/Target/AArch64/AArch64RegisterInfo.h | 4 -- llvm/lib/Target/AMDGPU/R600RegisterInfo.h | 4 ++ llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 5 -- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 1 - llvm/lib/Target/ARC/ARCRegisterInfo.cpp | 5 -- llvm/lib/Target/ARC/ARCRegisterInfo.h | 2 - llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 5 -- llvm/lib/Target/ARM/ARMBaseRegisterInfo.h | 2 - llvm/lib/Target/AVR/AVRRegisterInfo.h | 4 -- llvm/lib/Target/Hexagon/HexagonRegisterInfo.h | 4 -- llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp | 5 -- llvm/lib/Target/Lanai/LanaiRegisterInfo.h | 2 - llvm/lib/Target/Mips/MipsRegisterInfo.cpp | 5 -- llvm/lib/Target/Mips/MipsRegisterInfo.h | 2 - llvm/lib/Target/PowerPC/PPCRegisterInfo.h | 4 -- llvm/lib/Target/RISCV/RISCVRegisterInfo.h | 4 -- llvm/lib/Target/SystemZ/SystemZRegisterInfo.h | 3 - llvm/lib/Target/X86/X86ISelLowering.cpp | 20 ++---- llvm/lib/Target/X86/X86ISelLowering.h | 5 +- llvm/lib/Target/X86/X86InstrFPStack.td | 17 +---- llvm/lib/Target/X86/X86MCInstLower.cpp | 45 +++++++------ llvm/lib/Target/X86/X86RegisterInfo.cpp | 6 -- llvm/lib/Target/X86/X86RegisterInfo.h | 4 -- llvm/lib/Target/XCore/XCoreRegisterInfo.cpp | 5 -- llvm/lib/Target/XCore/XCoreRegisterInfo.h | 2 - llvm/test/CodeGen/AArch64/O0-pipeline.ll | 6 +- llvm/test/CodeGen/AArch64/O3-pipeline.ll | 6 +- .../AArch64/patchable-function-entry-bti.ll | 24 +++++++ llvm/test/CodeGen/ARM/O3-pipeline.ll | 6 +- llvm/test/CodeGen/X86/O0-pipeline.ll | 6 +- llvm/test/CodeGen/X86/O3-pipeline.ll | 6 +- .../X86/align-branch-boundary-suppressions-tls.ll | 30 +++++++++ llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll | 5 +- llvm/test/CodeGen/X86/vec-strict-inttofp-512.ll | 26 ++++---- llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir | 4 +- llvm/test/DebugInfo/X86/debug-loc-asan.mir | 4 +- llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn | 1 + 60 files changed, 403 insertions(+), 297 deletions(-) create mode 100644 llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll create mode 100644 llvm/test/CodeGen/X86/align-branch-boundary-suppressions-tls.ll