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from c8d83c1c39e [X86] Make sure we don't read too many operands from X86ISD [...] new c94ae749c08 AMDGPU: Fold immediate offset into BUFFER_LOAD_DWORD lowere [...] new 1a1019d0193 AMDGPU: Merge S_BUFFER_LOAD_DWORD_IMM into x2, x4 new 79b91c25d72 AMDGPU: Merge BUFFER_LOAD_DWORD_OFFEN into x2, x4 new e79e4fb9f11 AMDGPU: Merge BUFFER_LOAD_DWORD_OFFSET into x2, x4 new aa75d4aeb00 AMDGPU: Lower buffer store and atomic intrinsics manually new 9960086c111 AMDGPU: Merge BUFFER_STORE_DWORD_OFFEN/OFFSET into x2, x4
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Summary of changes: lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 16 +- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 13 + lib/Target/AMDGPU/AMDGPUISelLowering.h | 13 + lib/Target/AMDGPU/AMDGPUSubtarget.h | 8 + lib/Target/AMDGPU/BUFInstructions.td | 40 +-- lib/Target/AMDGPU/SIISelLowering.cpp | 113 ++++++ lib/Target/AMDGPU/SIInstrInfo.cpp | 34 +- lib/Target/AMDGPU/SIInstrInfo.h | 4 + lib/Target/AMDGPU/SIInstrInfo.td | 47 +++ lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 397 +++++++++++++++++++-- test/CodeGen/AMDGPU/llvm.amdgcn.buffer.atomic.ll | 3 + test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.ll | 102 ++++++ .../AMDGPU/llvm.amdgcn.buffer.store.format.ll | 9 + test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.ll | 84 +++++ test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.ll | 7 + test/CodeGen/AMDGPU/llvm.amdgcn.image.ll | 14 + test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll | 2 + test/CodeGen/AMDGPU/merge-stores.ll | 16 +- test/CodeGen/AMDGPU/smrd.ll | 100 +++++- 19 files changed, 936 insertions(+), 86 deletions(-)