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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allmodconfig in repository toolchain/ci/gcc.
from b642fca1c31 Objective-C/C++ : Handle parsing @property 'class' attribute. adds fb95de7a11b Daily bump. adds ce4ae1f4893 ira: Recompute regstat as max_regno changes [PR97705] adds 946b73c1132 libiberty/pex-win32.c: Initialize orig_err adds dc7e8839c92 Enable MOVDIRI, MOVDIR64B, CLDEMOTE and WAITPKG for march=tremont adds 2d4fa1f79c7 arm: [testcase] Better narrow some bfloat16 testcase new 17c25a454e0 Use a per-edge PRE PHI translation cache new ede8cfb8a45 CSE VN_INFO calls in PRE and VN new 4081596e852 c++: Consistently expose singleton overloads new e38cd64ac6c c++: ADL refactor
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Summary of changes: gcc/ChangeLog | 5 + gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 9 + gcc/config/i386/i386.h | 10 +- gcc/cp/ChangeLog | 5 + gcc/cp/cp-tree.h | 7 +- gcc/cp/name-lookup.c | 170 +++++++++++------ gcc/cp/parser.c | 5 - gcc/doc/invoke.texi | 59 +++--- gcc/ira.c | 27 ++- gcc/objc/ChangeLog | 7 + gcc/testsuite/ChangeLog | 18 ++ .../gcc.target/arm/simd/vld1_lane_bf16_1.c | 3 +- .../gcc.target/arm/simd/vld1_lane_bf16_indices_1.c | 2 + .../arm/simd/vld1q_lane_bf16_indices_1.c | 2 + .../gcc.target/arm/simd/vst1_lane_bf16_1.c | 3 +- .../gcc.target/arm/simd/vst1_lane_bf16_indices_1.c | 2 + .../arm/simd/vstq1_lane_bf16_indices_1.c | 2 + gcc/tree-ssa-pre.c | 209 +++++++++++---------- gcc/tree-ssa-sccvn.c | 16 +- libiberty/pex-win32.c | 2 +- 21 files changed, 348 insertions(+), 217 deletions(-)