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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allyesconfig in repository toolchain/ci/gcc.
from 969baf03acd c++: Implement -Wrange-loop-construct [PR94695] adds 873f8c1e6df Correct and improve -Wnonnull for calls to functions with V [...] adds 58614b10edc rs6000: Use parameterized names for tablejump adds 93bca37c0a6 Daily bump. adds ac001f5ce60 Re: rs6000: Use parameterized names for tablejump adds de2c1d00f27 gcc/configure typo fix adds f63023fafbb arm: Fix ICEs in no-literal-pool.c on MVE [PR97251] adds d4f9e819760 aarch64: Tweak movti and movtf patterns adds 135b043196b PR target/96313 AArch64: vqmovun* return types should be unsigned adds 2d8fbebdb1e PR target/97150 AArch64: 2nd parameter of unsigned Neon sca [...] adds 7d131029918 testsuite: Fix up amx* dg-do run tests with older binutils adds 92e652d8c21 i386: Define __LAHF_SAHF__ and __MOVBE__ macros, based on I [...] adds 4c0eb14bc85 [testsuite] Re-enable pr94600-{1,3}.c tests for arm adds 46183c96d2a x86: Use SET operation in MOVDIRI and MOVDIR64B adds bae974e6374 [nvptx] Add type arg to TARGET_LIBC_HAS_FUNCTION adds fcc4891d7f3 This patch fixes PR97045 - unlimited polymorphic array elem [...] adds 8b0a63e47cd OpenMP: Add implicit declare target for nested procedures adds 65167982efa Fortran: add contiguous check for ptr assignment, fix non-c [...] adds 734eed68537 c++: Kill DECL_HIDDEN_FRIEND_P adds aa248b8db9a middle-end: Refactor refcnt to use SLP_TREE_REF_COUNT for c [...] adds 97b798d80ba [SLP][VECT] Add check to fix 96837 adds 6bd4ce64eb4 [GCC][PATCH] arm: Fix MVE intrinsics polymorphic variants w [...] adds b6860cb96d0 aarch64: add support for Cortex-A78 and Cortex-A78AE adds 60e4b3cade5 arm: add support for Cortex-A78 and Cortex-A78AE adds 9ff2bcd9df8 amend SLP reduction testcases adds ef11f5b37b0 arm: [testsuite] Skip thumb2-cond-cmp tests on Cortex-M [PR94595] adds 373b99dc409 Add a testcase for PR target/96827 adds 1814c828a02 Add trailing dots so length of spec string matches number o [...] adds ecd700c1bc6 Fix some fnspec strings in trans-decl.c adds 091ddcc1b21 libgomp: Enforce 1-thread limit in subteams adds 73ae6eb5725 libstdc++: Use __is_same instead of __is_same_as adds e808f3fdfa8 PR c/97206 - ICE in composite_type on declarations of a sim [...] adds 7dbc7ad524a Avoid assuming a VLA access specification string contains a [...] adds d1ac0f0dfba libstdc++: Fix test_and_acquire / set_and_release for EABI [...]
No new revisions were added by this update.
Summary of changes: gcc/ChangeLog | 135 ++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 14 ++ gcc/attribs.c | 41 ++--- gcc/builtins.c | 4 +- gcc/builtins.def | 20 ++- gcc/c-family/ChangeLog | 5 + gcc/c-family/c-attribs.c | 18 +-- gcc/calls.c | 115 +++++++++----- gcc/config/aarch64/aarch64-cores.def | 2 + gcc/config/aarch64/aarch64-simd-builtins.def | 2 +- gcc/config/aarch64/aarch64-tune.md | 2 +- gcc/config/aarch64/aarch64.c | 9 +- gcc/config/aarch64/aarch64.md | 17 +- gcc/config/aarch64/arm_neon.h | 36 ++--- gcc/config/arm/arm-cpus.in | 22 +++ gcc/config/arm/arm-tables.opt | 6 + gcc/config/arm/arm-tune.md | 9 +- gcc/config/arm/arm.md | 4 +- gcc/config/arm/arm_mve.h | 167 ++++++++++---------- gcc/config/arm/vfp.md | 4 +- gcc/config/darwin-protos.h | 2 +- gcc/config/darwin.c | 3 +- gcc/config/i386/i386-c.c | 4 + gcc/config/i386/i386.c | 2 +- gcc/config/i386/i386.md | 20 +-- gcc/config/linux-protos.h | 2 +- gcc/config/linux.c | 3 +- gcc/config/nvptx/nvptx.c | 20 +++ gcc/config/rs6000/rs6000.md | 103 +++++------- gcc/configure | 2 +- gcc/configure.ac | 2 +- gcc/convert.c | 8 +- gcc/cp/ChangeLog | 52 +++++++ gcc/cp/call.c | 10 -- gcc/cp/cp-tree.h | 9 +- gcc/cp/decl.c | 12 +- gcc/cp/name-lookup.c | 28 ++-- gcc/cp/pt.c | 24 +-- gcc/doc/invoke.texi | 2 + gcc/doc/tm.texi | 7 +- gcc/fortran/expr.c | 26 +++- gcc/fortran/f95-lang.c | 4 +- gcc/fortran/trans-array.c | 15 +- gcc/fortran/trans-decl.c | 26 ++-- gcc/fortran/trans-expr.c | 3 +- gcc/fortran/trans-io.c | 46 +++--- gcc/fortran/trans-stmt.c | 1 + gcc/fortran/trans.c | 23 ++- gcc/match.pd | 6 +- gcc/omp-offload.c | 7 + gcc/target.def | 7 +- gcc/targhooks.c | 9 +- gcc/targhooks.h | 6 +- gcc/testsuite/ChangeLog | 94 +++++++++++ gcc/testsuite/gcc.dg/Warray-parameter-7.c | 25 +++ gcc/testsuite/gcc.dg/Warray-parameter-8.c | 36 +++++ gcc/testsuite/gcc.dg/Wnonnull-4.c | 173 +++++++++++++++++++++ gcc/testsuite/gcc.dg/Wstringop-overflow-23.c | 12 +- gcc/testsuite/gcc.dg/Wvla-parameter-5.c | 22 +++ gcc/testsuite/gcc.dg/Wvla-parameter-6.c | 34 ++++ gcc/testsuite/gcc.dg/Wvla-parameter-7.c | 36 +++++ gcc/testsuite/gcc.dg/attr-access-2.c | 10 +- gcc/testsuite/gcc.dg/pr94600-1.c | 4 +- gcc/testsuite/gcc.dg/pr94600-3.c | 4 +- gcc/testsuite/gcc.dg/vect/bb-slp-49.c | 28 ++++ gcc/testsuite/gcc.dg/vect/pr37027.c | 2 +- gcc/testsuite/gcc.dg/vect/pr67790.c | 1 + gcc/testsuite/gcc.dg/vect/pr92324-4.c | 2 + gcc/testsuite/gcc.dg/vect/pr92558.c | 2 + gcc/testsuite/gcc.dg/vect/pr95495.c | 2 + gcc/testsuite/gcc.dg/vect/slp-reduc-1.c | 2 +- gcc/testsuite/gcc.dg/vect/slp-reduc-2.c | 1 + gcc/testsuite/gcc.dg/vect/slp-reduc-3.c | 1 + gcc/testsuite/gcc.dg/vect/slp-reduc-4.c | 1 + gcc/testsuite/gcc.dg/vect/slp-reduc-5.c | 2 +- gcc/testsuite/gcc.dg/vect/slp-reduc-7.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-reduc-in-order-4.c | 1 + gcc/testsuite/gcc.target/aarch64/movtf_1.c | 87 +++++++++++ gcc/testsuite/gcc.target/aarch64/movti_1.c | 87 +++++++++++ gcc/testsuite/gcc.target/aarch64/pr96313.c | 8 + gcc/testsuite/gcc.target/aarch64/pr97150.c | 14 ++ .../gcc.target/aarch64/scalar_intrinsics.c | 6 +- .../gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c | 47 ++++++ .../gcc.target/arm/mve/intrinsics/mve_vaddq_n.c | 31 ++++ .../arm/mve/intrinsics/vaddq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vaddq_m_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vaddq_x_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vaddq_x_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpeqq_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpeqq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgeq_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgeq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgtq_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgtq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpleq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpleq_m_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpleq_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpleq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpltq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpltq_m_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpltq_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpltq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpneq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpneq_m_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpneq_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpneq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vfmaq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vfmaq_m_n_f32-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vfmasq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vfmasq_m_n_f32-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vmaxnmavq_f16-1.c | 12 ++ .../arm/mve/intrinsics/vmaxnmavq_f32-1.c | 12 ++ .../arm/mve/intrinsics/vmaxnmavq_p_f16-1.c | 12 ++ .../arm/mve/intrinsics/vmaxnmavq_p_f32-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c | 12 ++ .../arm/mve/intrinsics/vmaxnmvq_p_f16-1.c | 12 ++ .../arm/mve/intrinsics/vmaxnmvq_p_f32-1.c | 12 ++ .../arm/mve/intrinsics/vminnmavq_f16-1.c | 12 ++ .../arm/mve/intrinsics/vminnmavq_f32-1.c | 12 ++ .../arm/mve/intrinsics/vminnmavq_p_f16-1.c | 12 ++ .../arm/mve/intrinsics/vminnmavq_p_f32-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c | 12 ++ .../arm/mve/intrinsics/vminnmvq_p_f16-1.c | 12 ++ .../arm/mve/intrinsics/vminnmvq_p_f32-1.c | 12 ++ .../arm/mve/intrinsics/vmulq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vmulq_m_n_f32-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vmulq_x_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vmulq_x_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vsetq_lane_f16-1.c | 13 ++ .../arm/mve/intrinsics/vsetq_lane_f32-1.c | 13 ++ .../arm/mve/intrinsics/vsubq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vsubq_m_n_f32-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vsubq_x_n_f16-1.c | 13 ++ .../arm/mve/intrinsics/vsubq_x_n_f32-1.c | 13 ++ gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c | 2 +- gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c | 2 +- gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c | 2 +- gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c | 2 +- gcc/testsuite/gcc.target/i386/amxbf16-dpbf16ps-2.c | 2 + gcc/testsuite/gcc.target/i386/amxint8-dpbssd-2.c | 2 + gcc/testsuite/gcc.target/i386/amxint8-dpbsud-2.c | 2 + gcc/testsuite/gcc.target/i386/amxint8-dpbusd-2.c | 2 + gcc/testsuite/gcc.target/i386/amxint8-dpbuud-2.c | 2 + gcc/testsuite/gcc.target/i386/amxtile-2.c | 1 + gcc/testsuite/gcc.target/i386/movdir64b.c | 23 +++ gcc/testsuite/gcc.target/i386/movdiri32.c | 20 +++ gcc/testsuite/gcc.target/i386/movdiri64.c | 20 +++ gcc/testsuite/gcc.target/i386/pr96827.c | 41 +++++ gcc/testsuite/gfortran.dg/contiguous_11.f90 | 45 ++++++ gcc/testsuite/gfortran.dg/contiguous_4.f90 | 6 +- gcc/testsuite/gfortran.dg/contiguous_7.f90 | 16 +- gcc/testsuite/gfortran.dg/select_type_50.f90 | 52 +++++++ gcc/testsuite/lib/target-supports.exp | 17 ++ gcc/tree-ssa-math-opts.c | 8 +- gcc/tree-vect-slp.c | 22 +-- gcc/tree-vectorizer.h | 1 + libgcc/ChangeLog | 5 + libgomp/ChangeLog | 13 ++ libgomp/parallel.c | 9 +- .../testsuite/libgomp.fortran/declare-target-3.f90 | 45 ++++++ libstdc++-v3/config/cpu/arm/cxxabi_tweaks.h | 7 +- libstdc++-v3/include/bits/c++config | 6 +- libstdc++-v3/include/std/type_traits | 10 +- 180 files changed, 2649 insertions(+), 437 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/Warray-parameter-7.c create mode 100644 gcc/testsuite/gcc.dg/Warray-parameter-8.c create mode 100644 gcc/testsuite/gcc.dg/Wnonnull-4.c create mode 100644 gcc/testsuite/gcc.dg/Wvla-parameter-5.c create mode 100644 gcc/testsuite/gcc.dg/Wvla-parameter-6.c create mode 100644 gcc/testsuite/gcc.dg/Wvla-parameter-7.c create mode 100644 gcc/testsuite/gcc.dg/vect/bb-slp-49.c create mode 100644 gcc/testsuite/gcc.target/aarch64/movtf_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/movti_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr96313.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr97150.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_n.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c create mode 100644 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gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/i386/movdir64b.c create mode 100644 gcc/testsuite/gcc.target/i386/movdiri32.c create mode 100644 gcc/testsuite/gcc.target/i386/movdiri64.c create mode 100644 gcc/testsuite/gcc.target/i386/pr96827.c create mode 100644 gcc/testsuite/gfortran.dg/contiguous_11.f90 create mode 100644 gcc/testsuite/gfortran.dg/select_type_50.f90 create mode 100644 libgomp/testsuite/libgomp.fortran/declare-target-3.f90