This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch master in repository gcc.
from 712cb2967bd riscv: Avoid narrowing warning new 1352d4dd092 RISC-V: Add intrinsics support for SiFive Xsfvfnrclipxfqf e [...] new 27519705767 RISC-V: Add intrinsics testcases for SiFive Xsfvfnrclipxfqf [...] new e36eae19f3a testsuite: Adjust rs6000-ldouble-2.c for switch to -std=gnu [...]
The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/config/riscv/generic-vector-ooo.md | 2 +- gcc/config/riscv/genrvv-type-indexer.cc | 10 + gcc/config/riscv/riscv-vector-builtins-bases.cc | 6 - gcc/config/riscv/riscv-vector-builtins-bases.h | 6 + gcc/config/riscv/riscv-vector-builtins-shapes.cc | 28 + gcc/config/riscv/riscv-vector-builtins-shapes.h | 1 + gcc/config/riscv/riscv-vector-builtins.cc | 51 +- gcc/config/riscv/riscv-vector-builtins.def | 31 +- gcc/config/riscv/riscv-vector-builtins.h | 7 + gcc/config/riscv/riscv.md | 3 +- gcc/config/riscv/sifive-vector-builtins-bases.cc | 52 ++ gcc/config/riscv/sifive-vector-builtins-bases.h | 2 + .../riscv/sifive-vector-builtins-functions.def | 4 + gcc/config/riscv/sifive-vector.md | 20 + gcc/config/riscv/vector-iterators.md | 30 +- .../gcc.target/powerpc/rs6000-ldouble-2.c | 2 +- .../riscv/rvv/xsfvector/sf_vfnrclip_x_f_qf.c | 606 +++++++++++++++++++++ .../riscv/rvv/xsfvector/sf_vfnrclip_xu_f_qf.c | 605 ++++++++++++++++++++ 18 files changed, 1426 insertions(+), 40 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vfnrclip_x_f_qf.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vfnrclip_xu_f_qf.c