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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_binutils/master-aarch64 in repository toolchain/ci/binutils-gdb.

from fd3c53675c Support symbol+offset lookup in addr2line adds 2b53149244 Remove host_hex_value adds 480157863b Improve Ada unchecked union type printing adds 4a620b7e30 gdb: include jit_code_entry::symfile_addr value in names of [...] adds 565c20212a ld: Remove emultempl/armcoff.em adds eb06e60a98 Automatic date update in version.in adds bf484e9348 sim: Allow toggling of quiet NaN-bit semantics adds b6af5f3a74 sim: Factor out NaN handling in floating point operations adds fc3c199fac sim: Add partial support for IEEE 754-2008 adds 06c441ccef sim: mips: Add simulator support for mips32r6/mips64r6 adds 8df52eeeb0 Detect .eh_frame_hdr earlier for SIZEOF_HEADERS adds cd8adbf301 Enable "size" as a dumpprog in ld adds 9810db10f7 PR28827 testcase adds 0acf434a23 Tweak assembler invocation for pr28827-1 test

No new revisions were added by this update.

Summary of changes: bfd/elf-bfd.h | 7 +- bfd/elf-eh-frame.c | 3 +- bfd/elf.c | 18 +- bfd/elflink.c | 2 +- bfd/version.h | 2 +- binutils/testsuite/lib/binutils-common.exp | 1 + gdb/ada-typeprint.c | 59 +- gdb/c-lang.c | 6 +- gdb/charset.c | 14 - gdb/charset.h | 5 - gdb/jit.c | 41 +- gdb/mi/mi-parse.c | 4 +- gdb/python/py-objfile.c | 2 +- gdb/testsuite/gdb.ada/unchecked_union.exp | 6 +- .../gdb.ada/unchecked_union/unchecked_union.adb | 6 +- gdb/testsuite/gdb.base/jit-reader.exp | 4 +- gdb/utils.c | 4 +- ld/emultempl/armcoff.em | 293 - ld/testsuite/config/default.exp | 8 + ld/testsuite/ld-powerpc/powerpc.exp | 1 + ld/testsuite/ld-powerpc/pr28827-1.d | 5 + ld/testsuite/ld-powerpc/pr28827-1.s | 6828 ++++++++++++++++++++ sim/common/sim-bits.h | 5 + sim/common/sim-fpu.c | 324 +- sim/common/sim-fpu.h | 61 +- sim/mips/Makefile.in | 1 + sim/mips/configure | 22 +- sim/mips/configure.ac | 20 +- sim/mips/cp1.c | 432 +- sim/mips/cp1.h | 6 + sim/mips/interp.c | 6 +- sim/mips/micromips.igen | 4 +- sim/mips/mips.igen | 381 +- sim/mips/mips3264r2.igen | 30 + sim/mips/mips3264r6.igen | 1226 ++++ sim/mips/sim-main.h | 97 +- sim/testsuite/mips/basic.exp | 72 +- sim/testsuite/mips/hilo-hazard-3.s | 2 +- sim/testsuite/mips/r2-fpu.s | 31 + sim/testsuite/mips/r6-64.s | 157 + sim/testsuite/mips/r6-branch.s | 291 + sim/testsuite/mips/r6-forbidden.s | 51 + sim/testsuite/mips/r6-fpu.s | 446 ++ sim/testsuite/mips/r6-llsc-dp.s | 57 + sim/testsuite/mips/r6-llsc-wp.s | 41 + sim/testsuite/mips/r6-removed.csv | 68 + sim/testsuite/mips/r6-removed.s | 18 + sim/testsuite/mips/r6.s | 163 + sim/testsuite/mips/testutils.inc | 55 + sim/testsuite/mips/utils-r6.inc | 150 + 50 files changed, 10907 insertions(+), 629 deletions(-) delete mode 100644 ld/emultempl/armcoff.em create mode 100644 ld/testsuite/ld-powerpc/pr28827-1.d create mode 100644 ld/testsuite/ld-powerpc/pr28827-1.s create mode 100644 sim/mips/mips3264r6.igen create mode 100644 sim/testsuite/mips/r2-fpu.s create mode 100644 sim/testsuite/mips/r6-64.s create mode 100644 sim/testsuite/mips/r6-branch.s create mode 100644 sim/testsuite/mips/r6-forbidden.s create mode 100644 sim/testsuite/mips/r6-fpu.s create mode 100644 sim/testsuite/mips/r6-llsc-dp.s create mode 100644 sim/testsuite/mips/r6-llsc-wp.s create mode 100644 sim/testsuite/mips/r6-removed.csv create mode 100644 sim/testsuite/mips/r6-removed.s create mode 100644 sim/testsuite/mips/r6.s create mode 100644 sim/testsuite/mips/utils-r6.inc