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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/llvm-project.

from 22e99c434fb [MIPS GlobalISel] Select fcmp adds 5145b1e4421 [Sema] Prevent binding incompatible addr space ref to temporaries adds 54bd6c840e3 UpdateTestChecks: hexagon support adds 253086230fa [NFC][Codegen][X86] Add AVX2 runline for '(X & (C l>> Y)) = [...] adds da59652c1ba Avoid using NoThrow Exception Specifier in non-C++ Modes. adds d34797dfc26 Title: [LOOPINFO] Extend Loop object to add utilities to ge [...] adds b90b3547988 [LoopInfo] Fix unused variable warning. NFC. adds 7ca9b978c4f [OpenCL][PR42031] Prevent deducing addr space in type alias. adds ad62a3a2992 [LoopUtils][SLPVectorizer] clean up management of fast-math-flags adds 15c657d13d6 [SLP] Fix regression in broadcasts caused by operand reorde [...] adds 5da702308c5 [llvm-readobj] - Remove TODOs from gnu-hash-symbols.test an [...] adds 590b1aee609 Revert "Title: [LOOPINFO] Extend Loop object to add utiliti [...] adds a0e350e640b [X86][SSE] Add additional nt-load test cases as discussed o [...] adds de586bd1fd5 [X86][AVX] Generalize split256BitStore to splitVectorStore. NFCI. adds d47f5488cf0 Added propagation of not big initial stack size of master t [...] adds 5659b36c15b [DynamicLoader] Make sure we always set the rendezvous breakpoint adds 2bf82879bde [x86] split more 256-bit stores of concatenated vectors adds 3027a2999c3 [dsymutil] Support more than 4 architectures adds 77d6adc491a Fix shadow local variable warning. NFCI. adds d97ea1bc1ac [Clang] Fix pretty printing of CUDA address spaces adds b67cb3cda05 Use LTO capable linker adds 579c8df7013 [lld] Explicitly ignore comdat groups when parsing LTO object(s) adds a282a61ba3a [WebAssembly] Handle object parsing more like the ELF backend adds 0a31726d200 [NFC][Reassociate] Regenerate CHECKs for fast-basictest.ll adds 13dd125043f [Tests] Add poison inference tests for indvars showing both [...] adds d0fff89b816 [X86] Add the vector integer min/max instructions to isAsso [...] adds 5162266515e [NFC][Reassociate] Add unary fneg tests to fast-basictest.ll adds 8b83a9c6b13 [NFC][Reassociate] Fix mistake in 468b2ad adds 84cfca0f2b7 [analyzer] PathDiagnosticPopUpPiece: working with CharSourceRange adds 036fa5346f2 [X86][SSE] Add vector tests to cover more isNegatibleForFre [...] adds a95edb9dc1d [GWP-ASan] Core Guarded Pool Allocator [4]. adds e34d1a4e07b [cmake] Remove duplicate TestingSupport library for linking adds 53572d0470c [WebAssembly] Limit PIC support to the Emscripten target adds ecf3ae4a703 [NativeProcessDarwin] Remove dead code. NFCI. adds 0f8a764e8fa AMDGPU: Fix using 2 different enums for same operand flags adds 4fb580c3147 AMDGPU: Remove amdgpu-max-work-group-size attribute adds 607c8a9d148 IR: make getParamByValType Just Work. NFC. adds 8d7f118ab2b InstCombine: correctly change byval type attribute alongsid [...] adds 2d0896c1cb9 [LOOPINFO] Extend Loop object to add utilities to get the l [...] adds ba86f2a22e7 [WebAssembly] Use Emscripten triples in PIC tests. adds a3701caad82 [clang-format][NFC] Fix BS_Allman style example in the head [...] adds 3975b15dbab [X86] Fix mistake that marked VADDSSrrb_Int/VADDSDrrb_Int/V [...] adds 7ce7110e6d9 Speedup to_string and to_wstring for integers using stack b [...] adds 7c663cde14e [WebAssembly] Improve lto/comdat.ll test. NFC. adds 9423f5ef56d Fix FileCheck prefixes in test case. adds c46827c7eda LLVM IR: Generate new-style byval-with-Type from Clang adds 663d762c9a5 NewGVN: Handle addrspacecast adds ac111e526dd [InstCombine] simplify code for bitcast of insertelement; NFC adds e3eeacd70a8 [CallSite removal] Refactoring llvm::InlineFunction APIs adds acb56090639 [EarlyCSE] Add tests for negated min/max/abs [NFC] adds 5347024e283 Update issue statuses. Reviewed as https://reviews.llvm.org/D62932 adds 8f500a6f9ca [libcxx][test] Include test_workarounds.h where needed adds b812b7a45ed AMDGPU: Invert frame index offset interpretation adds 2f94203e23d Revert "[AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pa [...] adds 6c5d5ce5517 Allow target to handle STRICT floating-point nodes adds c72fbe5dc18 [MSAN] Add unary FNeg visitor to the MemorySanitizer adds 34c8b835b16 AMDGPU: Don't fix emergency stack slot at offset 0 adds c37ff0d138a Revert "Revert "[AArch64][GlobalISel] Optimize G_FCMP + G_S [...] adds 5e7ca755d8c [WebAssembly] Support Leak Sanitizer on Emscripten adds 3da331b4562 android: add a close-on-exec check on pipe2() adds 5b2a85d0ded android: add a close-on-exec check on pipe() adds cf44372137f [X86] Add test case for masked load with constant mask and [...] adds 9226ba6b376 [X86] Don't turn avx masked.load with constant mask into ma [...] adds c1867557d93 [Profile]: Add runtime interface to specify file handle for [...] adds d940e20051b [AArch64][GlobalISel] Add the new changes to fix PR42129 th [...] adds 36d1f2443b0 [pstl] The optimized parallel versions of sort, stable_sort [...] adds 448acbc06fe [clang-tidy] Fix make-unique tests on C++2a. adds bad2b3cf08b Revert "Speedup to_string and to_wstring for integers using [...] adds d3144a4abc8 [AArch64][GlobalISel] Add manual selection support for G_ZE [...] adds dbceb9b2203 Fixup files added in r362636 to build with gcc 5.4. NFCI adds 0d02dc60542 Update AST matchers tutorial to use monorepo layout adds 3c82c57d2b5 [AVR] Fix the 'load.ll' test after r362351 adds 3a29f7c99c2 [X86] Add ENQCMD instructions adds 54eeb3f40ab [clangd] Remove unused signature help quality signal. NFC adds 7cc580f5e95 [SCEV] Use wrap flags in InsertBinop adds faaa2b5d215 [MIPS GlobalISel] Select floor and ceil adds a7d00064474 [MIPS GlobalISel] Select fpext and fptrunc adds 0a1fd355b2f [MIPS GlobalISel] Select fabs adds cff7d2fdc9e [RISCV] Add CostModel GEP tests adds 81132ce0e95 [MIPS GlobalISel] Select sqrt adds 711f3615969 [RISCV] Disable test/Analysis/CostModel/RISCV tests if RISC [...] adds f5b73c95555 Fix whitespace indentation. NFCI. adds da993d08c87 [DAGCombine] Cleanup isNegatibleForFree/GetNegatedExpressio [...] adds 8c2c0725828 Include what you use in LanaiAsmParser.cpp adds dc8affe607a [X86][SSE] Add nonuniform constant vector test for PR42105 adds bce9e11a7b0 [AArch64] Handle ISD::LROUND and ISD::LLROUND for float16 adds f1249442cf3 Revert "[SCEV] Use wrap flags in InsertBinop" adds 559e69a821b AArch64] Handle ISD::LRINT and ISD::LLRINT for float16 adds df95e6109e1 [clang-tidy] Fix an assertion failure in misc-redundant-exp [...] adds 60e1296a9a3 [clang-tidy] Make the plugin honor NOLINT new dd2d1a168f4 [InstCombine] add tests for loads of bitcasted vector pointer; NFC new bf5bca5bea5 [llvm-ar] Create thin archives with MRI scripts new 71d3f227a79 FileCheck [6/12]: Introduce numeric variable definition new a4f5a2ad1f0 [clang-tidy] Another attempt to fix misc-redundant-expressi [...]

The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 94 ++- .../clang-tidy/ClangTidyDiagnosticConsumer.h | 13 + .../clang-tidy/android/AndroidTidyModule.cpp | 4 + .../clang-tidy/android/CMakeLists.txt | 2 + .../clang-tidy/android/CloexecPipe2Check.cpp | 33 + .../clang-tidy/android/CloexecPipe2Check.h | 34 + .../clang-tidy/android/CloexecPipeCheck.cpp | 37 + .../clang-tidy/android/CloexecPipeCheck.h | 34 + .../clang-tidy/misc/RedundantExpressionCheck.cpp | 9 +- .../clang-tidy/plugin/ClangTidyPlugin.cpp | 23 +- clang-tools-extra/clangd/CodeComplete.cpp | 9 +- clang-tools-extra/clangd/Quality.cpp | 2 - clang-tools-extra/clangd/Quality.h | 1 - clang-tools-extra/docs/ReleaseNotes.rst | 10 + .../clang-tidy/checks/android-cloexec-pipe.rst | 20 + .../clang-tidy/checks/android-cloexec-pipe2.rst | 21 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 2 + .../test/clang-tidy/android-cloexec-pipe.cpp | 27 + .../test/clang-tidy/android-cloexec-pipe2.cpp | 68 ++ clang-tools-extra/test/clang-tidy/basic.cpp | 1 + .../test/clang-tidy/misc-redundant-expression.cpp | 12 + .../clang-tidy/modernize-make-unique-cxx14.cpp | 10 - .../modernize-make-unique-inaccessible-ctors.cpp | 113 +++ .../test/clang-tidy/modernize-make-unique.cpp | 61 +- .../test/clang-tidy/nolint-plugin.cpp | 50 ++ .../test/clang-tidy/nolintnextline-plugin.cpp | 48 ++ .../cmake/caches/DistributionExample-stage2.cmake | 2 +- clang/cmake/caches/DistributionExample.cmake | 7 +- clang/docs/ClangCommandLineReference.rst | 2 + clang/docs/ClangFormatStyleOptions.rst | 21 +- clang/docs/LibASTMatchersTutorial.rst | 12 +- clang/include/clang/AST/Type.h | 20 +- clang/include/clang/Basic/BuiltinsX86.def | 4 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 3 + clang/include/clang/Driver/Options.td | 2 + clang/include/clang/Format/Format.h | 21 +- clang/include/clang/Sema/Initialization.h | 3 + clang/include/clang/Sema/ParsedAttr.h | 2 +- clang/lib/AST/TypePrinter.cpp | 8 +- clang/lib/Basic/Targets/X86.cpp | 6 + clang/lib/Basic/Targets/X86.h | 1 + clang/lib/CodeGen/CGBuiltin.cpp | 2 +- clang/lib/CodeGen/CGCall.cpp | 2 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 2 +- clang/lib/Headers/CMakeLists.txt | 1 + clang/lib/Headers/cpuid.h | 1 + clang/lib/Headers/enqcmdintrin.h | 63 ++ clang/lib/Headers/immintrin.h | 4 + clang/lib/Sema/SemaInit.cpp | 19 +- clang/lib/Sema/SemaType.cpp | 28 +- clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp | 6 +- clang/test/CodeGen/aapcs-align.cpp | 8 +- clang/test/CodeGen/arm-aapcs-vfp.c | 6 +- clang/test/CodeGen/arm-arguments.c | 8 +- clang/test/CodeGen/arm-byval-align.c | 2 +- clang/test/CodeGen/blocks.c | 2 +- clang/test/CodeGen/complex-builtins.c | 76 +- clang/test/CodeGen/complex-libcalls.c | 80 +- clang/test/CodeGen/le32-arguments.c | 6 +- clang/test/CodeGen/mingw-long-double.c | 2 +- clang/test/CodeGen/nvptx-abi.c | 10 +- clang/test/CodeGen/ppc64-align-struct.c | 6 +- clang/test/CodeGen/ppc64le-aggregates.c | 8 +- clang/test/CodeGen/ppc64le-f128Aggregates.c | 4 +- clang/test/CodeGen/regcall.c | 10 +- clang/test/CodeGen/regparm-struct.c | 2 +- clang/test/CodeGen/renderscript.c | 2 +- clang/test/CodeGen/sparc-arguments.c | 4 +- clang/test/CodeGen/sparcv8-abi.c | 6 +- clang/test/CodeGen/stdcall-fastcall.c | 4 +- clang/test/CodeGen/struct-passing.c | 4 +- clang/test/CodeGen/vectorcall.c | 4 +- clang/test/CodeGen/wasm-arguments.c | 12 +- clang/test/CodeGen/x86-enqcmd-builtins.c | 20 + clang/test/CodeGen/x86_32-arguments-darwin.c | 46 +- clang/test/CodeGen/x86_32-arguments-iamcu.c | 6 +- clang/test/CodeGen/x86_32-arguments-linux.c | 28 +- clang/test/CodeGen/x86_32-arguments-realign.c | 2 +- clang/test/CodeGen/x86_64-arguments-nacl.c | 4 +- clang/test/CodeGen/x86_64-arguments.c | 34 +- clang/test/CodeGenCUDA/kernel-args-alignment.cu | 2 +- clang/test/CodeGenCUDA/kernel-args.cu | 8 +- clang/test/CodeGenCXX/amdgcn-func-arg.cpp | 6 +- .../CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp | 2 +- .../CodeGenCXX/microsoft-abi-sret-and-byval.cpp | 30 +- clang/test/CodeGenCXX/ms-inline-asm-fields.cpp | 2 +- clang/test/CodeGenCXX/regcall.cpp | 4 +- clang/test/CodeGenCXX/regparm.cpp | 2 +- clang/test/CodeGenCXX/stmtexpr.cpp | 2 +- clang/test/CodeGenCXX/wasm-args-returns.cpp | 6 +- clang/test/CodeGenCXX/x86_32-arguments.cpp | 4 +- clang/test/CodeGenCXX/x86_64-arguments-avx.cpp | 2 +- .../test/CodeGenCXX/x86_64-arguments-nacl-x32.cpp | 4 +- clang/test/CodeGenCXX/x86_64-arguments.cpp | 16 +- clang/test/CodeGenObjC/local-static-block.m | 14 +- clang/test/CodeGenOpenCL/addr-space-struct-arg.cl | 20 +- .../test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl | 16 +- .../test/CodeGenOpenCL/cl20-device-side-enqueue.cl | 6 +- .../kernels-have-spir-cc-by-default.cl | 6 +- clang/test/Driver/x86-target-features.c | 5 + .../test/OpenMP/nvptx_unsupported_type_codegen.cpp | 4 +- clang/test/Preprocessor/x86_target_features.c | 7 + clang/test/Sema/attr-nothrow.c | 18 + .../test/SemaOpenCLCXX/address-space-deduction.cl | 20 +- .../test/SemaOpenCLCXX/address-space-references.cl | 5 + clang/unittests/Tooling/CMakeLists.txt | 1 - compiler-rt/lib/gwp_asan/CMakeLists.txt | 6 +- compiler-rt/lib/gwp_asan/definitions.h | 29 + .../lib/gwp_asan/guarded_pool_allocator.cpp | 433 ++++++++++ compiler-rt/lib/gwp_asan/guarded_pool_allocator.h | 254 ++++++ .../guarded_pool_allocator_posix.cpp | 96 +++ compiler-rt/lib/gwp_asan/tests/CMakeLists.txt | 8 +- compiler-rt/lib/gwp_asan/tests/alignment.cpp | 27 + compiler-rt/lib/gwp_asan/tests/basic.cpp | 60 ++ compiler-rt/lib/gwp_asan/tests/harness.h | 60 ++ compiler-rt/lib/gwp_asan/tests/slot_reuse.cpp | 72 ++ .../lib/gwp_asan/tests/thread_contention.cpp | 69 ++ compiler-rt/lib/profile/InstrProfiling.h | 21 +- compiler-rt/lib/profile/InstrProfilingFile.c | 64 +- compiler-rt/lib/profile/InstrProfilingUtil.c | 20 + compiler-rt/lib/profile/InstrProfilingUtil.h | 2 + .../variant/variant.get/get_index.pass.cpp | 1 + .../variant/variant.get/get_type.pass.cpp | 1 + libcxx/www/cxx1z_status.html | 6 +- libcxx/www/cxx2a_status.html | 2 +- lld/ELF/Driver.cpp | 3 +- lld/ELF/InputFiles.cpp | 35 +- lld/ELF/InputFiles.h | 10 +- lld/test/wasm/lto/comdat.ll | 8 +- lld/test/wasm/pie.ll | 2 +- lld/test/wasm/shared.ll | 2 +- lld/wasm/InputFiles.cpp | 18 +- lld/wasm/InputFiles.h | 11 +- lld/wasm/SymbolTable.cpp | 28 +- .../POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp | 13 +- .../Plugins/Process/Darwin/NativeProcessDarwin.cpp | 8 - llvm/docs/AMDGPUUsage.rst | 2 - llvm/docs/CommandGuide/FileCheck.rst | 49 +- llvm/include/llvm/Analysis/LoopInfo.h | 161 ++++ llvm/include/llvm/CodeGen/MachineInstr.h | 15 +- llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 17 +- llvm/include/llvm/CodeGen/TargetLowering.h | 4 +- llvm/include/llvm/IR/Argument.h | 2 + llvm/include/llvm/IR/Function.h | 10 +- llvm/include/llvm/IR/InstrTypes.h | 5 +- llvm/include/llvm/MC/MCInstrDesc.h | 6 + llvm/include/llvm/Support/FileCheck.h | 134 ++- llvm/include/llvm/Target/Target.td | 1 + llvm/include/llvm/Target/TargetSelectionDAG.td | 115 +++ llvm/include/llvm/Transforms/Utils/Cloning.h | 5 +- llvm/include/llvm/Transforms/Utils/LoopUtils.h | 5 +- llvm/lib/Analysis/LoopInfo.cpp | 214 +++++ llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 3 +- llvm/lib/Bitcode/Writer/ValueEnumerator.cpp | 2 +- llvm/lib/CodeGen/ExpandReductions.cpp | 5 +- .../lib/CodeGen/GlobalISel/InstructionSelector.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 10 +- llvm/lib/CodeGen/ImplicitNullChecks.cpp | 3 +- llvm/lib/CodeGen/MIRParser/MILexer.cpp | 1 + llvm/lib/CodeGen/MIRParser/MILexer.h | 1 + llvm/lib/CodeGen/MIRParser/MIParser.cpp | 5 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 + llvm/lib/CodeGen/MachineCSE.cpp | 2 +- llvm/lib/CodeGen/MachineInstr.cpp | 4 +- llvm/lib/CodeGen/MachinePipeliner.cpp | 4 +- llvm/lib/CodeGen/PeepholeOptimizer.cpp | 2 +- llvm/lib/CodeGen/ScheduleDAGInstrs.cpp | 13 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 53 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 3 + .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 18 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 4 +- llvm/lib/CodeGen/TargetInstrInfo.cpp | 3 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 28 + llvm/lib/IR/Function.cpp | 4 + llvm/lib/Support/FileCheck.cpp | 407 +++++++--- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 16 + .../Target/AArch64/AArch64InstructionSelector.cpp | 28 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 11 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 202 +++-- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 10 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 152 ++-- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 18 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 11 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 10 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 61 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 2 - llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp | 1 - llvm/lib/Target/Mips/MipsInstructionSelector.cpp | 10 + llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 11 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 12 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 51 ++ llvm/lib/Target/SystemZ/SystemZInstrFP.td | 187 ++--- llvm/lib/Target/SystemZ/SystemZInstrVector.td | 181 +++-- llvm/lib/Target/SystemZ/SystemZOperators.td | 20 +- .../WebAssembly/WebAssemblyTargetMachine.cpp | 13 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 37 +- llvm/lib/Target/X86/X86InstrAVX512.td | 2 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 84 ++ .../Transforms/InstCombine/InstCombineCalls.cpp | 24 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 9 +- .../Transforms/Instrumentation/MemorySanitizer.cpp | 2 + llvm/lib/Transforms/Scalar/NewGVN.cpp | 5 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 10 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 52 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 52 +- llvm/test/Analysis/CostModel/RISCV/gep.ll | 189 +++++ .../CostModel}/RISCV/lit.local.cfg | 0 .../CodeGen/AArch64/GlobalISel/fold-fp-select.mir | 32 + .../CodeGen/AArch64/GlobalISel/select-zextload.mir | 139 +++- llvm/test/CodeGen/AArch64/llrint-conv-fp16.ll | 35 + llvm/test/CodeGen/AArch64/llround-conv-fp16.ll | 32 + llvm/test/CodeGen/AArch64/lrint-conv-fp16-win.ll | 36 + llvm/test/CodeGen/AArch64/lrint-conv-fp16.ll | 35 + llvm/test/CodeGen/AArch64/lround-conv-fp16-win.ll | 33 + llvm/test/CodeGen/AArch64/lround-conv-fp16.ll | 32 + llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll | 134 ++- llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 102 +-- llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll | 17 +- .../CodeGen/AMDGPU/callee-special-input-sgprs.ll | 8 +- .../CodeGen/AMDGPU/callee-special-input-vgprs.ll | 99 +-- .../AMDGPU/cross-block-use-is-not-abi-copy.ll | 16 +- .../test/CodeGen/AMDGPU/frame-index-elimination.ll | 94 ++- llvm/test/CodeGen/AMDGPU/function-args.ll | 184 ++--- .../AMDGPU/large-work-group-promote-alloca.ll | 2 +- llvm/test/CodeGen/AMDGPU/load-hi16.ll | 52 +- llvm/test/CodeGen/AMDGPU/load-lo16.ll | 50 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 22 +- llvm/test/CodeGen/AMDGPU/multi-dword-vgpr-spill.ll | 109 ++- llvm/test/CodeGen/AMDGPU/nested-calls.ll | 4 +- .../CodeGen/AMDGPU/pei-reg-scavenger-position.mir | 12 +- .../CodeGen/AMDGPU/promote-alloca-calling-conv.ll | 2 +- .../CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir | 52 +- llvm/test/CodeGen/AMDGPU/sibling-call.ll | 78 +- .../test/CodeGen/AMDGPU/sp-too-many-input-sgprs.ll | 102 +++ .../CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll | 6 +- .../CodeGen/AMDGPU/spill-empty-live-interval.mir | 6 +- .../CodeGen/AMDGPU/spill-offset-calculation.ll | 62 +- llvm/test/CodeGen/AMDGPU/stack-realign.ll | 16 +- .../AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir | 8 +- llvm/test/CodeGen/AMDGPU/store-hi16.ll | 14 +- .../CodeGen/AMDGPU/subreg-split-live-in-error.mir | 7 +- llvm/test/CodeGen/AVR/load.ll | 4 +- llvm/test/CodeGen/Hexagon/isel-prefer.ll | 79 +- llvm/test/CodeGen/Hexagon/ntstbit.ll | 35 +- llvm/test/CodeGen/Hexagon/tstbit.ll | 11 +- .../CodeGen/MIR/AMDGPU/machine-function-info.ll | 4 +- .../Mips/GlobalISel/instruction-select/fabs.mir | 65 ++ .../instruction-select/fpext_and_fptrunc.mir | 65 ++ .../Mips/GlobalISel/instruction-select/fsqrt.mir | 65 ++ .../Mips/GlobalISel/legalizer/ceil_and_floor.mir | 147 ++++ .../CodeGen/Mips/GlobalISel/legalizer/fabs.mir | 61 ++ .../GlobalISel/legalizer/fpext_and_fptrunc.mir | 61 ++ .../CodeGen/Mips/GlobalISel/legalizer/fsqrt.mir | 61 ++ .../Mips/GlobalISel/llvm-ir/ceil_and_floor.ll | 79 ++ llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fabs.ll | 27 + .../Mips/GlobalISel/llvm-ir/fpext_and_fptrunc.ll | 25 + llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fsqrt.ll | 27 + .../CodeGen/Mips/GlobalISel/regbankselect/fabs.mir | 63 ++ .../GlobalISel/regbankselect/fpext_and_fptrunc.mir | 63 ++ .../Mips/GlobalISel/regbankselect/fsqrt.mir | 63 ++ llvm/test/CodeGen/SystemZ/fp-strict-add-01.ll | 173 ++++ llvm/test/CodeGen/SystemZ/fp-strict-add-02.ll | 172 ++++ llvm/test/CodeGen/SystemZ/fp-strict-add-03.ll | 25 + llvm/test/CodeGen/SystemZ/fp-strict-add-04.ll | 22 + llvm/test/CodeGen/SystemZ/fp-strict-alias.ll | 140 ++++ llvm/test/CodeGen/SystemZ/fp-strict-conv-01.ll | 95 +++ llvm/test/CodeGen/SystemZ/fp-strict-conv-02.ll | 33 + llvm/test/CodeGen/SystemZ/fp-strict-conv-03.ll | 35 + llvm/test/CodeGen/SystemZ/fp-strict-conv-04.ll | 35 + llvm/test/CodeGen/SystemZ/fp-strict-conv-15.ll | 64 ++ llvm/test/CodeGen/SystemZ/fp-strict-div-01.ll | 173 ++++ llvm/test/CodeGen/SystemZ/fp-strict-div-02.ll | 173 ++++ llvm/test/CodeGen/SystemZ/fp-strict-div-03.ll | 25 + llvm/test/CodeGen/SystemZ/fp-strict-div-04.ll | 22 + llvm/test/CodeGen/SystemZ/fp-strict-mul-01.ll | 173 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llvm/test/CodeGen/SystemZ/fp-strict-sub-01.ll | 173 ++++ llvm/test/CodeGen/SystemZ/fp-strict-sub-02.ll | 173 ++++ llvm/test/CodeGen/SystemZ/fp-strict-sub-03.ll | 25 + llvm/test/CodeGen/SystemZ/fp-strict-sub-04.ll | 22 + llvm/test/CodeGen/SystemZ/vec-strict-add-01.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-add-02.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-div-01.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-div-02.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-max-01.ll | 80 ++ llvm/test/CodeGen/SystemZ/vec-strict-min-01.ll | 80 ++ llvm/test/CodeGen/SystemZ/vec-strict-mul-01.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-mul-02.ll | 36 + llvm/test/CodeGen/SystemZ/vec-strict-mul-03.ll | 33 + llvm/test/CodeGen/SystemZ/vec-strict-mul-04.ll | 37 + llvm/test/CodeGen/SystemZ/vec-strict-mul-05.ll | 75 ++ llvm/test/CodeGen/SystemZ/vec-strict-round-01.ll | 155 ++++ llvm/test/CodeGen/SystemZ/vec-strict-round-02.ll | 154 ++++ llvm/test/CodeGen/SystemZ/vec-strict-sqrt-01.ll | 29 + llvm/test/CodeGen/SystemZ/vec-strict-sqrt-02.ll | 29 + llvm/test/CodeGen/SystemZ/vec-strict-sub-01.ll | 34 + llvm/test/CodeGen/SystemZ/vec-strict-sub-02.ll | 33 + .../SystemZ/vector-constrained-fp-intrinsics.ll | 334 ++++---- llvm/test/CodeGen/WebAssembly/address-offsets.ll | 2 +- llvm/test/CodeGen/WebAssembly/call-pic.ll | 2 +- llvm/test/CodeGen/WebAssembly/load-store-pic.ll | 2 +- llvm/test/CodeGen/X86/dag-fmf-cse.ll | 13 +- llvm/test/CodeGen/X86/fdiv.ll | 11 + llvm/test/CodeGen/X86/fp-fold.ll | 50 ++ .../hoist-and-by-const-from-lshr-in-eqcmp-zero.ll | 804 ++++++++---------- .../hoist-and-by-const-from-shl-in-eqcmp-zero.ll | 796 ++++++++---------- llvm/test/CodeGen/X86/horizontal-reduce-smax.ll | 104 +-- llvm/test/CodeGen/X86/horizontal-reduce-smin.ll | 104 +-- llvm/test/CodeGen/X86/horizontal-reduce-umax.ll | 120 +-- llvm/test/CodeGen/X86/horizontal-reduce-umin.ll | 100 +-- llvm/test/CodeGen/X86/machine-combiner-int-vec.ll | 320 ++++---- llvm/test/CodeGen/X86/masked_load.ll | 55 +- llvm/test/CodeGen/X86/memset-nonzero.ll | 5 +- .../CodeGen/X86/merge-consecutive-stores-nt.ll | 248 +++++- llvm/test/CodeGen/X86/oddshuffles.ll | 157 ++-- llvm/test/CodeGen/X86/vector-reduce-smax-widen.ll | 148 ++-- llvm/test/CodeGen/X86/vector-reduce-smax.ll | 148 ++-- llvm/test/CodeGen/X86/vector-reduce-smin-widen.ll | 148 ++-- llvm/test/CodeGen/X86/vector-reduce-smin.ll | 148 ++-- llvm/test/CodeGen/X86/vector-reduce-umax-widen.ll | 166 ++-- llvm/test/CodeGen/X86/vector-reduce-umax.ll | 166 ++-- llvm/test/CodeGen/X86/vector-reduce-umin-widen.ll | 146 ++-- llvm/test/CodeGen/X86/vector-reduce-umin.ll | 146 ++-- llvm/test/CodeGen/X86/x86-interleaved-access.ll | 68 +- .../test/FileCheck/numeric-defines-diagnostics.txt | 6 +- llvm/test/FileCheck/numeric-expression.txt | 107 ++- llvm/test/FileCheck/var-scope.txt | 17 +- llvm/test/FileCheck/verbose.txt | 29 +- .../Instrumentation/MemorySanitizer/msan_basic.ll | 16 + llvm/test/Transforms/EarlyCSE/commute.ll | 102 +++ .../IndVarSimplify/infer-poison-flags.ll | 369 +++++++++ llvm/test/Transforms/InstCombine/byval.ll | 24 + .../Transforms/InstCombine/load-bitcast-vec.ll | 90 +++ llvm/test/Transforms/NewGVN/addrspacecast.ll | 108 +++ llvm/test/Transforms/Reassociate/fast-basictest.ll | 97 ++- .../test/Transforms/SLPVectorizer/X86/broadcast.ll | 58 +- llvm/test/tools/llvm-ar/mri-thin-archive.test | 23 + llvm/test/tools/llvm-readobj/demangle.test | 14 +- llvm/test/tools/llvm-readobj/gnu-hash-symbols.test | 14 +- llvm/tools/dsymutil/MachOUtils.cpp | 2 +- llvm/tools/dsymutil/MachOUtils.h | 3 +- llvm/tools/llvm-ar/llvm-ar.cpp | 6 +- llvm/unittests/Analysis/LoopInfoTest.cpp | 900 +++++++++++++++++++++ llvm/unittests/Support/FileCheckTest.cpp | 294 ++++--- llvm/utils/TableGen/CodeGenInstruction.cpp | 1 + llvm/utils/TableGen/CodeGenInstruction.h | 1 + llvm/utils/TableGen/InstrInfoEmitter.cpp | 1 + llvm/utils/UpdateTestChecks/asm.py | 19 + openmp/runtime/src/kmp.h | 1 + openmp/runtime/src/kmp_settings.cpp | 14 + openmp/runtime/src/z_Linux_util.cpp | 11 + openmp/runtime/test/misc_bugs/stack-propagate.c | 65 ++ pstl/include/pstl/internal/algorithm_impl.h | 28 +- pstl/include/pstl/internal/parallel_backend_tbb.h | 630 ++++++++++++--- .../include/pstl/internal/parallel_backend_utils.h | 71 +- 375 files changed, 16721 insertions(+), 4471 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/android/CloexecPipe2Check.cpp create mode 100644 clang-tools-extra/clang-tidy/android/CloexecPipe2Check.h create mode 100644 clang-tools-extra/clang-tidy/android/CloexecPipeCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/android/CloexecPipeCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/android-cloexec-pipe.rst create mode 100644 clang-tools-extra/docs/clang-tidy/checks/android-cloexec-pipe2.rst create mode 100644 clang-tools-extra/test/clang-tidy/android-cloexec-pipe.cpp create mode 100644 clang-tools-extra/test/clang-tidy/android-cloexec-pipe2.cpp delete mode 100644 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