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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allyesconfig in repository toolchain/ci/llvm-project.

from c62053979489 [AArch64] Fix the upper limit for folded address offsets for COFF adds 5c9eed741dbd [libc++] Make __dir_stream visibility declaration consistent adds 87599bdabbd1 [RISCV] Store/restore RISCVMachineFunctionInfo into MIR YAML file adds b6e91d4a331e [RISCV] Pre-commit for fixing stack offset for RVV object adds d0f27fb44952 [RISCV] Fixing stack offset for RVV object with vararg in stack. adds 2c4d288eae8b [RISCV][NFC] Add missing lit.local.cfg in test/CodeGen/MIR/RISCV/ adds fe8a27acd716 [LV] Handle zero cost loops in selectInterleaveCount. adds 5ea5e3c01b7b [InstCombine] add tests for low-mask of ashr; NFC adds 43ee392dd462 [InstCombine] try to fold low-mask of ashr to lshr adds 8c3445ac1c8b [AArch64][LOH] Don't ignore regmasks in bundles by iterati [...] adds d800180f6bee [lld][COFF] Fix TypeServerSource lookup on GUID collisions adds e11b929a3c97 [LLD][COFF] Fix TypeServerSource matcher with more than on [...] adds 46d19f3a8699 [CMake] Use CMAKE_SYSROOT to build libs for Win to ARM cro [...] adds b6dbee34387d [CMake] Update cache file for Win to ARM cross tooolchain. NFC. adds 6c41c8edb0cc [CMake] Replace `TARGET_TRIPLE` with `TOOLCHAIN_TARGET_TRI [...] adds 3400d0293a14 [CMake] Update cache file for Win to ARM Linux cross toolc [...]

No new revisions were added by this update.

Summary of changes: clang/cmake/caches/CrossWinToARMLinux.cmake | 175 ++-- libcxx/include/__filesystem/directory_entry.h | 2 +- lld/COFF/DebugTypes.cpp | 13 +- .../pdb-type-server-guid-collision-a-pdb.yaml | 1018 ++++++++++++++++++++ .../Inputs/pdb-type-server-guid-collision-a.yaml | 171 ++++ .../pdb-type-server-guid-collision-b-pdb.yaml | 1018 ++++++++++++++++++++ .../Inputs/pdb-type-server-guid-collision-b.yaml | 171 ++++ .../pdb-type-server-guid-collision-invalid.test | 26 + .../COFF/pdb-type-server-guid-collision-valid.test | 17 + llvm/lib/Target/AArch64/AArch64CollectLOH.cpp | 2 +- llvm/lib/Target/RISCV/CMakeLists.txt | 1 + llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 23 +- llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp | 30 + llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h | 25 + llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 23 + llvm/lib/Target/RISCV/RISCVTargetMachine.h | 8 + .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 6 + llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 22 +- llvm/test/CodeGen/AArch64/loh.mir | 9 + .../CostModel => CodeGen/MIR}/RISCV/lit.local.cfg | 0 .../CodeGen/MIR/RISCV/machine-function-info.mir | 138 +++ .../rvv/wrong-stack-offset-for-rvv-object.mir | 220 +++++ llvm/test/Transforms/InstCombine/and.ll | 90 +- ...-select-interleave-count-loop-with-cost-zero.ll | 50 + 24 files changed, 3147 insertions(+), 111 deletions(-) create mode 100644 lld/test/COFF/Inputs/pdb-type-server-guid-collision-a-pdb.yaml create mode 100644 lld/test/COFF/Inputs/pdb-type-server-guid-collision-a.yaml create mode 100644 lld/test/COFF/Inputs/pdb-type-server-guid-collision-b-pdb.yaml create mode 100644 lld/test/COFF/Inputs/pdb-type-server-guid-collision-b.yaml create mode 100644 lld/test/COFF/pdb-type-server-guid-collision-invalid.test create mode 100644 lld/test/COFF/pdb-type-server-guid-collision-valid.test create mode 100644 llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp copy llvm/test/{Analysis/CostModel => CodeGen/MIR}/RISCV/lit.local.cfg (100%) create mode 100644 llvm/test/CodeGen/MIR/RISCV/machine-function-info.mir create mode 100644 llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir create mode 100644 llvm/test/Transforms/LoopVectorize/X86/pr54413-select-interleav [...]