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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig in repository toolchain/ci/llvm-project.

from 17941437a2e [TargetLowering] Improve expansion of FSHL/FSHR adds bc2e572f51d Re-commit: [ARM] CMSE code generation adds 235fb7dc24b AMDGPU/OpenCL: Accept -nostdlib in place of -nogpulib adds 54a335a2f60 [COFF] Move type merging to TpiSource::mergeDebugT virtual method adds d2a26ad0dc2 hwasan: Collect ring buffer statistics and include in dev note. adds 10b49315faa [test] NFC, add missing declarations and include to test fi [...] adds acb6f1ae096 TargetLowering.cpp - remove non-constant EXTRACT_SUBVECTOR/ [...] adds 2b0b9b1148c [X86] Fix a regression caused by moving combineLoopMAddPatt [...] adds f5a79713b61 [LLD] Fix precomp-link.test adds 5ecb5141463 [Driver] Pass -plugin-opt=O2 for -Os -Oz and -plugin-opt=O1 [...] adds e29cae1e534 [lldb/Test] Skip TestExpressionInSyscall with reproducers adds e7c91e3124b [lldb/Test] Skip remaining 'side_effect' tests with reproducers. adds 426afd79da7 [mlir] Adopt changes in mlir-opt to standalone example adds 42a55605034 [AMDGPU] New SIInsertHardClauses pass adds 2fdeee9c828 [X86] Add support for forming vXi16 PMULH instructions from [...] adds 7b73e5e08d7 [gn build] Port 42a55605034 adds 3774bcf9f84 [COFF] Fix var names cVStrTab->cvStrTab sXDataChunks->sxDataChunks adds 77346daaa54 [StringSet] Simplify code a bit. NFC. adds 8f2cc889b05 [libcxx] [NFC] Add more reinterpret_pointer_cast tests. adds 6a3469f58d0 [ObjC] Add compatibility mode for type checking of qualifie [...] adds 44ecaabc072 [BitcodeReader] datalayout must be specified before it is queried. adds 920ff806d4e [SVE] Remove usages of VectorType::getNumElements() from SystemZ

No new revisions were added by this update.

Summary of changes: .../clang-tidy/checkers/darwin-avoid-spinlock.m | 4 + clang/include/clang/Basic/LangOptions.def | 3 + clang/include/clang/Driver/CC1Options.td | 3 + clang/lib/AST/ASTContext.cpp | 16 +- clang/lib/Driver/ToolChains/AMDGPU.cpp | 6 + clang/lib/Driver/ToolChains/CommonArgs.cpp | 10 +- clang/lib/Driver/ToolChains/Darwin.cpp | 4 + clang/lib/Frontend/CompilerInvocation.cpp | 3 + clang/test/Driver/darwin-objc-options.m | 6 + clang/test/Driver/lto.c | 21 + clang/test/Driver/rocm-detect.hip | 27 + clang/test/Driver/rocm-not-found.cl | 2 + clang/test/SemaObjC/block-type-safety.m | 22 + compiler-rt/lib/hwasan/hwasan_report.cpp | 48 +- .../Inputs/instrprof-gcov-__gcov_flush-multiple.c | 2 + .../instrprof-gcov-__gcov_flush-multiple.c.gcov | 34 +- compiler-rt/test/profile/instrprof-value-prof.c | 1 + .../reinterpret_pointer_cast.pass.cpp | 23 + lld/COFF/DebugTypes.cpp | 543 +++++--- lld/COFF/DebugTypes.h | 56 +- lld/COFF/Driver.cpp | 4 +- lld/COFF/Driver.h | 2 + lld/COFF/InputFiles.cpp | 104 +- lld/COFF/InputFiles.h | 32 +- lld/COFF/PDB.cpp | 534 ++----- lld/COFF/TypeMerger.h | 7 +- lld/test/COFF/precomp-link.test | 35 +- .../expr-in-syscall/TestExpressionInSyscall.py | 1 + .../TestBreakpointCommandsFromPython.py | 18 +- .../serialize/TestBreakpointSerialization.py | 14 +- llvm/include/llvm/ADT/StringSet.h | 4 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 29 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 189 ++- llvm/lib/Target/AMDGPU/AMDGPU.h | 3 + llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 2 + llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 3 + llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp | 200 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 10 + llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 772 ++++++++++ llvm/lib/Target/ARM/ARMFastISel.cpp | 12 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 84 +- llvm/lib/Target/ARM/ARMFrameLowering.h | 13 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 53 +- llvm/lib/Target/ARM/ARMISelLowering.h | 2 + llvm/lib/Target/ARM/ARMInstrInfo.td | 2 + llvm/lib/Target/ARM/ARMInstrThumb.td | 12 + llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp | 4 +- llvm/lib/Target/ARM/ARMMachineFunctionInfo.h | 10 + llvm/lib/Target/ARM/ARMRegisterInfo.td | 3 + llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 4 + .../Target/SystemZ/SystemZTargetTransformInfo.cpp | 25 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 74 +- llvm/lib/Target/X86/X86PartialReduction.cpp | 32 +- .../AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll | 18 + .../AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll | 10 + .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll | 1 + .../AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll | 1 + .../AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll | 1 + .../AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll | 1 + .../AMDGPU/atomic_optimizations_local_pointer.ll | 4 + llvm/test/CodeGen/AMDGPU/hard-clauses.mir | 178 +++ llvm/test/CodeGen/AMDGPU/idot2.ll | 19 + llvm/test/CodeGen/AMDGPU/idot4s.ll | 3 + llvm/test/CodeGen/AMDGPU/idot4u.ll | 4 + llvm/test/CodeGen/AMDGPU/idot8s.ll | 3 + llvm/test/CodeGen/AMDGPU/idot8u.ll | 4 + .../CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll | 6 + .../test/CodeGen/AMDGPU/shrink-add-sub-constant.ll | 2 + llvm/test/CodeGen/AMDGPU/smrd.ll | 2 + .../vgpr-descriptor-waterfall-loop-idom-update.ll | 1 + llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll | 20 +- llvm/test/CodeGen/ARM/cmse-clear-float-bigend.mir | 101 ++ llvm/test/CodeGen/ARM/cmse-clear-float-hard.ll | 811 +++++++++++ llvm/test/CodeGen/ARM/cmse-clear-float-hard2.ll | 144 ++ llvm/test/CodeGen/ARM/cmse-clear-float-mve.ll | 172 +++ llvm/test/CodeGen/ARM/cmse-clear-float.ll | 718 ++++++++++ llvm/test/CodeGen/ARM/cmse-clear.ll | 634 +++++++++ llvm/test/CodeGen/ARM/cmse-clrm-it-block.ll | 24 + llvm/test/CodeGen/ARM/cmse-expand-bxns-ret.mir | 26 + llvm/test/CodeGen/ARM/cmse.ll | 346 +++++ llvm/test/CodeGen/X86/madd.ll | 57 +- llvm/test/CodeGen/X86/pmulh.ll | 1468 +++++++------------- .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 1 + .../standalone/standalone-opt/standalone-opt.cpp | 2 +- 85 files changed, 6061 insertions(+), 1849 deletions(-) create mode 100644 clang/test/Driver/rocm-detect.hip create mode 100644 llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/hard-clauses.mir create mode 100644 llvm/test/CodeGen/ARM/cmse-clear-float-bigend.mir create mode 100644 llvm/test/CodeGen/ARM/cmse-clear-float-hard.ll create mode 100644 llvm/test/CodeGen/ARM/cmse-clear-float-hard2.ll create mode 100644 llvm/test/CodeGen/ARM/cmse-clear-float-mve.ll create mode 100644 llvm/test/CodeGen/ARM/cmse-clear-float.ll create mode 100644 llvm/test/CodeGen/ARM/cmse-clear.ll create mode 100644 llvm/test/CodeGen/ARM/cmse-clrm-it-block.ll create mode 100644 llvm/test/CodeGen/ARM/cmse-expand-bxns-ret.mir create mode 100644 llvm/test/CodeGen/ARM/cmse.ll