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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig in repository toolchain/ci/llvm-project.

from 6805a77eb66 [LLDB] Mark some xfails for arm-linux adds 67087a7b765 [LLDB] Fix typo in xfail decorator assert.test adds 272bc25bc14 [LoopReroll] Fix rerolling loop with use outside the loop adds 7d4167430c4 [gcov] Fix simultaneous .gcda creation/lock adds 085234bedc3 [cmake] Update creation of object library dependencies for [...] adds 782a4dd1a47 [PowerPC] Use add instead of addReg in ppc-early-ret pass adds d2a95698501 [mlir][Linalg] Allow reshapes to collapse to a zero-rank tensor. adds 5440d0a12d7 [mlir][Linalg] Add folders and canonicalizers for linalg.re [...] adds e9753822b5a [PowerPC] Respect SDNodeFlags in lowering SELECT_CC adds 49e6c191004 [mlir][StandardToLLVM] Add SinOp to LLVM dialect and loweri [...] adds 6bbad7285c4 [CostModel] Modify BasicTTI getCastInstrCost adds 8ffe8891cd5 [PowerPC] Exploit VSX neg, abs and nabs for f32 adds ad60ff70eb5 [NFC] Code cleanup in TargetInfo.cpp adds eef95f2746c [BrachProbablityInfo] Set edge probabilities at once. NFC. adds e59744fd9b4 [DebugInfo] Fortran module DebugInfo support in LLVM adds 678bd84c4df [DebugInfo] Fixes windows bot failure due to a test failure adds 524457edbc3 [mips] Fix typo in FileCheck directives - replace \0xa0 cha [...] adds cac6a26f381 [TableGen] Fix register class handling in TableGen's DAG IS [...] adds 2866c6cad47 [NFC] [PowerPC] Narrow fast-math flags in tests adds e25a2601aaa [libc++] [LWG3321] Mark "year_month_day_last::day() specifi [...] adds 855f0ce79bf [analyzer] Fix crash for non-pointers annotated as nonnull adds f8972662bc3 [examples] Skip building the Bye pass plugin on windows adds 1febe289827 [libcxx testing] Remove ALLOW_RETRIES from wait_for futures test adds e16111ce2fc [lldb] Also recognize DWARF UTF base types using their size adds 8cbd3f431a9 [analyzer] SATestBuild.py: Be defensive against corrupt pli [...] adds ab61fe41505 Revert "[libc++] [LWG3321] Mark "year_month_day_last::day() [...] adds 18a5428e602 [AMDGPU][MC][GFX9+] Enabled clamp for v_add_i32 and v_sub_i32 adds e072b20bdea [lldb] Merge PlatformXXX::ResolveExecutable adds 881c3bb6a73 [mlir] Adapted standard Alloc and Alloca ops to use new sid [...] adds f61f6ffe112 [compiler-rt] [builtin] Switch the return type of __atomic_ [...] adds 897d8ee5cd6 [StructurizeCFG] Fix region nodes ordering adds 9529597cf45 Recommit #2: "[LV] Induction Variable does not remain scala [...] adds 410644fbf76 Clang crash targeting ARM or Thumb when assembling a prel31 [...] adds 1b140a87a58 [MLIR] Nested regions test for Buffer Assginment adds 2668775f666 [LSR][ARM] Add new TTI hook to mark some LSR chains as profitable adds 6d2599e4f77 [libcxx][span] Implement P1976R2 adds 2fe6672498d [lldb][NFC] Don't specify a default argument when creating [...] adds 87c56594dd9 [ARM] Sink splats to fma intrinsics new 195de442dab [AMDGPU] Strengthen export cluster ordering new e0b99a5de4c [mlir] Add SubViewOp::getOrCreateRanges and fix folding pattern new a5d80818fa7 [mlir] [VectorOps] Add missing EDSC intrinsics. new fa15255d8af [ARM] Convert floating point splats to integer new a520c89a476 [DebugInfo] Fix test Fortran-DIModule.ll after 678bd84c4 new 4b53495c4ba Perform ActOnConversionDeclarator after looking for any vir [...] new 53cc90f7899 Make FormatToken::Type private. new 5f7a5e3bdba [lldb][NFC] Early-exit in SetupDeclVendor new 1370757dd01 Revert "[BrachProbablityInfo] Set edge probabilities at onc [...] new a1fd188223d [FileCheck] Support comment directives new cf2fb139321 Add -print-targets to print the registered targets

The 11 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: clang/docs/ReleaseNotes.rst | 1 + clang/include/clang/Driver/Options.td | 2 + clang/lib/CodeGen/TargetInfo.cpp | 4 +- clang/lib/Driver/Driver.cpp | 5 + clang/lib/Format/Format.cpp | 2 +- clang/lib/Format/FormatToken.cpp | 4 +- clang/lib/Format/FormatToken.h | 9 +- clang/lib/Format/FormatTokenLexer.cpp | 44 +- clang/lib/Format/TokenAnnotator.cpp | 266 +-- clang/lib/Format/UnwrappedLineParser.cpp | 34 +- clang/lib/Sema/SemaDecl.cpp | 6 +- clang/lib/Sema/SemaDeclCXX.cpp | 5 +- .../Checkers/NonNullParamChecker.cpp | 8 +- clang/test/Analysis/UserNullabilityAnnotations.m | 13 + clang/test/CodeGen/default-address-space.c | 10 +- clang/test/CodeGenOpenCL/addr-space-struct-arg.cl | 10 +- clang/test/Driver/hip-device-libs.hip | 42 +- clang/test/SemaCXX/conversion-function.cpp | 18 + clang/utils/analyzer/SATestBuild.py | 13 +- compiler-rt/lib/builtins/atomic.c | 9 +- compiler-rt/lib/profile/GCDAProfiling.c | 23 +- .../profile/Posix/instrprof-gcov-parallel.test | 2 - libcxx/docs/FeatureTestMacroTable.rst | 2 + libcxx/include/span | 50 +- libcxx/include/version | 4 +- .../std/containers/views/span.cons/assign.pass.cpp | 33 +- .../containers/views/span.cons/container.fail.cpp | 14 +- .../containers/views/span.cons/container.pass.cpp | 33 +- .../containers/views/span.cons/ptr_len.fail.cpp | 10 + .../containers/views/span.cons/ptr_ptr.fail.cpp | 10 + .../std/containers/views/span.cons/span.fail.cpp | 10 + .../support.limits.general/span.version.pass.cpp | 52 + .../version.version.pass.cpp | 20 + .../futures.shared_future/wait_for.pass.cpp | 158 +- .../generate_feature_test_macro_components.py | 6 + lldb/include/lldb/Target/RemoteAwarePlatform.h | 4 + .../Clang/ClangExpressionParser.cpp | 3 +- .../ExpressionParser/Clang/ClangUserExpression.cpp | 52 +- .../Plugins/Platform/POSIX/PlatformPOSIX.cpp | 143 -- lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.h | 4 - .../Plugins/Platform/Windows/PlatformWindows.cpp | 105 -- .../Plugins/Platform/Windows/PlatformWindows.h | 5 - .../Plugins/TypeSystem/Clang/TypeSystemClang.cpp | 25 +- lldb/source/Target/RemoteAwarePlatform.cpp | 146 ++ lldb/test/Shell/Recognizer/assert.test | 2 +- .../DWARF/DW_TAG_basic_type_DW_ATE_UTF_nonC.ll | 82 + llvm/cmake/modules/AddLLVM.cmake | 3 +- llvm/docs/CommandGuide/FileCheck.rst | 73 +- llvm/examples/Bye/CMakeLists.txt | 22 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 7 + .../llvm/Analysis/TargetTransformInfoImpl.h | 9 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 19 +- llvm/include/llvm/CodeGen/TargetLowering.h | 9 + llvm/include/llvm/IR/DIBuilder.h | 9 +- llvm/include/llvm/IR/DebugInfoMetadata.h | 72 +- llvm/include/llvm/Support/FileCheck.h | 2 + llvm/lib/Analysis/TargetTransformInfo.cpp | 4 + llvm/lib/AsmParser/LLParser.cpp | 15 +- llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 14 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 1 + llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 5 + llvm/lib/CodeGen/CodeGenPrepare.cpp | 56 +- llvm/lib/IR/AsmWriter.cpp | 2 + llvm/lib/IR/DIBuilder.cpp | 8 +- llvm/lib/IR/DebugInfoMetadata.cpp | 18 +- llvm/lib/IR/LLVMContextImpl.h | 19 +- llvm/lib/Support/FileCheck.cpp | 89 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp | 50 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 4 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 78 +- llvm/lib/Target/ARM/ARMISelLowering.h | 1 + llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 18 + llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 2 + .../Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp | 30 +- llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp | 6 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 10 +- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 18 + llvm/lib/Transforms/Scalar/LoopRerollPass.cpp | 6 + llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 16 +- llvm/lib/Transforms/Scalar/StructurizeCFG.cpp | 136 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 14 +- llvm/test/Analysis/CostModel/AArch64/cast.ll | 10 +- llvm/test/Analysis/CostModel/ARM/cast.ll | 58 +- .../CostModel/X86/masked-intrinsic-cost.ll | 2 +- llvm/test/Assembler/dimodule.ll | 4 +- .../Assembler/drop-debug-info-nonzero-alloca.ll | 10 +- llvm/test/Bitcode/DIModule-clang-module.ll | 22 + llvm/test/Bitcode/DIModule-clang-module.ll.bc | Bin 0 -> 1580 bytes llvm/test/Bitcode/DIModule-fortran-module.ll | 34 + llvm/test/Bitcode/DIModule-fortran-module.ll.bc | Bin 0 -> 1948 bytes llvm/test/CMakeLists.txt | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll | 21 + llvm/test/CodeGen/PowerPC/combine-fneg.ll | 4 +- llvm/test/CodeGen/PowerPC/early-ret-verify.mir | 4 +- llvm/test/CodeGen/PowerPC/early-ret.mir | 14 +- llvm/test/CodeGen/PowerPC/fdiv.ll | 2 +- llvm/test/CodeGen/PowerPC/float-logic-ops.ll | 6 +- llvm/test/CodeGen/PowerPC/fma-assoc.ll | 8 +- llvm/test/CodeGen/PowerPC/fma-combine.ll | 24 +- llvm/test/CodeGen/PowerPC/fma-mutate.ll | 2 +- llvm/test/CodeGen/PowerPC/fma-negate.ll | 40 +- llvm/test/CodeGen/PowerPC/fma-precision.ll | 68 +- llvm/test/CodeGen/PowerPC/fma.ll | 6 + llvm/test/CodeGen/PowerPC/fmf-propagation.ll | 46 +- llvm/test/CodeGen/PowerPC/fsub-fneg.ll | 6 +- llvm/test/CodeGen/PowerPC/load-two-flts.ll | 24 +- llvm/test/CodeGen/PowerPC/pow.75.ll | 24 +- llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll | 20 +- llvm/test/CodeGen/PowerPC/qpx-recipest.ll | 28 +- llvm/test/CodeGen/PowerPC/recipest.ll | 46 +- llvm/test/CodeGen/PowerPC/repeated-fp-divisors.ll | 4 +- llvm/test/CodeGen/PowerPC/scalar-equal.ll | 42 +- llvm/test/CodeGen/PowerPC/scalar-min-max.ll | 32 +- llvm/test/CodeGen/PowerPC/scalar_cmp.ll | 244 +-- llvm/test/CodeGen/PowerPC/vec-min-max.ll | 8 +- .../CodeGen/PowerPC/vsx-fma-mutate-trivial-copy.ll | 6 +- llvm/test/CodeGen/PowerPC/vsx-recip-est.ll | 8 +- .../LowOverheadLoops/lsr-profitable-chain.ll | 69 + llvm/test/CodeGen/Thumb2/mve-float16regloops.ll | 184 +- llvm/test/CodeGen/Thumb2/mve-float32regloops.ll | 139 +- llvm/test/CodeGen/Thumb2/mve-fma-loops.ll | 49 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/dup.ll | 4 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/ternary.ll | 8 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vaddq.ll | 4 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vmulq.ll | 2 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vsubq.ll | 4 +- llvm/test/CodeGen/Thumb2/mve-postinc-lsr.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-pred-threshold.ll | 50 +- llvm/test/CodeGen/Thumb2/mve-vldst4.ll | 310 ++-- llvm/test/DebugInfo/X86/Fortran-DIModule.ll | 44 + llvm/test/Feature/load_extension.ll | 1 + llvm/test/FileCheck/comment/after-words.txt | 16 + llvm/test/FileCheck/comment/bad-comment-prefix.txt | 48 + llvm/test/FileCheck/comment/blank-comments.txt | 9 + llvm/test/FileCheck/comment/suffixes.txt | 22 + llvm/test/FileCheck/comment/suppresses-checks.txt | 33 + .../FileCheck/comment/unused-check-prefixes.txt | 8 + .../FileCheck/comment/unused-comment-prefixes.txt | 16 + llvm/test/FileCheck/comment/within-checks.txt | 8 + llvm/test/FileCheck/first-character-match.txt | 2 +- llvm/test/FileCheck/validate-check-prefix.txt | 2 +- llvm/test/MC/AMDGPU/gfx10_asm_all.s | 6 + llvm/test/MC/AMDGPU/vop3-gfx9.s | 16 + llvm/test/MC/ARM/error-location.s | 18 + .../test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt | 6 + llvm/test/MC/Disassembler/AMDGPU/vop3_gfx9.txt | 5 + llvm/test/MC/Mips/micromips-jump-pc-region.s | 2 +- llvm/test/MC/Mips/mips-jump-pc-region.s | 4 +- llvm/test/TableGen/dag-isel-regclass-emit-enum.td | 39 + llvm/test/Transforms/LoopReroll/external_use.ll | 60 + .../LoopStrengthReduce/ARM/vctp-chains.ll | 257 +++ .../extractvalue-no-scalarization-required.ll | 6 - .../Transforms/LoopVectorize/AArch64/pr36032.ll | 6 - llvm/test/Transforms/LoopVectorize/ARM/sphinx.ll | 3 - ...idate-cm-after-invalidating-interleavegroups.ll | 3 +- .../LoopVectorize/PowerPC/vectorize-bswap.ll | 3 - .../SystemZ/predicated-first-order-recurrence.ll | 7 +- .../Transforms/LoopVectorize/X86/constant-fold.ll | 19 + .../LoopVectorize/X86/imprecise-through-phis.ll | 3 - .../LoopVectorize/X86/load-deref-pred.ll | 686 ++++--- .../LoopVectorize/X86/masked_load_store.ll | 597 +++--- .../LoopVectorize/X86/metadata-enable.ll | 486 +++-- llvm/test/Transforms/LoopVectorize/X86/optsize.ll | 156 +- llvm/test/Transforms/LoopVectorize/X86/pr35432.ll | 20 +- llvm/test/Transforms/LoopVectorize/X86/pr36524.ll | 3 - .../Transforms/LoopVectorize/X86/small-size.ll | 376 +++- .../LoopVectorize/X86/strided_load_cost.ll | 3 - .../LoopVectorize/X86/vect.omp.force.small-tc.ll | 30 +- .../X86/x86-interleaved-accesses-masked-group.ll | 1921 ++++++++++++++++++-- .../Transforms/LoopVectorize/fcmp-vectorize.ll | 2 - .../first-order-recurrence-complex.ll | 18 +- .../LoopVectorize/float-minmax-instruction-flag.ll | 3 - .../Transforms/LoopVectorize/if-pred-stores.ll | 27 +- llvm/test/Transforms/LoopVectorize/if-reduction.ll | 4 +- .../multiple-strides-vectorization.ll | 94 +- llvm/test/Transforms/LoopVectorize/pr35773.ll | 3 - .../LoopVectorize/pr44488-predication.ll | 75 +- .../runtime-check-needed-but-empty.ll | 6 - .../LoopVectorize/vector-intrinsic-call-cost.ll | 3 - .../Transforms/SLPVectorizer/X86/load-merge.ll | 14 +- .../StructurizeCFG/interleaved-loop-order.ll | 262 +++ llvm/unittests/IR/MetadataTest.cpp | 35 +- llvm/utils/FileCheck/FileCheck.cpp | 13 + llvm/utils/TableGen/DAGISelMatcherGen.cpp | 16 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 1 + mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 25 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 27 +- mlir/include/mlir/Dialect/Vector/EDSC/Intrinsics.h | 3 + .../mlir/Interfaces/SideEffectInterfaces.td | 3 + mlir/include/mlir/Interfaces/SideEffects.h | 7 + .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 2 + mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 131 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 7 +- mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp | 4 +- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 116 +- .../StandardToLLVM/standard-to-llvm.mlir | 10 + mlir/test/Dialect/LLVMIR/roundtrip.mlir | 3 + mlir/test/Dialect/Linalg/canonicalize.mlir | 156 +- mlir/test/Dialect/Linalg/llvm.mlir | 145 +- mlir/test/Dialect/Linalg/roundtrip.mlir | 23 + .../transform-patterns-matmul-to-vector.mlir | 6 +- mlir/test/Transforms/buffer-placement.mlir | 49 +- mlir/test/Transforms/canonicalize.mlir | 16 + 203 files changed, 7169 insertions(+), 3184 deletions(-) create mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] create mode 100644 lldb/test/Shell/SymbolFile/DWARF/DW_TAG_basic_type_DW_ATE_UTF_nonC.ll create mode 100644 llvm/test/Bitcode/DIModule-clang-module.ll create mode 100644 llvm/test/Bitcode/DIModule-clang-module.ll.bc create mode 100644 llvm/test/Bitcode/DIModule-fortran-module.ll create mode 100644 llvm/test/Bitcode/DIModule-fortran-module.ll.bc create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/lsr-profitable-chain.ll create mode 100644 llvm/test/DebugInfo/X86/Fortran-DIModule.ll create mode 100644 llvm/test/FileCheck/comment/after-words.txt create mode 100644 llvm/test/FileCheck/comment/bad-comment-prefix.txt create mode 100644 llvm/test/FileCheck/comment/blank-comments.txt create mode 100644 llvm/test/FileCheck/comment/suffixes.txt create mode 100644 llvm/test/FileCheck/comment/suppresses-checks.txt create mode 100644 llvm/test/FileCheck/comment/unused-check-prefixes.txt create mode 100644 llvm/test/FileCheck/comment/unused-comment-prefixes.txt create mode 100644 llvm/test/FileCheck/comment/within-checks.txt create mode 100644 llvm/test/TableGen/dag-isel-regclass-emit-enum.td create mode 100644 llvm/test/Transforms/LoopReroll/external_use.ll create mode 100644 llvm/test/Transforms/LoopStrengthReduce/ARM/vctp-chains.ll create mode 100644 llvm/test/Transforms/StructurizeCFG/interleaved-loop-order.ll