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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/llvm-project.
from 9e94ef42bab [DAGCombiner] Add node to the worklist in topological order [...] adds af6043557dd [DAG][X86] Convert isNegatibleForFree/GetNegatedExpression [...] adds efb9e45d6bc Revert r372325 - Reverting r372323 because it broke color t [...] adds 7decdbf2db8 X86: Add missing test for vshli SimplifyDemandedBitsForTargetNode adds 7cb60fb00f5 Make appendCallNB lambda mutable adds e0900f285bb [MCA] Improved cost computation for loop carried dependenci [...] adds 3ecab8e4555 Reapply r372285 "GlobalISel: Don't materialize immarg argum [...] adds 13e71ce6931 [Float2Int] avoid crashing on unreachable code (PR38502) adds e2f9bc3b11b [AMDGPU] Unnecessary -amdgpu-scalarize-global-loads=false f [...] adds 7a67ed57952 [InstCombine] Simplify @llvm.usub.with.overflow+non-zero ch [...] adds cb032aa2c77 [SVFS] Vector Function ABI demangling. adds aa6ef2eeacc gn build: Merge r372343 adds ca4c5deae5d [NFC][PowerPC] Fast-isel VSX support test adds d89f2d872df [Analysis] Allow -scalar-evolution-max-iterations more than once adds e6b2164723b Don't use invalidated iterators in FlattenCFGPass adds f1b6bd403d5 [lsan] Fix deadlock in dl_iterate_phdr. adds 1796aad50ca llvm-reduce: Follow-up to 372280, now with more-better msan fixing adds d487d6401d9 [AMDGPU] fixed underflow in getOccupancyWithNumVGPRs adds f5fcf615665 Don't false-positive match against binary path. adds 75fbb171c30 [ObjC][ARC] Skip debug instructions when computing the inse [...] adds 08f938bd1ae Revert "[CUDA][HIP] Fix typo in `BestViableFunction`" adds b8fc6a91164 [CUDA][HIP] Re-apply part of r372318. adds a4da991e4a4 [AArch64] Fix formatting (NFC) adds 0c3d4cfbade [WebAssembly][NFC] Remove unnecessary braces adds 40c3d6e3359 Model converted constant expressions as full-expressions. adds ccf8d5b8292 Fix for stringized function-macro args continued across lines adds 9dd57df26ab [Consumed] Treat by-value class arguments as consuming by d [...] adds dd74f4839b1 MachineScheduler: Fix missing dependency with multiple subreg defs adds 466fb68fce1 [NFCI] Always initialize const members of AttributeCommonInfo adds 627868ab7c3 Revert "Fix swig python package path" adds 081cb7ef237 [X86] Remove the special isBuildVectorOfConstantSDNodes han [...] adds 52621307bca Use getTargetConstant for BLENDI, and add a test to catch it. adds 8c77674e0f4 llvm-undname: Delete an empty, unused method. adds 4aef105b430 Finish building the full-expression for a static_assert exp [...] adds a5db9ee71f8 [Object] Uncapitalize an error message adds c768ad94b7f [llvm-ar] Removes repetition in the error message adds a34f13f2bab [X86] Use timm in MMX pinsrw/pextrw isel patterns. Add miss [...] adds e03663fbb84 [llvm-readobj] flush output before crash adds 621c93ec1fd [X86] Convert tbm_bextri_u32/tbm_bextri_u64 intrinsics Targ [...] adds 25040f8dec2 Reapply [llvm-ar] Include a line number when failing to par [...] adds 8f21b535472 [CallSiteSplitting] Remove unused includes (NFC). adds 15e27b0b6d9 [MachinePipeliner] Improve the TargetInstrInfo API analyzeL [...] adds 4d69967f441 [yaml2obj/obj2yaml] - Do not trigger llvm_unreachable when [...] adds 9120829063d [llvm-dwarfdump] Adjust Windows path to be acceptable by JSON adds 0ecf34dde39 [NFC] Test commit, deleting some whitespace adds 22a8f35ce0e [IntrinsicEmitter] Add overloaded types for SVE intrinsics [...] adds 73351971479 [lldb][NFC] Remove unused include in TestLineEntry.cpp adds 03475adcf72 Revert r372366 "Use getTargetConstant for BLENDI, and add a [...] adds 169cb63478a [AMDGPU] Use std::make_tuple to make some toolchains happy again new 6192ad26223 Move decl completion out of the ASTImporterDelegate and doc [...] new 8599ffa4b1c [StaticAnalyzer] Use llvm::StringLiteral instead of StringR [...] new 81aa62addf7 [SystemZ] Add SystemZ as supporting target in help text fo [...] new 4a13c828f6d [clang-tidy] Fix relative path in header-filter. new 2a47c77e720 [FastISel] Fix insertion of unconditional branches during FastISel new 6c127cdb99f [Alignment][NFC] migrate DataLayout internal struct to llvm::Align new 2d0cd6cac84 [RISCV] Fix static analysis issues
The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 4 +- .../Inputs/file-filter/subfolder_a/header_a.h | 3 + .../Inputs/file-filter/subfolder_b/header_b.h | 1 + .../Inputs/file-filter/subfolder_c/header_c.h | 1 + clang-tools-extra/test/clang-tidy/file-filter.cpp | 81 ++- clang/docs/ClangCommandLineReference.rst | 2 +- clang/include/clang/AST/TextNodeDumper.h | 2 - clang/include/clang/Basic/AttributeCommonInfo.h | 4 +- clang/include/clang/Driver/Options.td | 2 +- .../clang/StaticAnalyzer/Core/AnalyzerOptions.h | 13 +- clang/lib/AST/TextNodeDumper.cpp | 3 +- clang/lib/Analysis/Consumed.cpp | 6 +- .../Lex/DependencyDirectivesSourceMinimizer.cpp | 7 +- clang/lib/Parse/ParseDecl.cpp | 4 +- clang/lib/Sema/SemaDeclCXX.cpp | 27 +- clang/lib/Sema/SemaOverload.cpp | 44 +- clang/lib/Sema/SemaStmt.cpp | 71 +- clang/lib/Sema/SemaTemplate.cpp | 7 +- clang/test/AST/ast-dump-color.cpp | 4 +- clang/test/Index/Core/index-source.cpp | 4 +- clang/test/SemaCXX/warn-consumed-analysis.cpp | 27 + .../DependencyDirectivesSourceMinimizerTest.cpp | 26 +- compiler-rt/lib/lsan/lsan_common.cpp | 6 +- compiler-rt/lib/lsan/lsan_common.h | 5 +- compiler-rt/lib/lsan/lsan_common_linux.cpp | 12 +- compiler-rt/lib/lsan/lsan_common_mac.cpp | 6 +- .../test/lsan/TestCases/Linux/libdl_deadlock.cpp | 52 ++ lld/test/ELF/copy-rel-abs.s | 5 +- lld/wasm/Writer.cpp | 3 +- lldb/include/lldb/Symbol/ClangASTImporter.h | 54 +- lldb/scripts/CMakeLists.txt | 10 +- lldb/source/Symbol/ClangASTImporter.cpp | 202 +++--- lldb/unittests/Symbol/TestLineEntry.cpp | 1 - llvm/docs/Atomics.rst | 2 +- llvm/include/llvm/Analysis/VectorUtils.h | 111 +++ .../llvm/CodeGen/GlobalISel/InstructionSelector.h | 5 + .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 14 +- llvm/include/llvm/CodeGen/ModuloSchedule.h | 2 + llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h | 3 + llvm/include/llvm/CodeGen/TargetInstrInfo.h | 44 ++ llvm/include/llvm/CodeGen/TargetLowering.h | 12 + .../include/llvm/Demangle/MicrosoftDemangleNodes.h | 2 - llvm/include/llvm/ExecutionEngine/Orc/RPCUtils.h | 2 +- llvm/include/llvm/IR/BasicBlock.h | 5 + llvm/include/llvm/IR/DataLayout.h | 28 +- llvm/include/llvm/IR/DerivedTypes.h | 38 +- llvm/include/llvm/IR/Intrinsics.h | 9 +- llvm/include/llvm/IR/Intrinsics.td | 6 + llvm/include/llvm/Target/TargetSelectionDAG.td | 5 + .../llvm/Transforms/Scalar/CallSiteSplitting.h | 5 - llvm/include/llvm/Transforms/Scalar/Float2Int.h | 6 +- llvm/lib/Analysis/CMakeLists.txt | 1 + llvm/lib/Analysis/ScalarEvolution.cpp | 1 + llvm/lib/Analysis/VFABIDemangling.cpp | 418 +++++++++++ llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 27 +- llvm/lib/CodeGen/MachinePipeliner.cpp | 2 +- llvm/lib/CodeGen/ModuloSchedule.cpp | 40 +- llvm/lib/CodeGen/ScheduleDAGInstrs.cpp | 22 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 308 +------- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 8 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 18 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 240 +++++++ llvm/lib/CodeGen/TargetInstrInfo.cpp | 2 + llvm/lib/Demangle/MicrosoftDemangleNodes.cpp | 2 - llvm/lib/IR/BasicBlock.cpp | 7 + llvm/lib/IR/DataLayout.cpp | 106 +-- llvm/lib/IR/Function.cpp | 38 +- llvm/lib/Object/Archive.cpp | 2 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 3 +- llvm/lib/Target/AArch64/AArch64.td | 1 + llvm/lib/Target/AArch64/AArch64InstrFormats.td | 4 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 2 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 279 +++++++- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 7 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 60 ++ llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 5 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 399 ++++++++++- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 40 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 4 + llvm/lib/Target/AMDGPU/BUFInstructions.td | 110 +-- llvm/lib/Target/AMDGPU/DSInstructions.td | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 104 +-- llvm/lib/Target/AMDGPU/SIInstructions.td | 12 +- llvm/lib/Target/AMDGPU/SOPInstructions.td | 14 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 18 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 44 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 24 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 52 +- llvm/lib/Target/ARM/ARMInstrThumb2.td | 48 +- llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td | 696 +++++++++--------- llvm/lib/Target/Hexagon/HexagonDepOperands.td | 83 ++- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 152 ++-- llvm/lib/Target/Hexagon/HexagonInstrInfo.h | 19 +- llvm/lib/Target/Hexagon/HexagonIntrinsics.td | 46 +- llvm/lib/Target/Mips/MicroMipsDSPInstrInfo.td | 4 +- llvm/lib/Target/Mips/Mips64InstrInfo.td | 1 + llvm/lib/Target/Mips/MipsDSPInstrInfo.td | 19 +- llvm/lib/Target/Mips/MipsInstrInfo.td | 2 + llvm/lib/Target/Mips/MipsMSAInstrInfo.td | 55 +- llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 3 +- llvm/lib/Target/PowerPC/PPCInstrAltivec.td | 6 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 139 ++-- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 28 +- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 4 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 4 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 2 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 3 +- llvm/lib/Target/RISCV/RISCVInstrInfoA.td | 8 +- llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 49 +- llvm/lib/Target/SystemZ/SystemZInstrFormats.td | 166 ++--- llvm/lib/Target/SystemZ/SystemZInstrVector.td | 18 +- llvm/lib/Target/SystemZ/SystemZOperands.td | 121 ++-- llvm/lib/Target/SystemZ/SystemZOperators.td | 6 +- llvm/lib/Target/SystemZ/SystemZPatterns.td | 4 +- .../lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp | 8 +- .../WebAssembly/WebAssemblyInstrBulkMemory.td | 4 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 12 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 443 +++++++----- llvm/lib/Target/X86/X86ISelLowering.h | 11 + llvm/lib/Target/X86/X86InstrAVX512.td | 224 +++--- llvm/lib/Target/X86/X86InstrMMX.td | 14 +- llvm/lib/Target/X86/X86InstrSSE.td | 204 +++--- llvm/lib/Target/X86/X86InstrSystem.td | 2 +- llvm/lib/Target/X86/X86InstrTSX.td | 2 +- llvm/lib/Target/X86/X86InstrXOP.td | 16 +- llvm/lib/Target/X86/X86IntrinsicsInfo.h | 6 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 21 + llvm/lib/Transforms/ObjCARC/PtrState.cpp | 4 + llvm/lib/Transforms/Scalar/FlattenCFGPass.cpp | 24 +- llvm/lib/Transforms/Scalar/Float2Int.cpp | 47 +- .../ScalarEvolution/multiple-max-iterations.ll | 2 + .../AArch64/GlobalISel/arm64-irtranslator.ll | 3 +- .../AArch64/fast-isel-branch-uncond-debug.ll | 44 ++ .../AMDGPU/GlobalISel/inst-select-amdgcn.exp.mir | 12 +- .../GlobalISel/inst-select-amdgcn.s.sendmsg.mir | 3 +- .../GlobalISel/irtranslator-amdgcn-sendmsg.ll | 15 + .../AMDGPU/GlobalISel/irtranslator-amdgpu_ps.ll | 12 +- .../AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll | 9 +- .../irtranslator-struct-return-intrinsics.ll | 5 +- .../llvm.amdgcn.raw.buffer.store.format.f16.ll | 519 ++++++++++++++ .../llvm.amdgcn.raw.buffer.store.format.f32.ll | 314 ++++++++ .../GlobalISel/llvm.amdgcn.raw.buffer.store.ll | 791 +++++++++++++++++++++ .../AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll | 45 ++ .../AMDGPU/GlobalISel/regbankselect-amdgcn-exp.mir | 40 +- .../GlobalISel/regbankselect-amdgcn.ds.swizzle.mir | 21 + .../regbankselect-amdgcn.image.load.1d.ll | 181 +++++ .../regbankselect-amdgcn.image.sample.1d.ll | 268 +++++++ .../regbankselect-amdgcn.raw.buffer.load.ll | 173 +++++ .../regbankselect-amdgcn.struct.buffer.load.ll | 179 +++++ .../regbankselect-amdgcn.struct.buffer.store.ll | 174 +++++ .../AMDGPU/GlobalISel/regbankselect-smulh.mir | 62 +- .../AMDGPU/GlobalISel/regbankselect-umulh.mir | 62 +- llvm/test/CodeGen/AMDGPU/max.ll | 30 +- ...hed-assert-dead-def-subreg-use-other-subreg.mir | 70 ++ llvm/test/CodeGen/AMDGPU/sminmax.ll | 29 +- llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll | 18 +- .../subreg-undef-def-with-other-subreg-defs.mir | 86 +++ llvm/test/CodeGen/Hexagon/swp-epilog-phi7.ll | 4 +- llvm/test/CodeGen/PowerPC/fast-isel-call.ll | 6 +- llvm/test/CodeGen/PowerPC/fast-isel-const.ll | 2 +- llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll | 9 +- llvm/test/CodeGen/PowerPC/fast-isel-ret.ll | 6 +- llvm/test/CodeGen/X86/mmx-intrinsics.ll | 65 ++ llvm/test/CodeGen/X86/recip-fastmath.ll | 16 +- llvm/test/CodeGen/X86/recip-fastmath2.ll | 112 +-- .../CodeGen/X86/vshli-simplify-demanded-bits.ll | 58 ++ llvm/test/Object/mri2.test | 2 +- llvm/test/Object/mri3.test | 2 +- llvm/test/Object/mri4.test | 2 +- llvm/test/Other/opt-O2-pipeline.ll | 2 +- llvm/test/Other/opt-O3-pipeline.ll | 2 +- llvm/test/Other/opt-Os-pipeline.ll | 2 +- llvm/test/TableGen/immarg.td | 31 + llvm/test/Transforms/Float2Int/basic.ll | 22 + .../result-of-usub-is-non-zero-and-no-overflow.ll | 36 +- llvm/test/Transforms/ObjCARC/code-motion.ll | 39 + llvm/test/Transforms/Util/flattencfg.ll | 30 + llvm/test/tools/llvm-ar/invalid-object-file.test | 8 + llvm/test/tools/llvm-ar/mri-addlib.test | 4 +- llvm/test/tools/llvm-ar/mri-errors.test | 41 ++ .../X86/SkylakeClient/bottleneck-analysis.s | 12 +- .../obj2yaml/relocation-unsupported-machine.yaml | 38 + .../yaml2obj/relocation-unsupported-machine.yaml | 24 + llvm/tools/llvm-ar/llvm-ar.cpp | 22 +- llvm/tools/llvm-dwarfdump/Statistics.cpp | 11 +- llvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp | 40 +- llvm/tools/llvm-mca/Views/BottleneckAnalysis.h | 8 +- llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp | 4 +- .../tools/llvm-reduce/deltas/ReduceBasicBlocks.cpp | 2 +- llvm/tools/vfabi-demangle-fuzzer/CMakeLists.txt | 7 + .../vfabi-demangler-fuzzer.cpp | 26 + llvm/unittests/Analysis/CMakeLists.txt | 1 + llvm/unittests/Analysis/VectorFunctionABITest.cpp | 439 ++++++++++++ llvm/unittests/IR/BasicBlockTest.cpp | 3 + llvm/utils/TableGen/GlobalISelEmitter.cpp | 27 +- llvm/utils/TableGen/IntrinsicEmitter.cpp | 8 +- llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn | 1 + .../gn/secondary/llvm/unittests/Analysis/BUILD.gn | 1 + 200 files changed, 8092 insertions(+), 2412 deletions(-) create mode 100644 clang-tools-extra/test/clang-tidy/Inputs/file-filter/subfolder_ [...] create mode 100644 clang-tools-extra/test/clang-tidy/Inputs/file-filter/subfolder_ [...] create mode 100644 clang-tools-extra/test/clang-tidy/Inputs/file-filter/subfolder_ [...] create mode 100644 compiler-rt/test/lsan/TestCases/Linux/libdl_deadlock.cpp create mode 100644 llvm/lib/Analysis/VFABIDemangling.cpp create mode 100644 llvm/test/Analysis/ScalarEvolution/multiple-max-iterations.ll create mode 100644 llvm/test/CodeGen/AArch64/fast-isel-branch-uncond-debug.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.stor [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.stor [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.swi [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image. [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image. [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.bu [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct [...] create mode 100644 llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other [...] create mode 100644 llvm/test/CodeGen/AMDGPU/subreg-undef-def-with-other-subreg-defs.mir create mode 100644 llvm/test/CodeGen/X86/vshli-simplify-demanded-bits.ll create mode 100644 llvm/test/TableGen/immarg.td create mode 100644 llvm/test/Transforms/ObjCARC/code-motion.ll create mode 100644 llvm/test/tools/llvm-ar/invalid-object-file.test create mode 100644 llvm/test/tools/llvm-ar/mri-errors.test create mode 100644 llvm/test/tools/obj2yaml/relocation-unsupported-machine.yaml create mode 100644 llvm/test/tools/yaml2obj/relocation-unsupported-machine.yaml create mode 100644 llvm/tools/vfabi-demangle-fuzzer/CMakeLists.txt create mode 100644 llvm/tools/vfabi-demangle-fuzzer/vfabi-demangler-fuzzer.cpp create mode 100644 llvm/unittests/Analysis/VectorFunctionABITest.cpp