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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/llvm-project.

from 5fae613a4fd [LVI] Don't require DominatorTree in LVI (NFC) adds 018e5a96eeb [lldb/Properties] Move OSPluginReportsAllThreads from Targe [...] adds 0d736f467dd [SVE] Add specialized getters to derived vector types adds 59f49f7ee7f [IR] Simplify BasicBlock::removePredecessor. NFCI. adds 6d953693fe6 [PhaseOrdering] make different pass manager runs equivalent; NFC adds 348da7eec3e [PhaseOrdering] add tests for x86 horizontal math ops (PR41 [...] adds b2d733c3507 [llvm][docs] Add step by step git to GettingStarted adds 4eb6f4854eb [lld-macho][re-land] Support .subsections_via_symbols adds ce0d8beebcf [lld-macho][re-land] Support X86_64_RELOC_UNSIGNED adds 3181273be73 [WebAssembly] Implement i64x2.mul and remove i8x16.mul adds 8a43d41a407 [WebAssembly] Fix bug in custom shuffle combine adds 67ecd8cbf5f [PGOProfile] make test less brittle; NFC adds 2e6e27583ce [PowerPC][NFC] Cleanup load/store spilling code adds f8e833a5018 [gn build] Add a flag zlib_path to provide the path to zlib [...] adds e42e5e4d0fc [analyzer] Move apiModeling.StdCLibraryFunctionArgs to alpha. adds c7dddaa89ff [lldb/Reproducers] Update GDB remote client tests for passi [...] adds f8cccd126b4 [gn build] Try to unbreak Windows build after f8e833a501. adds 350dadaa8ab Give helpers internal linkage. NFC. adds 74ef6a11478 Fix X86_64 complex-returns for regcall. adds 5d2c3a0b8ce [AArch64] Disable MachineOutliner on Windows. adds 6d2b75e0887 [clang-misexpect] Fixed typo which causes that --pgo-warn-m [...] adds 1502941c1c0 [gn build] Try harder to unbreak Windows build after f8e833a501. adds 47650dcbeee Revert "[clang-misexpect] Fixed typo which causes that --pg [...] adds 21b0eff7738 [mlir][shape] Add `shape.from_extents`. adds d5b1643c74e [mlir][SPIRV] Fix blocks nested too deeply error. adds b54635e0ec3 [MLIR] LLVMMLIRTableGen -> MLIRTableGen adds 0368c1de9cd [MLIR][cmake][NFC] Check for incorrect usage of LLVM compon [...] adds 4dad4914f7d CodeGen: Use Register adds e6658079aca GlobalISel: Remove unused include adds b47d1baa535 [analyzer][NSOrCFError] Don't emit diagnostics under the na [...] adds cfba1a96681 [Hexagon] pX.new cannot be used with p3:0 as producer adds 61813b8069c AMDGPU: Use member initializers in MFI adds 074b802654f AMDGPU: Fix DAG divergence for implicit function arguments adds 66224d309d0 [analyzer][ObjCGenerics] Don't emit diagnostics under the n [...] adds 08ae945318f GlobalISel: Copy correct flags to select adds e89a08aefda [SVE] MOVPRFX zero merging test renaming adds 3d0d2fefc0a analyzer][CallAndMessage][NFC] Change old callbacks to rely [...] adds 21d2884a9c5 AMDGPU: Annotate functions that have stack objects adds f2be30def37 [analyzer][NFC] Merge checkNewAllocator's paramaters into C [...] adds 5811f3a9f8d [asan_symbolize] Fix bug handling C++ symbols when using Atos. adds 82dbf4aca84 [lldb/test] Move "DataFormatters/Mock.h" to "Plugins/Langua [...] adds a3609b0ec68 Add terminateCommands to lldb-vscode protocol adds fe1a3a7e8c8 [analyzer] Change the default output type to PD_TEXT_MINIMA [...] adds 392222dd726 [analyzer][NFC][MallocChecker] Convert many parameters into [...] adds c98648a1759 [NFC] Add _EnableIfLValueCallable and move reference ou [...] adds 21d4050e2c9 Mark shared_ptr::__create_with_control_block as noexcept. adds b8998ab9c26 [NFC] Remove non-rvlaue non-variadic allocator::construct o [...] adds ca5bff18fc6 [NFC] Remove non-rvlaue non-variadic allocator::construct o [...] adds 3a6ee4fefec [analyzer][StackAddressEscape] Tie warnings to the diagnost [...] adds fb8204b2103 [mlir][ods] Fix ops with both attribute-sized operands and results adds a45fb1942fc [mlir][Affine] Introduce affine memory interfaces new 92577e6a0f7 [mlir][vulkan-runner] Minor fix in timestamp flag for vulka [...] new 2b59e9f1bdd [DAGCombine] Remove the getNegatibleCost to avoid the out o [...] new b359bbaa8b4 [mlir][spirv] First step to support spirv cooperative matri [...] new da95a0d8cc2 [mlir] NFC - Appease gcc 5 new 77f05e5b531 AMDGPU/GlobalISel: Fix bug in test register bank new 78453e37054 Mark AffineMap::replaceDimsAndSymbols as const (NFC)

The 6 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: clang/include/clang/Basic/DiagnosticDriverKinds.td | 3 + .../clang/StaticAnalyzer/Checkers/Checkers.td | 18 +- .../clang/StaticAnalyzer/Core/AnalyzerOptions.h | 2 +- .../StaticAnalyzer/Core/BugReporter/BugType.h | 5 +- clang/include/clang/StaticAnalyzer/Core/Checker.h | 6 +- .../clang/StaticAnalyzer/Core/CheckerManager.h | 11 +- .../StaticAnalyzer/Core/PathSensitive/CallEvent.h | 7 + clang/lib/CodeGen/TargetInfo.cpp | 13 +- clang/lib/Headers/wasm_simd128.h | 5 - .../Checkers/AnalysisOrderChecker.cpp | 2 +- .../Checkers/CallAndMessageChecker.cpp | 142 ++++--- .../Checkers/DynamicTypePropagation.cpp | 7 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 416 ++++++++++++--------- .../lib/StaticAnalyzer/Checkers/NSErrorChecker.cpp | 16 +- .../Checkers/StackAddrEscapeChecker.cpp | 24 +- .../Checkers/StdLibraryFunctionsChecker.cpp | 15 - clang/lib/StaticAnalyzer/Core/CallEvent.cpp | 2 +- clang/lib/StaticAnalyzer/Core/CheckerManager.cpp | 31 +- clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp | 17 +- .../Core/ExprEngineCallAndReturn.cpp | 16 +- clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp | 28 +- clang/lib/StaticAnalyzer/Core/PlistDiagnostics.cpp | 17 +- clang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp | 7 +- .../StaticAnalyzer/Frontend/AnalysisConsumer.cpp | 1 + .../Inputs/expected-plists/generics.m.plist | 144 +++---- clang/test/Analysis/analyzer-enabled-checkers.c | 1 - clang/test/Analysis/incorrect-checker-names.cpp | 9 +- clang/test/Analysis/incorrect-checker-names.mm | 44 ++- clang/test/Analysis/output_types.cpp | 49 +++ .../std-c-library-functions-arg-constraints.c | 4 +- .../std-c-library-functions-arg-constraints.cpp | 2 +- clang/test/CodeGenCXX/regcall.cpp | 23 +- compiler-rt/lib/asan/scripts/asan_symbolize.py | 5 +- .../Darwin/asan-symbolize-templated-cxx.cpp | 62 +++ libcxx/include/functional | 12 +- libcxx/include/memory | 114 +----- lld/MachO/Arch/X86_64.cpp | 5 + lld/MachO/Driver.cpp | 11 +- lld/MachO/InputFiles.cpp | 216 +++++++---- lld/MachO/InputFiles.h | 18 +- lld/MachO/InputSection.cpp | 11 +- lld/MachO/InputSection.h | 9 +- lld/MachO/Target.h | 1 + lld/test/MachO/subsections-section-relocs.s | 47 +++ lld/test/MachO/subsections-symbol-relocs.s | 55 +++ lld/test/MachO/x86-64-reloc-unsigned.s | 24 ++ lldb/include/lldb/Target/Process.h | 9 +- lldb/include/lldb/Target/Target.h | 5 - .../test/tools/lldb-vscode/lldbvscode_testcase.py | 26 +- .../lldbsuite/test/tools/lldb-vscode/vscode.py | 44 ++- lldb/source/Plugins/Language/ObjC/Cocoa.cpp | 2 +- .../Plugins/Language/ObjC/Utilities.h} | 8 +- lldb/source/Target/Process.cpp | 54 ++- lldb/source/Target/Target.cpp | 36 +- lldb/source/Target/TargetProperties.td | 13 +- .../gdb_remote_client/TestGDBRemoteClient.py | 7 +- .../gdb_remote_client/TestGDBRemoteLoad.py | 2 + .../TestJLink6Armv7RegisterDefinition.py | 24 +- .../TestOSPluginStepping.py | 2 +- .../tools/lldb-vscode/attach/TestVSCode_attach.py | 43 ++- .../tools/lldb-vscode/launch/TestVSCode_launch.py | 41 +- lldb/tools/lldb-vscode/README.md | 8 +- lldb/tools/lldb-vscode/VSCode.cpp | 4 + lldb/tools/lldb-vscode/VSCode.h | 2 + lldb/tools/lldb-vscode/lldb-vscode.cpp | 4 +- lldb/tools/lldb-vscode/package.json | 7 +- lldb/unittests/DataFormatter/CMakeLists.txt | 1 - lldb/unittests/Language/CMakeLists.txt | 1 + lldb/unittests/Language/ObjC/CMakeLists.txt | 6 + .../ObjC/UtilitiesTests.cpp} | 13 +- llvm/docs/GettingStarted.rst | 18 + llvm/include/llvm/CodeGen/MachineFunction.h | 6 +- llvm/include/llvm/CodeGen/TargetLowering.h | 34 +- llvm/include/llvm/IR/BasicBlock.h | 8 +- llvm/include/llvm/IR/DerivedTypes.h | 60 +++ llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 7 +- llvm/lib/CodeGen/MachineFunction.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 325 ++++++++-------- llvm/lib/IR/BasicBlock.cpp | 69 ++-- llvm/lib/IR/Instructions.cpp | 8 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 4 + .../Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 11 + llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 10 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 14 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 7 +- llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp | 7 +- llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h | 12 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 31 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 22 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 6 +- .../Hexagon/MCTargetDesc/HexagonMCChecker.cpp | 2 +- llvm/lib/Target/Lanai/LanaiMachineFunctionInfo.cpp | 2 +- llvm/lib/Target/Lanai/LanaiMachineFunctionInfo.h | 12 +- llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.h | 6 +- llvm/lib/Target/Mips/MipsMachineFunction.cpp | 5 +- llvm/lib/Target/Mips/MipsMachineFunction.h | 6 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 34 +- llvm/lib/Target/PowerPC/PPCFrameLowering.h | 4 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 264 +++---------- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 71 +++- llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp | 8 +- llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h | 14 +- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 3 +- .../Target/SystemZ/SystemZMachineFunctionInfo.h | 16 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 12 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 8 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 76 +--- llvm/lib/Target/X86/X86ISelLowering.h | 18 +- llvm/lib/Target/X86/X86MachineFunctionInfo.h | 12 +- llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp | 2 + .../AArch64/GlobalISel/arm64-irtranslator.ll | 25 ++ .../CodeGen/AArch64/machine-outliner-calls.mir | 2 + .../AArch64/sve-intrinsics-fp-arith-merging.ll | 96 ++--- .../AArch64/sve-intrinsics-int-arith-merging.ll | 48 +-- .../AArch64/sve-intrinsics-shifts-merging.ll | 100 ++--- .../CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll | 27 ++ .../AMDGPU/GlobalISel/inst-select-pattern-xor3.mir | 59 ++- .../GlobalISel/inst-select-pattern-xor3.xfail.mir | 22 -- llvm/test/CodeGen/AMDGPU/addrspacecast.ll | 25 ++ .../CodeGen/AMDGPU/annotate-kernel-features-hsa.ll | 28 ++ .../AMDGPU/callee-special-input-sgprs-fixed-abi.ll | 24 +- .../CodeGen/AMDGPU/callee-special-input-sgprs.ll | 37 +- .../CodeGen/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll | 33 +- llvm/test/CodeGen/WebAssembly/simd-arith.ll | 14 +- .../CodeGen/WebAssembly/simd-shuffle-bitcast.ll | 11 + llvm/test/CodeGen/WebAssembly/simd-unsupported.ll | 3 +- llvm/test/CodeGen/X86/neg_fp.ll | 27 ++ llvm/test/MC/Hexagon/c4_newval.s | 19 + llvm/test/MC/Hexagon/multiple-pc4.s | 17 + llvm/test/MC/WebAssembly/simd-encodings.s | 6 +- .../Transforms/PGOProfile/cspgo_profile_summary.ll | 4 +- llvm/test/Transforms/PhaseOrdering/X86/addsub.ll | 5 +- .../Transforms/PhaseOrdering/X86/horiz-math.ll | 169 +++++++++ llvm/utils/gn/build/libs/zlib/BUILD.gn | 9 +- llvm/utils/gn/build/libs/zlib/enable.gni | 9 +- mlir/cmake/modules/AddMLIR.cmake | 12 + .../Dialect/Affine/IR/AffineMemoryOpInterfaces.h | 24 ++ .../Dialect/Affine/IR/AffineMemoryOpInterfaces.td | 128 +++++++ mlir/include/mlir/Dialect/Affine/IR/AffineOps.h | 1 + mlir/include/mlir/Dialect/Affine/IR/AffineOps.td | 35 +- mlir/include/mlir/Dialect/Affine/IR/CMakeLists.txt | 8 + mlir/include/mlir/Dialect/SPIRV/ParserUtils.h | 41 ++ mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td | 12 +- .../Dialect/SPIRV/SPIRVCooperativeMatrixOps.td | 94 +++++ mlir/include/mlir/Dialect/SPIRV/SPIRVOps.td | 1 + mlir/include/mlir/Dialect/SPIRV/SPIRVTypes.h | 30 ++ mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td | 24 ++ mlir/include/mlir/IR/AffineMap.h | 2 +- mlir/lib/Analysis/AffineAnalysis.cpp | 16 +- mlir/lib/Analysis/Utils.cpp | 43 ++- mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp | 3 + .../Dialect/Affine/IR/AffineMemoryOpInterfaces.cpp | 18 + mlir/lib/Dialect/Affine/IR/AffineOps.cpp | 28 +- mlir/lib/Dialect/Affine/IR/CMakeLists.txt | 2 + mlir/lib/Dialect/SPIRV/SPIRVDialect.cpp | 45 ++- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 63 +++- mlir/lib/Dialect/SPIRV/SPIRVTypes.cpp | 76 ++++ .../Dialect/SPIRV/Serialization/Deserializer.cpp | 34 ++ .../lib/Dialect/SPIRV/Serialization/Serializer.cpp | 15 + mlir/lib/Dialect/Shape/IR/Shape.cpp | 22 ++ mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 2 + mlir/lib/Dialect/Vector/VectorOps.cpp | 2 +- mlir/lib/IR/AffineMap.cpp | 2 +- mlir/lib/TableGen/CMakeLists.txt | 4 +- mlir/lib/Transforms/LoopFusion.cpp | 74 ++-- .../SPIRV/Serialization/cooperative-matrix.mlir | 17 + mlir/test/Dialect/SPIRV/cooperative-matrix.mlir | 16 + mlir/test/Dialect/SPIRV/types.mlir | 20 + mlir/test/Dialect/Shape/canonicalize.mlir | 20 + mlir/test/lib/IR/TestMatchers.cpp | 3 +- mlir/test/lib/Transforms/TestLinalgTransforms.cpp | 4 +- mlir/test/lib/Transforms/TestMemRefBoundCheck.cpp | 5 +- mlir/tools/mlir-tblgen/CMakeLists.txt | 2 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 12 +- mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp | 9 +- mlir/tools/mlir-vulkan-runner/VulkanRuntime.cpp | 2 +- mlir/unittests/TableGen/CMakeLists.txt | 2 +- 177 files changed, 3241 insertions(+), 1828 deletions(-) create mode 100644 clang/test/Analysis/output_types.cpp create mode 100644 compiler-rt/test/asan/TestCases/Darwin/asan-symbolize-templated [...] create mode 100644 lld/test/MachO/subsections-section-relocs.s create mode 100644 lld/test/MachO/subsections-symbol-relocs.s create mode 100644 lld/test/MachO/x86-64-reloc-unsigned.s rename lldb/{include/lldb/DataFormatters/Mock.h => source/Plugins/Language/ObjC/Ut [...] create mode 100644 lldb/unittests/Language/ObjC/CMakeLists.txt rename lldb/unittests/{DataFormatter/MockTests.cpp => Language/ObjC/UtilitiesTests [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.xfail.mir create mode 100644 llvm/test/MC/Hexagon/c4_newval.s create mode 100644 llvm/test/MC/Hexagon/multiple-pc4.s create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/horiz-math.ll create mode 100644 mlir/include/mlir/Dialect/Affine/IR/AffineMemoryOpInterfaces.h create mode 100644 mlir/include/mlir/Dialect/Affine/IR/AffineMemoryOpInterfaces.td create mode 100644 mlir/include/mlir/Dialect/SPIRV/ParserUtils.h create mode 100644 mlir/include/mlir/Dialect/SPIRV/SPIRVCooperativeMatrixOps.td create mode 100644 mlir/lib/Dialect/Affine/IR/AffineMemoryOpInterfaces.cpp create mode 100644 mlir/test/Dialect/SPIRV/Serialization/cooperative-matrix.mlir create mode 100644 mlir/test/Dialect/SPIRV/cooperative-matrix.mlir