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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig in repository toolchain/ci/llvm-project.

from 364c595403c [SVE] Ignore scalable vectors in InterleavedLoadCombinePass adds 36cdc17f8cf [mlir][Vector] Make minor identity permutation map optional [...] adds 1870e787af9 [mlir][Vector] Add an optional "masked" boolean array attri [...] adds 681a161ff54 AMDGPU: Remove outdated comment adds 4c70074e543 AMDGPU/GlobalISel: Fix splitting wide VALU, non-vector loads adds d1866f89472 [MLIR] [Linalg] Add option to use the partial view after pr [...] adds a4cb9bec1ca [mlir] Support optional attributes in assembly formats adds 23dc948d362 [MLIR] Use `MLIR_INCLUDE_TESTS` to conditionally compile tests. adds 623b2542446 [Local] Do not ignore zexts in salvageDebugInfo, PR45923 adds 2084330e41d [lldb/Reproducers] Add skipIfReproducer to more tests adds 691980ebb47 [llvm][NFC] Fixed non-compliant style in InlineAdvisor.h adds 31ecef76275 [SystemZ] Don't create PERMUTE nodes with an undef operand. adds bdd8c111fc0 [IR] Revert r2694 in BasicBlock::removePredecessor adds a7cc275e7e8 Add verifier check that musttail and preallocated are not u [...] adds b7924d6525b [dsymutil] Make sure the --help output and man page are consistent adds 3c4ef745557 Fixed a typo in the comment for allocateBuffer() adds 736db2f7103 [Loads] Require Align in isSafeToLoadUnconditionally() (NFC) adds 63081dc6f64 LoadStoreVectorizer: Match nested adds to prove vectorizati [...] adds bf527a1dc41 AMDGPU/GlobalISel: Fix f64 G_FDIV lowering adds 715b7d8aa5d [mlir][vulkan-runner] Add back accidentially removed header [...] adds ef649e8fd5d Revert "[CUDA][HIP] Workaround for resolving host device fu [...] adds b27a538dda4 AMDGPU: Fix illegally constant folding from V_MOV_B32_sdwa adds cd12e79e6dd [x86] Propagate memory operands during ISel DAG postprocessing adds 3f5f8f39734 [compiler-rt][CMake] Fix PowerPC runtime build adds 47a0e9f49b9 [Sanitizers] Use getParamByValType() (NFC) adds b783f70a425 [lldb/DataFormatter] Check for overflow when finding NSDate epoch adds c9f63297e24 Fix several places that were calling verifyFunction or veri [...] adds d19265b31e6 [clangd] Avoid wasteful data structures in RefSlab::Builder adds 3e315697ac7 DAG: Use correct pointer size for llvm.ptrmask adds 50f3bb13297 [AMDGPU] Fixed selection error for 64 bit extract_subvector adds 9d7838d7816 [x86] add tests for disguised horizontal ops; NFC adds b95a542d6b6 [x86] add tests for heroic horizontal ops; NFC adds 17842025ed3 [GlobalISel] Add support for using vector values in memset [...] adds 01f9d8ce5c0 [llvm][SVE] IR intrinscs for matrix multiplication instructions. adds e2cc12e4128 [SveEmitter] Builtins for SVE matrix multiply `mmla`. adds b572d9b1a73 [llvm][sve] Intrinsics for SVE sudot and usdot instructions. adds ae989391723 GlobalISel: Fold G_MUL x, 0, and G_*DIV 0, x adds 9d69072fb80 [analyzer][NFC] Introduce CXXDeallocatorCall, deploy it in [...] adds a81f8fb78dc [gn build] Port 9d69072fb80 adds 682e739638a [LV] Fix FoldTail under user VF and UF adds 82904401e32 Map -O to -O1 instead of -O2 adds fff3a8464d4 [lldb/test] Relax NSDate mock test for non-Apple platforms adds b593bfd4d8e [clang][SveEmitter] SVE builtins for `svusdot` and `svsudot` ACLE. adds 665da596854 [AArch64][GlobalISel] Add legalizer & selector support for [...] adds e3e15836af7 [clangd] Tidy up SelectionTree dumps with newlines adds e3aa4cd9dbc [lldb/test] Disable NSDate format check under _WIN32 adds 47cc6db928d Re-land [Debug][CodeView] Emit fully qualified names for globals adds ddff9799d2d [BPF] Prevent disassembly segfault for NOP insn adds 4a69eda6f31 [PowerPC][MachineCombiner] add testcase for reassociating F [...] adds ddcb3cf213e [TargetInstrInfo] add override function setSpecialOperandAt [...] adds 9971839942f fix build failure due to commit rGddcb3cf213e8 adds 82093e8fb7d [lldb/Driver] Fix handling on positional arguments adds 8e8f1bd75a9 [BPF] Return fail if disassembled insn registers out of range adds 27b4e6931d0 [NFC] Replace MaybeAlign with Align in TargetTransformInfo. adds e7e84ff24a5 Add cet.h for writing CET-enabled assembly code adds a204f22b424 [gn build] Port e7e84ff24a5 adds a6be4d17e34 [PowerPC-QPX] adjust operands order of qpx fma instructions.

No new revisions were added by this update.

Summary of changes: clang-tools-extra/clangd/Selection.cpp | 23 +- clang-tools-extra/clangd/index/Ref.cpp | 40 ++- clang-tools-extra/clangd/index/Ref.h | 39 ++- clang-tools-extra/clangd/index/SymbolLocation.cpp | 16 +- clang-tools-extra/clangd/index/SymbolLocation.h | 17 +- clang-tools-extra/clangd/unittests/TweakTests.cpp | 9 + clang/include/clang/Basic/TargetBuiltins.h | 1 + clang/include/clang/Basic/arm_sve.td | 26 ++ clang/include/clang/Driver/Options.td | 2 +- clang/include/clang/Sema/Sema.h | 2 - .../StaticAnalyzer/Core/PathSensitive/CallEvent.h | 58 +++- clang/lib/CodeGen/CGBuiltin.cpp | 3 + clang/lib/Frontend/CompilerInvocation.cpp | 2 +- clang/lib/Headers/CMakeLists.txt | 1 + clang/lib/Headers/cet.h | 66 ++++ clang/lib/Sema/SemaCUDA.cpp | 14 - clang/lib/Sema/SemaOverload.cpp | 143 +++------ .../Checkers/DeleteWithNonVirtualDtorChecker.cpp | 2 + .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 46 +-- clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 4 +- clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp | 15 +- .../Core/ExprEngineCallAndReturn.cpp | 7 +- .../Analysis/cxx-dynamic-memory-analysis-order.cpp | 10 +- .../aarch64-sve-intrinsics/acle_sve_matmul_fp32.c | 18 ++ .../aarch64-sve-intrinsics/acle_sve_matmul_fp64.c | 18 ++ .../CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c | 32 ++ .../aarch64-sve-intrinsics/acle_sve_sudot.c | 54 ++++ .../aarch64-sve-intrinsics/acle_sve_usdot.c | 54 ++++ clang/test/CodeGen/asm-cet.S | 26 ++ .../CodeGen/builtins-systemz-zvector-constrained.c | 4 +- clang/test/CodeGen/builtins-systemz-zvector.c | 4 +- .../builtins-systemz-zvector2-constrained.c | 4 +- clang/test/CodeGen/builtins-systemz-zvector2.c | 4 +- .../builtins-systemz-zvector3-constrained.c | 4 +- clang/test/CodeGen/builtins-systemz-zvector3.c | 4 +- clang/test/CodeGen/fma-builtins-constrained.c | 8 +- clang/test/Driver/O.c | 2 +- clang/test/Driver/clang_f_opts.c | 4 +- clang/test/Driver/lto.c | 2 +- clang/test/SemaCUDA/function-overload.cu | 146 +-------- clang/unittests/StaticAnalyzer/CMakeLists.txt | 1 + clang/unittests/StaticAnalyzer/CallEventTest.cpp | 89 +++++ clang/utils/TableGen/SveEmitter.cpp | 15 +- compiler-rt/cmake/base-config-ix.cmake | 3 +- lldb/docs/man/lldb.rst | 13 +- lldb/include/lldb/DataFormatters/Mock.h | 26 ++ lldb/source/Plugins/Language/ObjC/Cocoa.cpp | 69 ++-- .../step_over_breakpoint/TestStepOverBreakpoint.py | 1 + .../deleted-executable/TestDeletedExecutable.py | 1 + .../functionalities/load_unload/TestLoadUnload.py | 1 + .../postmortem/elf-core/TestLinuxCore.py | 12 + .../postmortem/netbsd-core/TestNetBSDCore.py | 6 + lldb/test/Shell/Driver/TestNoUseColor.test | 2 +- lldb/test/Shell/Driver/TestPositionalArgs.test | 30 ++ lldb/test/Shell/SymbolFile/PDB/variables.test | 4 +- lldb/tools/driver/Driver.cpp | 20 +- lldb/unittests/DataFormatter/CMakeLists.txt | 1 + lldb/unittests/DataFormatter/MockTests.cpp | 46 +++ llvm/docs/CommandGuide/dsymutil.rst | 34 +- llvm/include/llvm/Analysis/InlineAdvisor.h | 6 +- llvm/include/llvm/Analysis/Loads.h | 4 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 30 +- .../llvm/Analysis/TargetTransformInfoImpl.h | 16 +- .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 3 + llvm/include/llvm/CodeGen/TargetInstrInfo.h | 2 + llvm/include/llvm/IR/IntrinsicsAArch64.td | 22 ++ llvm/include/llvm/Target/GlobalISel/Combine.td | 19 +- llvm/lib/Analysis/Loads.cpp | 21 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 17 +- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 63 ++-- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h | 4 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 14 +- llvm/lib/CodeGen/ScalarizeMaskedMemIntrin.cpp | 17 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 8 +- llvm/lib/CodeGen/WinEHPrepare.cpp | 4 +- llvm/lib/IR/BasicBlock.cpp | 18 +- llvm/lib/IR/Verifier.cpp | 3 + .../Target/AArch64/AArch64InstructionSelector.cpp | 2 + llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 2 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 16 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 26 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 8 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 15 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 7 - llvm/lib/Target/AMDGPU/VOP1Instructions.td | 11 +- llvm/lib/Target/BPF/BPFInstrInfo.td | 2 +- .../Target/BPF/Disassembler/BPFDisassembler.cpp | 8 + llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp | 3 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 8 + llvm/lib/Target/PowerPC/PPCInstrInfo.h | 2 + llvm/lib/Target/PowerPC/PPCInstrQPX.td | 24 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 3 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 2 + llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 3 +- llvm/lib/Transforms/IPO/Inliner.cpp | 6 +- .../Instrumentation/AddressSanitizer.cpp | 2 +- .../Transforms/Instrumentation/MemorySanitizer.cpp | 11 +- llvm/lib/Transforms/Scalar/SROA.cpp | 8 +- .../Transforms/Scalar/TailRecursionElimination.cpp | 2 +- llvm/lib/Transforms/Utils/Local.cpp | 9 +- .../Transforms/Vectorize/LoadStoreVectorizer.cpp | 70 +++- .../Vectorize/LoopVectorizationPlanner.h | 2 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 35 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 4 +- llvm/test/CodeGen/AArch64/GlobalISel/freeze.ll | 149 +++++++++ .../CodeGen/AArch64/GlobalISel/inline-memset.mir | 59 +++- .../CodeGen/AArch64/GlobalISel/legalize-freeze.mir | 70 ++++ .../GlobalISel/legalizer-info-validation.mir | 5 +- .../prelegalizercombiner-trivial-arith.mir | 126 ++++++++ .../CodeGen/AArch64/sve-intrinsics-matmul-fp32.ll | 13 + .../CodeGen/AArch64/sve-intrinsics-matmul-fp64.ll | 14 + .../CodeGen/AArch64/sve-intrinsics-matmul-int8.ll | 119 +++++++ .../CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir | 340 ++++++-------------- .../AMDGPU/GlobalISel/regbankselect-load.mir | 320 +++++++++++------- .../AMDGPU/atomic_optimizations_local_pointer.ll | 22 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 4 +- .../CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 30 ++ llvm/test/CodeGen/AMDGPU/extract-subvector.ll | 172 ++++++++-- llvm/test/CodeGen/AMDGPU/ptrmask.ll | 134 ++++++++ llvm/test/CodeGen/BPF/objdump_dis_all.ll | 26 ++ llvm/test/CodeGen/BPF/objdump_nop.ll | 19 ++ llvm/test/CodeGen/PowerPC/machine-combiner.ll | 110 +++++++ llvm/test/CodeGen/PowerPC/qpx-qvfmadd.ll | 16 +- llvm/test/CodeGen/SystemZ/vec-perm-14.ll | 27 ++ .../SystemZ/vector-constrained-fp-intrinsics.ll | 6 +- llvm/test/CodeGen/X86/haddsub-shuf.ll | 171 ++++++++++ llvm/test/CodeGen/X86/haddsub-undef.ll | 41 +++ .../X86/isel-postprocessing-test-fold-memop.ll | 14 + llvm/test/DebugInfo/COFF/global-constants.ll | 191 +++++------ llvm/test/DebugInfo/COFF/global_visibility.ll | 204 ++++++------ llvm/test/DebugInfo/COFF/globals.ll | 357 +++++++++++++++++---- llvm/test/DebugInfo/COFF/types-array-unsized.ll | 59 ++-- llvm/test/DebugInfo/COFF/udts-fixpoint.ll | 80 +++++ .../test/Transforms/InstCombine/cast-mul-select.ll | 6 +- .../X86/vectorize-i8-nested-add.ll | 165 ++++++++++ .../LoopVectorize/pr45679-fold-tail-by-masking.ll | 148 +++++++++ llvm/test/Verifier/preallocated-invalid.ll | 7 + llvm/test/tools/dsymutil/cmdline.test | 54 ++-- llvm/tools/dsymutil/Options.td | 3 +- llvm/tools/llvm-as-fuzzer/llvm-as-fuzzer.cpp | 3 +- llvm/tools/llvm-split/llvm-split.cpp | 6 +- llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn | 1 + .../clang/unittests/StaticAnalyzer/BUILD.gn | 1 + mlir/CMakeLists.txt | 11 +- .../mlir/Dialect/Linalg/Transforms/Transforms.h | 23 ++ mlir/include/mlir/Dialect/Vector/EDSC/Intrinsics.h | 3 + mlir/include/mlir/Dialect/Vector/VectorOps.h | 9 + mlir/include/mlir/Dialect/Vector/VectorOps.td | 141 +++++--- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 2 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 69 ++-- mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp | 65 ++-- .../Dialect/Affine/Transforms/SuperVectorize.cpp | 8 +- mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp | 30 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 169 ++++++++-- mlir/lib/Dialect/Vector/VectorTransforms.cpp | 10 +- .../AffineToStandard/lower-affine-to-vector.mlir | 18 +- .../Conversion/VectorToLLVM/vector-to-llvm.mlir | 18 ++ .../Conversion/VectorToLoops/vector-to-loops.mlir | 35 +- .../Affine/SuperVectorize/vectorize_1d.mlir | 47 ++- .../Affine/SuperVectorize/vectorize_2d.mlir | 20 +- .../Affine/SuperVectorize/vectorize_3d.mlir | 2 +- mlir/test/Dialect/Linalg/promote.mlir | 15 +- mlir/test/Dialect/Vector/invalid.mlir | 69 +++- mlir/test/Dialect/Vector/ops.mlir | 8 +- mlir/test/Dialect/Vector/vector-transforms.mlir | 32 +- mlir/test/lib/Dialect/Test/TestOps.td | 8 +- mlir/test/lib/Transforms/TestLinalgTransforms.cpp | 16 +- mlir/test/mlir-tblgen/op-format.mlir | 7 + mlir/tools/mlir-opt/CMakeLists.txt | 18 +- mlir/tools/mlir-opt/mlir-opt.cpp | 4 + mlir/tools/mlir-tblgen/OpFormatGen.cpp | 10 +- mlir/tools/mlir-vulkan-runner/CMakeLists.txt | 5 + 173 files changed, 4436 insertions(+), 1600 deletions(-) create mode 100644 clang/lib/Headers/cet.h create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c create mode 100644 clang/test/CodeGen/asm-cet.S create mode 100644 clang/unittests/StaticAnalyzer/CallEventTest.cpp create mode 100644 lldb/include/lldb/DataFormatters/Mock.h create mode 100644 lldb/test/Shell/Driver/TestPositionalArgs.test create mode 100644 lldb/unittests/DataFormatter/MockTests.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/freeze.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-fp32.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-fp64.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-int8.ll create mode 100644 llvm/test/CodeGen/AMDGPU/ptrmask.ll create mode 100644 llvm/test/CodeGen/BPF/objdump_dis_all.ll create mode 100644 llvm/test/CodeGen/BPF/objdump_nop.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-perm-14.ll create mode 100644 llvm/test/CodeGen/X86/isel-postprocessing-test-fold-memop.ll create mode 100644 llvm/test/DebugInfo/COFF/udts-fixpoint.ll create mode 100644 llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-neste [...] create mode 100644 llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll