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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_cross/gnu-master-arm-build_cross in repository toolchain/ci/gcc.

from a967a3efd39 tree-optimization/101445 - fix negative stride SLP vect with gaps adds f9c2ce1dae2 libstdc++: Add noexcept-specifier to basic_string_view(It, End) adds cc11b924bfe x86: Don't enable UINTR in 32-bit mode adds ab0a6b213ab Vect: Add support for dot-product where the sign for the mu [...] adds 752045ed1ee AArch64: Add support for sign differing dot-product usdot f [...] adds 6412c58c781 AArch32: Add support for sign differing dot-product usdot f [...] adds 1e0ab1c4ba6 middle-end: Add tests middle end generic tests for sign dif [...] adds c9165e2d58b AArch32: Correct sdot RTL on aarch32 adds 6d1cdb27828 AArch64: Correct dot-product auto-vect optab RTL adds 269ca408e28 Fortran - ICE in gfc_conv_expr_present initializing non-dum [...] adds a42f8120442 c++: constexpr array reference and value-initialization [PR101371] adds 398572c1544 Turn hybrid mode off, default to ranger-only mode for EVRP. adds 4940166a151 Vect: correct rebase issue adds b15e301748f c++: enable -fdelete-dead-exceptions by default adds 91bb571d200 vec: use auto_vec in a few more places adds bebd8e9da83 c++: CTAD and forwarding references [PR88252]

No new revisions were added by this update.

Summary of changes: gcc/c-family/c-opts.c | 4 + gcc/config/aarch64/aarch64-simd-builtins.def | 9 ++- gcc/config/aarch64/aarch64-simd.md | 64 ++++++--------- gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- gcc/config/aarch64/aarch64-sve.md | 2 +- gcc/config/aarch64/arm_neon.h | 12 +-- gcc/config/arm/neon.md | 20 +++-- gcc/config/i386/driver-i386.c | 25 ++++-- gcc/config/i386/i386-options.c | 1 + gcc/config/i386/i386.h | 7 +- gcc/cp/class.c | 4 +- gcc/cp/constexpr.c | 15 +++- gcc/cp/coroutines.cc | 2 +- gcc/cp/cp-gimplify.c | 3 +- gcc/cp/cp-tree.h | 6 -- gcc/cp/parser.c | 6 +- gcc/cp/pt.c | 90 ++++++++++++---------- gcc/cp/semantics.c | 3 +- gcc/doc/invoke.texi | 6 +- gcc/doc/md.texi | 52 +++++++++++-- gcc/doc/sourcebuild.texi | 9 +++ gcc/fortran/trans-expr.c | 5 +- gcc/optabs-tree.c | 7 +- gcc/optabs-tree.h | 3 +- gcc/optabs.c | 32 ++++++-- gcc/optabs.def | 1 + gcc/params.opt | 2 +- gcc/sel-sched-ir.h | 2 +- gcc/testsuite/g++.dg/cpp1y/constexpr-101371-2.C | 23 ++++++ gcc/testsuite/g++.dg/cpp1y/constexpr-101371.C | 29 +++++++ gcc/testsuite/g++.dg/cpp1z/class-deduction96.C | 34 ++++++++ gcc/testsuite/g++.dg/torture/pr100382.C | 1 + gcc/testsuite/gcc.dg/pr80776-1.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-reduc-dot-10.c | 13 ++++ gcc/testsuite/gcc.dg/vect/vect-reduc-dot-11.c | 13 ++++ gcc/testsuite/gcc.dg/vect/vect-reduc-dot-12.c | 13 ++++ gcc/testsuite/gcc.dg/vect/vect-reduc-dot-13.c | 13 ++++ gcc/testsuite/gcc.dg/vect/vect-reduc-dot-14.c | 13 ++++ gcc/testsuite/gcc.dg/vect/vect-reduc-dot-15.c | 13 ++++ gcc/testsuite/gcc.dg/vect/vect-reduc-dot-16.c | 13 ++++ gcc/testsuite/gcc.dg/vect/vect-reduc-dot-17.c | 52 +++++++++++++ gcc/testsuite/gcc.dg/vect/vect-reduc-dot-18.c | 52 +++++++++++++ gcc/testsuite/gcc.dg/vect/vect-reduc-dot-19.c | 52 +++++++++++++ gcc/testsuite/gcc.dg/vect/vect-reduc-dot-20.c | 52 +++++++++++++ gcc/testsuite/gcc.dg/vect/vect-reduc-dot-21.c | 52 +++++++++++++ gcc/testsuite/gcc.dg/vect/vect-reduc-dot-22.c | 52 +++++++++++++ gcc/testsuite/gcc.dg/vect/vect-reduc-dot-9.c | 52 +++++++++++++ .../gcc.target/aarch64/simd/vusdot-autovec.c | 38 +++++++++ .../gcc.target/aarch64/sve/vusdot-autovec.c | 38 +++++++++ gcc/testsuite/gcc.target/arm/simd/vusdot-autovec.c | 38 +++++++++ gcc/testsuite/gcc.target/i386/pr101395-1.c | 12 +++ gcc/testsuite/gcc.target/i386/pr101395-2.c | 22 ++++++ gcc/testsuite/gcc.target/i386/pr101395-3.c | 6 ++ gcc/testsuite/gfortran.dg/pr100949.f90 | 10 +++ gcc/testsuite/lib/target-supports.exp | 80 +++++++++++++++++++ gcc/tree-cfg.c | 3 +- gcc/tree-vect-loop.c | 8 +- gcc/tree-vect-patterns.c | 86 +++++++++++++++------ libstdc++-v3/include/std/string_view | 1 + .../basic_string_view/cons/char/range.cc | 18 ++++- 60 files changed, 1117 insertions(+), 181 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-101371-2.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-101371.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/class-deduction96.C create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-10.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-11.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-12.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-13.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-14.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-15.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-16.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-17.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-18.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-19.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-20.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-21.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-22.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-reduc-dot-9.c create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vusdot-autovec.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/vusdot-autovec.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vusdot-autovec.c create mode 100644 gcc/testsuite/gcc.target/i386/pr101395-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr101395-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr101395-3.c create mode 100644 gcc/testsuite/gfortran.dg/pr100949.f90