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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_profiled_lto in repository toolchain/ci/binutils-gdb.

from cf0992fe6f Automatic date update in version.in adds fe7fdfda72 sim: clarify license text via COPYING file adds 04d8355ac6 readelf: Make DT_PREINIT_ARRAYSZ's output style match DT_INI [...] adds dd207c1302 readelf: Support RELR in -S and -d and output adds e8f81980ce ubsan: undefined shift in mach-o.c adds 314ec7aeeb Modernise yyerror adds 50a97903ce sim: mips: use sim_fpu_to{32,64}u to fix build warnings adds eea68ebb33 Automatic date update in version.in adds 74bbe64132 sim: sh: rework register layout with anonymous unions & structs adds 7256320b95 sim: sh: fix unused-value warnings adds 6b015f8977 sim: sh: fix various parentheses warnings adds ee7af46230 sim: sh: constify a few read-only lookup tables adds 524d770c9c sim: sh: fix uninitialized variable usage with pdmsb adds e6af0f123a sim: sh: enable -Werror everywhere

No new revisions were added by this update.

Summary of changes: bfd/elf.c | 3 + bfd/mach-o.c | 2 +- bfd/version.h | 2 +- binutils/arparse.y | 5 +- binutils/dlltool.c | 4 +- binutils/dlltool.h | 2 +- binutils/mclex.c | 13 +- binutils/readelf.c | 7 + binutils/sysinfo.y | 7 +- binutils/windmc.h | 2 +- gas/config/bfin-parse.y | 7 +- gas/itbl-parse.y | 5 +- include/elf/common.h | 4 + ld/deffilep.y | 5 +- sim/{arm => }/COPYING | 0 sim/mips/Makefile.in | 3 - sim/mips/cp1.c | 8 +- sim/ppc/COPYING | 674 ------------------------------------------------ sim/ppc/COPYING.LIB | 481 ---------------------------------- sim/sh/Makefile.in | 3 - sim/sh/gencode.c | 48 ++-- sim/sh/interp.c | 112 ++++---- sim/sh/sim-main.h | 54 ++-- 23 files changed, 149 insertions(+), 1302 deletions(-) rename sim/{arm => }/COPYING (100%) delete mode 100644 sim/ppc/COPYING delete mode 100644 sim/ppc/COPYING.LIB