This patchset creates/calls cpufreq suspend/resume callbacks from dpm_{suspend|resume}()
for handling suspend/resume of cpufreq governors and core.
There are multiple problems that are fixed by this patch:
- Nishanth Menon (TI) found an interesting problem on his platform, OMAP. His board
wasn't working well with suspend/resume as calls for removing non-boot CPUs
was turning out into a call to drivers ->target() which then tries to play
with regulators. But regulators and their I2C bus were already suspended and
this resulted in a failure. Many platforms have such problems, samsung, tegra,
etc.. They solved it with driver specific PM notifiers where they used to
disable their driver's ->target() routine.
- Lan Tianyu (Intel) & Jinhyuk Choi (Broadcom) found an issue where tunables
configuration for clusters/sockets with non-boot CPUs was getting lost after
suspend/resume, as we were notifying governors with CPUFREQ_GOV_POLICY_EXIT on
removal of the last cpu for that policy and so deallocating memory for
tunables. This is fixed by this patch as we don't allow any operation on
governors after device suspend and before device resume now.
This is already tested by few people and so incorporating their Tested-by as
well.
I have tested this again on latest stuff on my thinkpad for several
suspend/resume cycles.
V6->V7:
- Fixed crash reported by S.Warren on systems without a cpufreq driver.
- Moved some function doc-comments to patch 1 from a later patch.
For-v3.15
Viresh Kumar (7):
cpufreq: suspend governors on system suspend/hibernate
cpufreq: suspend governors from dpm_{suspend|resume}()
cpufreq: call driver's suspend/resume for each policy
cpufreq: Implement cpufreq_generic_suspend()
cpufreq: exynos: Use cpufreq_generic_suspend()
cpufreq: s5pv210: Use cpufreq_generic_suspend()
cpufreq: Tegra: Use cpufreq_generic_suspend()
drivers/base/power/main.c | 5 ++
drivers/cpufreq/cpufreq.c | 137 +++++++++++++++++++++++---------------
drivers/cpufreq/exynos-cpufreq.c | 96 ++------------------------
drivers/cpufreq/s5pv210-cpufreq.c | 49 +-------------
drivers/cpufreq/tegra-cpufreq.c | 46 ++-----------
include/linux/cpufreq.h | 11 +++
6 files changed, 113 insertions(+), 231 deletions(-)
--
1.7.12.rc2.18.g61b472e
This is v3 of my attempt to add support for a generic pci_host_bridge controller created
from a description passed in the device tree.
Changes from v2:
- Use range->cpu_addr when calling pci_address_to_pio()
- Introduce pci_register_io_range() helper function in order to register
io ranges ahead of their conversion to PIO values. This is needed as no
information is being stored yet regarding the range mapping, making
pci_address_to_pio() fail. Default weak implementation does nothing,
to cover the default weak implementation of pci_address_to_pio() that
expects direct mapping of physical addresses into PIO values (x86 view).
Changes from v1:
- Add patch to fix conversion of IO ranges into IO resources.
- Added a domain_nr member to pci_host_bridge structure, and a new function
to create a root bus in a given domain number. In order to facilitate that
I propose changing the order of initialisation between pci_host_bridge and
it's related bus in pci_create_root_bus() as sort of a rever of 7b5436635800.
This is done in patch 1/4 and 2/4.
- Added a simple allocator of domain numbers in drivers/pci/host-bridge.c. The
code will first try to get a domain id from of_alias_get_id(..., "pci-domain")
and if that fails assign the next unallocated domain id.
- Changed the name of the function that creates the generic host bridge from
pci_host_bridge_of_init to of_create_pci_host_bridge and exported as GPL symbol.
v1 thread here: https://lkml.org/lkml/2014/2/3/380
The following is an edit of the original blurb:
Following the discussion started here [1], I now have a proposal for tackling
generic support for host bridges described via device tree. It is an initial
stab at it, to try to get feedback and suggestions, but it is functional enough
that I have PCI Express for arm64 working on an FPGA using the patch that I am
also publishing that adds support for PCI for that platform.
Looking at the existing architectures that fit the requirements (use of device
tree and PCI) yields the powerpc and microblaze as generic enough to make them
candidates for conversion. I have a tentative patch for microblaze that I can
only compile test it, unfortunately using qemu-microblaze leads to an early
crash in the kernel.
As Bjorn has mentioned in the previous discussion, the idea is to add to
struct pci_host_bridge enough data to be able to reduce the size or remove the
architecture specific pci_controller structure. arm64 support actually manages
to get rid of all the architecture static data and has no pci_controller structure
defined. For host bridge drivers that means a change of API unless architectures
decide to provide a compatibility layer (comments here please).
In order to initialise a host bridge with the new API, the following example
code is sufficient for a _probe() function:
static int myhostbridge_probe(struct platform_device *pdev)
{
int err;
struct device_node *dev;
struct pci_host_bridge *bridge;
struct myhostbridge_port *pp;
resource_size_t lastbus;
dev = pdev->dev.of_node;
if (!of_device_is_available(dev)) {
pr_warn("%s: disabled\n", dev->full_name);
return -ENODEV;
}
pp = kzalloc(sizeof(struct myhostbridge_port), GFP_KERNEL);
if (!pp)
return -ENOMEM;
bridge = of_create_pci_host_bridge(&pdev->dev, &myhostbridge_ops, pp);
if (!bridge) {
err = -EINVAL;
goto bridge_init_fail;
}
err = myhostbridge_setup(bridge->bus);
if (err)
goto bridge_init_fail;
/* We always enable PCI domains and we keep domain 0 backward
* compatible in /proc for video cards
*/
pci_add_flags(PCI_ENABLE_PROC_DOMAINS | PCI_COMPAT_DOMAIN_0);
pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC);
lastbus = pci_scan_child_bus(bridge->bus);
pci_bus_update_busn_res_end(bridge->bus, lastbus);
pci_assign_unassigned_bus_resources(bridge->bus);
pci_bus_add_devices(bridge->bus);
return 0;
bridge_init_fail:
kfree(pp);
return err;
}
[1] http://thread.gmane.org/gmane.linux.kernel.pci/25946
Best regards,
Liviu
Liviu Dudau (5):
pci: Introduce pci_register_io_range() helper function.
pci: OF: Fix the conversion of IO ranges into IO resources.
pci: Create pci_host_bridge before its associated bus in pci_create_root_bus.
pci: Introduce a domain number for pci_host_bridge.
pci: Add support for creating a generic host_bridge from device tree
drivers/of/address.c | 39 +++++++++++++
drivers/pci/host-bridge.c | 134 +++++++++++++++++++++++++++++++++++++++++++++
drivers/pci/probe.c | 66 ++++++++++++++--------
include/linux/of_address.h | 14 +----
include/linux/pci.h | 17 ++++++
5 files changed, 236 insertions(+), 34 deletions(-)
--
1.9.0
Automated DT boot report for various ARM defconfigs.
Tree/Branch: arm-soc
Git describe: v3.14-rc3-479-g87b00e7
Failed boot tests (console logs at the end)
===========================================
Full Report
===========
multi_v7_defconfig
------------------
omap4-panda PASS: 0 min 57.0 sec
omap3-overo-storm-tobi PASS: 0 min 24.2 sec
sun7i-a20-cubieboard2 PASS: 0 min 14.6 sec
armada-370-mirabox PASS: 0 min 22.4 sec
omap4-panda-es DEAD: 0 min 0.0 sec
Console logs for failures
=========================
multi_v7_defconfig
------------------
omap4-panda-es: DEAD: last 80 lines of boot log:
------------------------------------------------
In: serial
Out: serial
Err: serial
Net: No ethernet found.
Hit any key to stop autoboot:
3 0
Panda #
Panda #version
version
U-Boot 2013.04 (May 24 2013 - 14:00:03)
arm-linux-gnueabi-gcc (Ubuntu/Linaro 4.7.1-5ubuntu1~ppa1) 4.7.1
GNU ld (GNU Binutils for Ubuntu) 2.22.52.20120713
Panda # setenv usbethaddr 2e:40:70:f0:12:07
setenv usbethaddr 2e:40:70:f0:12:07
Panda # setenv preboot usb start
setenv preboot usb start
Panda # setenv initrd_high 0xffffffff
setenv initrd_high 0xffffffff
Panda # setenv bootargs console=ttyO2,115200n8 debug earlyprintk rw root=/dev/mmcblk0p2 rootwait rootfstype=ext4
setenv bootargs console=ttyO2,115200n8 debug earlyprintk rw root=/dev/mmcblk0p2 rootwait rootfstype=ext4
Panda # setenv netargs 'setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}::::192.168.1.254:none'
setenv netargs 'setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}::::192.168.1.254:none'
Panda # if test -n ${initenv}; then run initenv; fi
if test -n ${initenv}; then run initenv; fi
Panda # if test -n ${preboot}; then run preboot; fi
if test -n ${preboot}; then run preboot; fi
(Re)start USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 3 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
scanning usb for ethernet devices... 1 Ethernet Device(s) found
Panda # setenv autoload no; setenv autoboot no
setenv autoload no; setenv autoboot no
Panda # dhcp
dhcp
Waiting for Ethernet connection... done.
BOOTP broadcast 1
BOOTP broadcast 2
DHCP client bound to address 192.168.1.157
Panda # setenv serverip 192.168.1.2
setenv serverip 192.168.1.2
Panda # if test -n ${netargs}; then run netargs; fi
if test -n ${netargs}; then run netargs; fi
Panda # tftp 0x82000000 192.168.1.2:tmp/4460panda-es-RLKupu/zImage
tftp 0x82000000 192.168.1.2:tmp/4460panda-es-RLKupu/zImage
Waiting for Ethernet connection... done.
Using sms0 device
TFTP from server 192.168.1.2; our IP address is 192.168.1.157
Filename 'tmp/4460panda-es-RLKupu/zImage'.
Load address: 0x82000000
Loading: *EHCI timed out on TD - token=0x8008d80
T #################################################################
#################################################################
#################################################################
#################################################################
###############################################
397.5 KiB/s
done
Bytes transferred = 4500504 (44ac18 hex)
Panda # tftp 0x81000000 192.168.1.2:buildroot.cpio.gz.uboot
tftp 0x81000000 192.168.1.2:buildroot.cpio.gz.uboot
Waiting for Ethernet connection... done.
Using sms0 device
TFTP from server 192.168.1.2; our IP address is 192.168.1.157
Filename 'buildroot.cpio.gz.uboot'.
Load address: 0x81000000
Loading: *EHCI timed out on TD - token=0x88008d80
T ############################################
118.2 KiB/s
done
Bytes transferred = 642602 (9ce2a hex)
Panda # tftp 0x81f00000 192.168.1.2:tmp/4460panda-es-RLKupu/omap4-panda-es.dtb
tftp 0x81f00000 192.168.1.2:tmp/4460panda-es-RLKupu/omap4-panda-es.dtb
Waiting for Ethernet connection... done.
Using sms0 device
TFTP from server 192.168.1.2; our IP address is 192.168.1.157
Filename 'tmp/4460panda-es-RLKupu/omap4-panda-es.dtb'.
Load address: 0x81f00000
Loading: *
Hi,
This patch adds support for PCI to AArch64. It is based on my v2 patch
that adds support for creating generic host bridge structure from
device tree. With that in place, I was able to boot a platform that
has PCIe host bridge support and use a PCIe network card.
Changes from v1:
- Added Catalin's patch for moving the PCI_IO_BASE location and extend
its size to 16MB
- Integrated Arnd's version of pci_ioremap_io that uses a bitmap for
keeping track of assigned IO space and returns an io_offset. At the
moment the code is added in arch/arm64 but it can be moved in drivers/pci.
- Added a fix for the generic ioport_map() function when !CONFIG_GENERIC_IOMAP
as suggested by Arnd.
The API used is different from the one used by ARM architecture. There is
no pci_common_init_dev() function and no hw_pci structure, as that is no
longer needed. Once the last signature is added to the legal agreement, I
will post the host bridge driver code that I am using. Meanwhile, here
is an example of what the probe function looks like, posted as an example:
static int myhostbridge_probe(struct platform_device *pdev)
{
int err;
struct device_node *dev;
struct pci_host_bridge *bridge;
struct myhostbridge_port *pp;
resource_size_t lastbus;
dev = pdev->dev.of_node;
if (!of_device_is_available(dev)) {
pr_warn("%s: disabled\n", dev->full_name);
return -ENODEV;
}
pp = kzalloc(sizeof(struct myhostbridge_port), GFP_KERNEL);
if (!pp)
return -ENOMEM;
bridge = of_create_pci_host_bridge(&pdev->dev, &myhostbridge_ops, pp);
if (!bridge) {
err = -EINVAL;
goto bridge_init_fail;
}
err = myhostbridge_setup(bridge->bus);
if (err)
goto bridge_init_fail;
/* We always enable PCI domains and we keep domain 0 backward
* compatible in /proc for video cards
*/
pci_add_flags(PCI_ENABLE_PROC_DOMAINS | PCI_COMPAT_DOMAIN_0);
pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC);
lastbus = pci_scan_child_bus(bridge->bus);
pci_bus_update_busn_res_end(bridge->bus, lastbus);
pci_assign_unassigned_bus_resources(bridge->bus);
pci_bus_add_devices(bridge->bus);
return 0;
bridge_init_fail:
kfree(pp);
return err;
}
Best regards,
Liviu
Catalin Marinas (1):
arm64: Extend the PCI I/O space to 16MB
Liviu Dudau (2):
Fix ioport_map() for !CONFIG_GENERIC_IOMAP cases.
arm64: Add architecture support for PCI
Documentation/arm64/memory.txt | 16 ++++--
arch/arm64/Kconfig | 19 ++++++-
arch/arm64/include/asm/Kbuild | 1 +
arch/arm64/include/asm/io.h | 5 +-
arch/arm64/include/asm/pci.h | 47 +++++++++++++++
arch/arm64/kernel/Makefile | 1 +
arch/arm64/kernel/pci.c | 126 +++++++++++++++++++++++++++++++++++++++++
include/asm-generic/io.h | 2 +-
8 files changed, 207 insertions(+), 10 deletions(-)
create mode 100644 arch/arm64/include/asm/pci.h
create mode 100644 arch/arm64/kernel/pci.c
--
1.9.0
