Adds DP controller DT node to exynos5420 SoC
Signed-off-by: Vikas Sajjan vikas.sajjan@linaro.org --- arch/arm/boot/dts/exynos5420-smdk5420.dts | 10 ++++++++++ arch/arm/boot/dts/exynos5420.dtsi | 13 +++++++++++++ 2 files changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts index 0c0249c..80aa3d4 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -31,6 +31,16 @@ }; };
+ dp-controller@145b0000 { + samsung,color-space = <0>; + samsung,dynamic-range = <0>; + samsung,ycbcr-coeff = <0>; + samsung,color-depth = <1>; + samsung,link-rate = <0x0a>; + samsung,lane-count = <4>; + status = "okay"; + }; + fimd@14400000 { status = "okay"; display-timings { diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 2f98c89..8255db2 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -181,6 +181,19 @@ clock-names = "uart", "clk_uart_baud0"; };
+ dp_phy: video-phy@10040728 { + compatible = "samsung,exynos5250-dp-video-phy"; + reg = <0x10040728 4>; + #phy-cells = <0>; + }; + + dp-controller@145b0000 { + clocks = <&clock 412>; + clock-names = "dp"; + phys = <&dp_phy>; + phy-names = "dp"; + }; + fimd@14400000 { samsung,power-domain = <&disp_pd>; clocks = <&clock 147>, <&clock 421>;