Changelog:
v4:
* Use 64-bit value on PL061 register base address.
* Use fallback to be compatible with current PcdPL061GpioBase value
when platform gpio driver isn't present.
* Remove the dependancy on PL061. Move the dependancy to platform
gpio driver instead.
v3:
* Remove GPIO_PIN_MASK_HIGH_8BIT() and GPIO_PIN_MASK_LOW_8BIT().
* Avoid to use MmioAnd8() on updating GPIO DATA register, since PL061
could access each bit by specified register offset.
* Add PLATFORM_GPIO_CONTROLLER structure in embedded gpio.
* Support multiple PL061 gpio controllers in one platform.
v2:
* Append the patch to fix gpio pin mask macro.
Haojian Zhuang (3):
ArmPlatformPkg: PL061: fix accessing GPIO DATA
EmbeddedPkg: enhance for multiple gpio controllers
ArmPlatformPkg: PL061: support multiple controller
ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c | 137 +++++++++++++++------
.../Drivers/PL061GpioDxe/PL061GpioDxe.inf | 1 +
ArmPlatformPkg/Include/Drivers/PL061Gpio.h | 51 ++++----
EmbeddedPkg/EmbeddedPkg.dec | 1 +
EmbeddedPkg/Include/Protocol/EmbeddedGpio.h | 17 +++
5 files changed, 143 insertions(+), 64 deletions(-)
--
2.1.4
From: Fu Wei <fu.wei(a)linaro.org>
- This adds support for the Xen boot on ARM specification for arm64.
- Add and export some accessor functions of "loaded" flag and
grub_linux_get_fdt function in include/grub/arm64/linux.h for xen boot.
- Introduce xen_hypervisor, xen_linux, xen_initrd and xen_xsm
to load different binaries for xen boot.
Introduce xen_module to load common or custom module for xen boot.
- This Xen boot support is a separated module for aarch64,
but reuse the existing code of devicetree in linux module.
- Add the support of xen_hypervisor, xen_linux and xen_initrd
in util/grub.d/20_linux_xen.in
- Add the introduction of all xen boot commands in docs/grub.texi
- The example of this support is <How to boot Xen with GRUB on AArch64 the Foundation FVP model>
https://wiki.linaro.org/LEG/Engineering/Grub2/Xen_booting_on_Foundation_FVP…
Changelog:
v3: create separate module for xen boot: xen_boot
create separate commands for different types of module
delete order-dependent for commands of xen module
simplify the code
v2: remove the patches which have been accepted.
according to Vladimir's suggestion, change the command manes
and relevant code:
multiboot-->xen_hypervisor
module-->xen_module
improve the option parsing support for xen_hypervisor/xen_module commands.
add a patch for adding xen_hypervisor/xen_module support
in util/grub.d/20_linux_xen.in.
update docs/grub.texi patch for the new command names.
v1: The first version upstream patchset to grub-devel mailing list
Fu Wei (4):
arm64: Add and export some accessor functions for xen boot
arm64: Add xen_boot module file
* util/grub.d/20_linux_xen.in: Add support of the XEN boot on aarch64
arm64: Add the introduction of xen boot commands in docs/grub.texi
docs/grub.texi | 56 ++++
grub-core/Makefile.core.def | 7 +
grub-core/loader/arm64/linux.c | 13 +
grub-core/loader/arm64/xen_boot.c | 685 ++++++++++++++++++++++++++++++++++++++
include/grub/arm64/linux.h | 6 +-
util/grub.d/20_linux_xen.in | 16 +-
6 files changed, 779 insertions(+), 4 deletions(-)
create mode 100644 grub-core/loader/arm64/xen_boot.c
--
1.8.3.1
If Bds launches BootNext with failure, delete it.
Otherwise, we'll create BootNext variable by BdsStartOption() & delete
it in BdsEntry() for each boot. It doesn't make sense to update
this variable in non-volatile variable area for each boot. And the
non-volatile variable area may be full of this message until overflow.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang(a)linaro.org>
---
ArmPlatformPkg/Bds/Bds.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/ArmPlatformPkg/Bds/Bds.c b/ArmPlatformPkg/Bds/Bds.c
index ffae4bc..512e8e1 100644
--- a/ArmPlatformPkg/Bds/Bds.c
+++ b/ArmPlatformPkg/Bds/Bds.c
@@ -530,12 +530,12 @@ BdsEntry (
// BootNext has not been succeeded launched
if (EFI_ERROR(Status)) {
Print(L"Fail to start BootNext.\n");
- }
- // Delete the BootNext environment variable
- gRT->SetVariable (L"BootNext", &gEfiGlobalVariableGuid,
- EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
- 0, NULL);
+ // Delete the BootNext environment variable
+ gRT->SetVariable (L"BootNext", &gEfiGlobalVariableGuid,
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
+ 0, NULL);
+ }
}
// Clear BootCurrent variable
--
2.1.4
FYI
I am adding the below patch to my GCC consolidation series.
-------------8<---------------
In GCC 4.7, a feature was added to the ARM backend that allows
unaligned loads and stores to be emitted. Since it is enabled by
default on ARMv6 and later CPUs, and since such code is not suitable
in our case (i.e., bare metal code), we must disable it by passing the
-mno-unaligned-access option if we are using GCC 4.7 or later.
However, this particular feature and its enabling by default have been
backported to version 4.6 by Linaro. Since the Linaro toolchains are
widely used for ARM development, and also shipped by distros such as
Ubuntu, we should disable the feature on version 4.6 as well.
Unfortunately, since the upstream version does not support the feature,
it also does not understand the -mno-unaligned-access option.
Considering the above, and the fact that the oldest supported toolchain
for AARCH64 is 4.7 as well, let's just drop support for 4.6 altogether.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org>
---
BaseTools/Conf/tools_def.template | 30 --------------------
1 file changed, 30 deletions(-)
diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template
index fabfe7436167..5707aafec8cd 100644
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -4160,36 +4160,6 @@ DEFINE GCC_AARCH64_RC_FLAGS = -I binary -O elf64-littleaarch64 -B aarch64
*_GCC46_X64_OBJCOPY_FLAGS =
*_GCC46_X64_NASM_FLAGS = -f elf64
-##################
-# GCC46 ARM definitions
-##################
-*_GCC46_ARM_OBJCOPY_PATH = echo
-*_GCC46_ARM_CC_PATH = ENV(GCC46_ARM_PREFIX)gcc
-*_GCC46_ARM_SLINK_PATH = ENV(GCC46_ARM_PREFIX)ar
-*_GCC46_ARM_DLINK_PATH = ENV(GCC46_ARM_PREFIX)ld
-*_GCC46_ARM_ASLDLINK_PATH = ENV(GCC46_ARM_PREFIX)ld
-*_GCC46_ARM_ASM_PATH = ENV(GCC46_ARM_PREFIX)gcc
-*_GCC46_ARM_PP_PATH = ENV(GCC46_ARM_PREFIX)gcc
-*_GCC46_ARM_VFRPP_PATH = ENV(GCC46_ARM_PREFIX)gcc
-*_GCC46_ARM_ASLCC_PATH = ENV(GCC46_ARM_PREFIX)gcc
-*_GCC46_ARM_ASLPP_PATH = ENV(GCC46_ARM_PREFIX)gcc
-*_GCC46_ARM_RC_PATH = ENV(GCC46_ARM_PREFIX)objcopy
-
-*_GCC46_ARM_ARCHCC_FLAGS =
-*_GCC46_ARM_PLATFORM_FLAGS = -march=armv7-a
-
-*_GCC46_ARM_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS)
-*_GCC46_ARM_ASLDLINK_FLAGS = DEF(GCC_ARM_ASLDLINK_FLAGS)
-*_GCC46_ARM_ASM_FLAGS = DEF(GCC_ARM_ASM_FLAGS)
-*_GCC46_ARM_DLINK_FLAGS = DEF(GCC_ARM_DLINK_FLAGS)
-*_GCC46_ARM_PLATFORM_FLAGS = -march=armv7-a
-*_GCC46_ARM_PP_FLAGS = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) DEF(GCC_PP_FLAGS)
-*_GCC46_ARM_RC_FLAGS = DEF(GCC_ARM_RC_FLAGS)
-*_GCC46_ARM_VFRPP_FLAGS = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) DEF(GCC_VFRPP_FLAGS)
-
- DEBUG_GCC46_ARM_CC_FLAGS = DEF(GCC_ARM_CC_FLAGS) -O0
-RELEASE_GCC46_ARM_CC_FLAGS = DEF(GCC_ARM_CC_FLAGS)
-
####################################################################################
#
# GCC 4.7 - This configuration is used to compile under Linux to produce
--
1.9.1
The way of accessing PL061 GPIODATA register is wrong.
The spec said in below.
In order to write to GPIODATA, the corresponding bits in the mask,
resulting from the address bus, PADDR[9:2], must be HIGH. Otherwise
the bit values remain unchanged by the write.
Similarly, the values read from this register are determined for
each bit, by the mask bit derived from the address used to access
the data register, PADDR[9:2]. Bits that are 1 in the address mask
cause the corresponding bits in GPIODATA to be read, and bits that
are 0 in the address mask cause the corresponding bits in GPIODATA
to be read as 0, regardless of their value.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang(a)linaro.org>
---
ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c b/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c
index ff05662..35418c9 100644
--- a/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c
+++ b/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c
@@ -125,7 +125,7 @@ Get (
}
}
- if (MmioRead8 (PL061_GPIO_DATA_REG) & GPIO_PIN_MASK_HIGH_8BIT(Gpio)) {
+ if (MmioRead8 (PL061_GPIO_DATA_REG + (GPIO_PIN_MASK_HIGH_8BIT(Gpio) << 2))) {
*Value = 1;
} else {
*Value = 0;
@@ -186,14 +186,14 @@ Set (
case GPIO_MODE_OUTPUT_0:
// Set the corresponding data bit to LOW for 0
- MmioAnd8 (PL061_GPIO_DATA_REG, GPIO_PIN_MASK_LOW_8BIT(Gpio));
+ MmioAnd8 (PL061_GPIO_DATA_REG + (GPIO_PIN_MASK_HIGH_8BIT(Gpio) << 2), GPIO_PIN_MASK_LOW_8BIT(Gpio));
// Set the corresponding direction bit to HIGH for output
MmioOr8 (PL061_GPIO_DIR_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio));
break;
case GPIO_MODE_OUTPUT_1:
// Set the corresponding data bit to HIGH for 1
- MmioOr8 (PL061_GPIO_DATA_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio));
+ MmioOr8 (PL061_GPIO_DATA_REG + (GPIO_PIN_MASK_HIGH_8BIT(Gpio) << 2), GPIO_PIN_MASK_HIGH_8BIT(Gpio));
// Set the corresponding direction bit to HIGH for output
MmioOr8 (PL061_GPIO_DIR_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio));
break;
--
2.1.4