Linaro-uefi March 2016

linaro-uefi@lists.linaro.org

22 participants
24 discussions

[PATCH] Platforms/ARM: Juno: Acpi - update SPCR to aslc.

by evan.lloyd＠arm.com

From: Sami Mujawar <sami.mujawar(a)arm.com> Amend the Serial Port Console Redirection Table to enable (i.a.) Microsoft Windows Emergency Management Services (EMS) over the serial port. This patch replaces the Spcr.asl file which described the SPCR table in TDL format with Spcr.aslc which allows more flexibility by way of permitting the use of PCDs. This means the serial port usage can be modified at build. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Alexei Fedorov <alexei.fedorov(a)arm.com> Signed-off-by: Girish Pathak <girish.pathak(a)arm.com> Signed-off-by: Sami Mujawar <sami.mujawar(a)arm.com> Signed-off-by: Evan Lloyd <evan.lloyd(a)arm.com> --- Platforms/ARM/Juno/AcpiTables/AcpiTables.inf | 12 ++- Platforms/ARM/Juno/AcpiTables/Spcr.asl | 73 ------------------ Platforms/ARM/Juno/AcpiTables/Spcr.aslc | 79 ++++++++++++++++++++ Platforms/ARM/Juno/ArmJuno.dsc | 1 + 4 files changed, 90 insertions(+), 75 deletions(-) diff --git a/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf b/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf index 3159d7d..412f43d 100644 --- a/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf +++ b/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf @@ -2,7 +2,7 @@ # # ACPI table data and ASL sources required to boot the platform. # -# Copyright (c) 2014-2015, ARM Ltd. All rights reserved. +# Copyright (c) 2014-2016, ARM Ltd. All rights reserved. # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -24,7 +24,7 @@ [Sources] Dsdt.asl Dbg2.asl - Spcr.asl + Spcr.aslc Facs.aslc Fadt.aslc Gtdt.aslc @@ -52,3 +52,11 @@ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase + + # + # PL011 UART Settings for Serial Port Console Redirection + # + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate + gArmPlatformTokenSpaceGuid.PL011UartClkInHz + gArmPlatformTokenSpaceGuid.PL011UartInterrupt diff --git a/Platforms/ARM/Juno/AcpiTables/Spcr.asl b/Platforms/ARM/Juno/AcpiTables/Spcr.asl deleted file mode 100644 index 2b65326..0000000 --- a/Platforms/ARM/Juno/AcpiTables/Spcr.asl +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (c) 2015, Graeme Gregory <graeme.gregory(a)linaro.org> - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - * NB: This License is also known as the "BSD 2-Clause License". - * - * - * [SPCR] ACPI Table - * - */ - -[0004] Signature : "SPCR" [Serial Port Console Redirection table] -[0004] Table Length : 00000050 -[0001] Revision : 02 -[0001] Checksum : 29 -[0006] Oem ID : "LINARO" -[0008] Oem Table ID : "ARM-JUNO" -[0004] Oem Revision : 00000000 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20140926 - -[0001] Interface Type : 03 -[0003] Reserved : 000000 - -[000C] Serial Port Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 20 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 03 [DWord Access:32] -[0008] Address : 000000007FF80000 - -[0001] Interrupt Type : 08 -[0001] PCAT-compatible IRQ : 00 -[0004] Interrupt : 00000073 -[0001] Baud Rate : 07 -[0001] Parity : 00 -[0001] Stop Bits : 01 -[0001] Flow Control : 00 -[0001] Terminal Type : 03 -[0001] Reserved : 00 -[0002] PCI Device ID : FFFF -[0002] PCI Vendor ID : FFFF -[0001] PCI Bus : 00 -[0001] PCI Device : 00 -[0001] PCI Function : 00 -[0004] PCI Flags : 00000000 -[04Bh] PCI Segment : 00 -[04Ch] Reserved : 00000000 - diff --git a/Platforms/ARM/Juno/AcpiTables/Spcr.aslc b/Platforms/ARM/Juno/AcpiTables/Spcr.aslc new file mode 100644 index 0000000..d76f48a --- /dev/null +++ b/Platforms/ARM/Juno/AcpiTables/Spcr.aslc @@ -0,0 +1,79 @@ +/** @file +* SPCR Table +* +* Copyright (c) 2014 - 2016, ARM Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include "ArmPlatform.h" +#include <Library/AcpiLib.h> +#include <Library/ArmLib.h> +#include <Library/PcdLib.h> +#include <IndustryStandard/Acpi.h> +#include <IndustryStandard/SerialPortConsoleRedirectionTable.h> + +/** + * References: + * Serial Port Console Redirection Table Specification Version 1.03 - August 10, 2015 + **/ + + +/// +/// SPCR Flow Control +/// +#define SPCR_FLOW_CONTROL_NONE 0 + + +STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = { + ARM_ACPI_HEADER (EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE, + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE, + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION), + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART, + { + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE + }, + ARM_GAS32 (FixedPcdGet64 (PcdSerialRegisterBase)), + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC, + 0, // Not used on ARM + FixedPcdGet32 (PL011UartInterrupt), +#if (FixedPcdGet64 (PcdUartDefaultBaudRate) == 9600) + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_9600, +#elif (FixedPcdGet64 (PcdUartDefaultBaudRate) == 19200) + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_19200, +#elif (FixedPcdGet64 (PcdUartDefaultBaudRate) == 57600) + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_57600, +#elif (FixedPcdGet64 (PcdUartDefaultBaudRate) == 115200) + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200, +#else +#error Unsupported SPCR Baud Rate +#endif + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY, + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1, + SPCR_FLOW_CONTROL_NONE, + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_ANSI, + EFI_ACPI_RESERVED_BYTE, + 0xFFFF, + 0xFFFF, + 0x00, + 0x00, + 0x00, + 0x00000000, + 0x00, + EFI_ACPI_RESERVED_DWORD +}; + +// +// Reference the table being generated to prevent the optimizer from removing the +// data structure from the executable +// +VOID* CONST ReferenceAcpiTable = &Spcr; diff --git a/Platforms/ARM/Juno/ArmJuno.dsc b/Platforms/ARM/Juno/ArmJuno.dsc index d099d86..b718794 100644 --- a/Platforms/ARM/Juno/ArmJuno.dsc +++ b/Platforms/ARM/Juno/ArmJuno.dsc @@ -128,6 +128,7 @@ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 gArmPlatformTokenSpaceGuid.PL011UartInteger|4 gArmPlatformTokenSpaceGuid.PL011UartFractional|0 + gArmPlatformTokenSpaceGuid.PL011UartInterrupt|115 ## PL031 RealTimeClock gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000 -- 2.7.0

7 years, 10 months

[PATCH] Platforms/ARM: Juno: PL011 PCD changes

by evan.lloyd＠arm.com

From: Sami Mujawar <sami.mujawar(a)arm.com> The generic PL011 driver has been updated to allow for UARTs on a board having different clock sources (as is the case on Juno). This changes the Juno code to make use of the new driver options. The solution involves using the Baud rate and new PL011UartClkInHz PCDs to configure the UART ports. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Alexei Fedorov <alexei.fedorov(a)arm.com> Signed-off-by: Girish Pathak <girish.pathak(a)arm.com> Signed-off-by: Sami Mujawar <sami.mujawar(a)arm.com> Signed-off-by: Evan Lloyd <evan.lloyd(a)arm.com> --- Platforms/ARM/Juno/ArmJuno.dsc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Platforms/ARM/Juno/ArmJuno.dsc b/Platforms/ARM/Juno/ArmJuno.dsc index b718794..3e17831 100644 --- a/Platforms/ARM/Juno/ArmJuno.dsc +++ b/Platforms/ARM/Juno/ArmJuno.dsc @@ -126,8 +126,7 @@ ## PL011 - Serial Terminal gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF80000 gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 - gArmPlatformTokenSpaceGuid.PL011UartInteger|4 - gArmPlatformTokenSpaceGuid.PL011UartFractional|0 + gArmPlatformTokenSpaceGuid.PL011UartClkInHz|7372800 gArmPlatformTokenSpaceGuid.PL011UartInterrupt|115 ## PL031 RealTimeClock -- 2.7.0

7 years, 11 months

[PATCH] Platforms/ARM: Juno: HDLCD Graphics Output Protocol

by evan.lloyd＠arm.com

From: Sami Mujawar <sami.mujawar(a)arm.com> This patch enables the Graphics Output Protocol using HDLCD on the Juno platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Alexei Fedorov <alexei.fedorov(a)arm.com> Signed-off-by: Girish Pathak <girish.pathak(a)arm.com> Signed-off-by: Sami Mujawar <sami.mujawar(a)arm.com> Signed-off-by: Evan Lloyd <evan.lloyd(a)arm.com> --- Platforms/ARM/Juno/ArmJuno.dsc | 12 +++++++++++- Platforms/ARM/Juno/ArmJuno.fdf | 5 ++++- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/Platforms/ARM/Juno/ArmJuno.dsc b/Platforms/ARM/Juno/ArmJuno.dsc index 02472ce..d099d86 100644 --- a/Platforms/ARM/Juno/ArmJuno.dsc +++ b/Platforms/ARM/Juno/ArmJuno.dsc @@ -1,5 +1,5 @@ # -# Copyright (c) 2013-2015, ARM Limited. All rights reserved. +# Copyright (c) 2013-2016, ARM Limited. All rights reserved. # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -50,6 +50,8 @@ # USB Requirements UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf + LcdPlatformLib|ArmPlatformPkg/ArmJunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJunoLib.inf + [LibraryClasses.ARM] ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf @@ -118,6 +120,9 @@ # ARM PrimeCell # + ## HdLcd + gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x7FF60000 + ## PL011 - Serial Terminal gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF80000 gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 @@ -248,6 +253,11 @@ ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf # + # Graphic Output Protocol + # + ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcdGraphicsOutputDxe.inf + + # # Semi-hosting filesystem # ArmPkg/Filesystem/SemihostFs/SemihostFs.inf diff --git a/Platforms/ARM/Juno/ArmJuno.fdf b/Platforms/ARM/Juno/ArmJuno.fdf index e686a6d..2ca20b8 100644 --- a/Platforms/ARM/Juno/ArmJuno.fdf +++ b/Platforms/ARM/Juno/ArmJuno.fdf @@ -1,5 +1,5 @@ # -# Copyright (c) 2013-2015, ARM Limited. All rights reserved. +# Copyright (c) 2013-2016, ARM Limited. All rights reserved. # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -135,6 +135,9 @@ FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092 # Versatile Express FileSystem INF ArmPlatformPkg/FileSystem/BootMonFs/BootMonFs.inf + # Graphic Output Protocol + INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcdGraphicsOutputDxe.inf + # # FAT filesystem + GPT/MBR partitioning # -- 2.7.0

7 years, 11 months

[PATCH v3 0/4] arm64, xen: add xen_boot support into grup-mkconfig

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> This patchset add xen_boot support into grup-mkconfig for generating xen boot entrances automatically Also update the docs/grub.texi for new xen_boot commands. This patchset has been tested on Foudation model with a bug fix: http://lists.gnu.org/archive/html/grub-devel/2016-02/msg00205.html ChangeLog: v3: reorder the patches update the introduction of xen_module commands in docs/grub.texi v2: http://lists.gnu.org/archive/html/grub-devel/2016-02/msg00282.html add "--nounzip" option support in xen_module use "feature_xen_boot" instead of "grub_xen_boot" update the introduction of xen boot commands in docs/grub.texi v1 :first upstream patchset: http://lists.gnu.org/archive/html/grub-devel/2016-02/msg00264.html Fu Wei (4): i386,xen: Add xen_hypervisor and xen_module aliases for i386 arm64: add "--nounzip" option support in xen_module command * util/grub.d/20_linux_xen.in: Add xen_boot command support arm64: update the introduction of xen boot commands in docs/grub.texi docs/grub.texi | 33 ++++++++++----------------------- grub-core/loader/arm64/xen_boot.c | 17 +++++++++++++++++ grub-core/loader/i386/xen.c | 7 +++++++ grub-core/normal/main.c | 2 +- util/grub.d/20_linux_xen.in | 13 ++++++++++--- 5 files changed, 45 insertions(+), 27 deletions(-) -- 2.5.0

8 years

[PATCH v3] xen/arm64: check XSM Magic and Signature from the second unknown module.

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> This patch add a check_xsm_signature static function for detecting XSM from the second unknown module. If Xen can't get the kind of module from compatible, we guess the kind of these first two unknown respectively: (1) The first unknown must be kernel; (2) The second unknown is ramdisk, only if we have ramdisk; (3) Start from the 2nd unknown, detect the XSM binary signature; (4) If we got XSM in the 2nd unknown, that means we don't load initrd. Signed-off-by: Fu Wei <fu.wei(a)linaro.org> --- Changelog: v3: Using memcmp instead of strncmp. Using "return 0;" instead of panic(); Improve some comments. v2: http://lists.xen.org/archives/html/xen-devel/2016-03/msg03543.html Using XEN_MAGIC macro instead of 0xf97cff8c : uint32_t selinux_magic = 0xf97cff8c; --> uint32_t xen_magic = XEN_MAGIC; Comment out the code(return 0 directly), if CONFIG_FLASK is not set. v1: http://lists.xen.org/archives/html/xen-devel/2016-03/msg02430.html The first upstream patch to xen-devel mailing lists. xen/arch/arm/bootfdt.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 53 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/bootfdt.c b/xen/arch/arm/bootfdt.c index 8a14015..10d3382 100644 --- a/xen/arch/arm/bootfdt.c +++ b/xen/arch/arm/bootfdt.c @@ -163,6 +163,49 @@ static void __init process_memory_node(const void *fdt, int node, } } +/** + * check_xsm_signature - Check XSM Magic and Signature of the module header + * A XSM module has a special header + * ------------------------------------------------ + * uint magic | uint target_len | uchar target[8] | + * 0xf97cff8c | 8 | "XenFlask" | + * ------------------------------------------------ + * 0xf97cff8c is policy magic number (XSM_MAGIC). + * So we only read the first 16 bytes of the module, then check these three + * parts. This checking (memcmp) assumes little-endian byte order. + */ +static bool __init check_xsm_signature(const void *fdt, int node, + const char *name, + u32 address_cells, u32 size_cells) +{ +#ifdef CONFIG_FLASK + u32 xen_magic = XSM_MAGIC, target_len = 8; + const struct fdt_property *prop; + unsigned char buff[16]; + paddr_t start, size; + const __be32 *cell; + int len; + + prop = fdt_get_property(fdt, node, "reg", &len); + if ( !prop || len < dt_cells_to_size(address_cells + size_cells)) + return 0; + + cell = (const __be32 *)prop->data; + device_tree_get_reg(&cell, address_cells, size_cells, &start, &size); + + copy_from_paddr(buff, start, sizeof(buff)); + + if (memcmp(buff, (void *) &xen_magic, sizeof(u32)) || + memcmp(buff + sizeof(u32), (void *) &target_len, sizeof(u32)) || + memcmp(buff + sizeof(u32) * 2, "XenFlask", target_len)) + return 0; + + return 1; +#else + return 0; +#endif +} + static void __init process_multiboot_node(const void *fdt, int node, const char *name, u32 address_cells, u32 size_cells) @@ -186,7 +229,13 @@ static void __init process_multiboot_node(const void *fdt, int node, else kind = BOOTMOD_UNKNOWN; - /* Guess that first two unknown are kernel and ramdisk respectively. */ + /** + * Guess the kind of these first two unknown respectively: + * (1) The first unknown must be kernel; + * (2) The second unknown is ramdisk, only if we have ramdisk; + * (3) Start from the 2nd unknown, detect the XSM binary signature; + * (4) If we got XSM in the 2nd unknown, that means we have not initrd. + */ if ( kind == BOOTMOD_UNKNOWN ) { switch ( kind_guess++ ) @@ -195,6 +244,9 @@ static void __init process_multiboot_node(const void *fdt, int node, case 1: kind = BOOTMOD_RAMDISK; break; default: break; } + if (kind_guess > 1 && check_xsm_signature(fdt, node, name, + address_cells, size_cells)) + kind = BOOTMOD_XSM; } prop = fdt_get_property(fdt, node, "reg", &len); -- 2.5.0

8 years

[PATCH 00/26] Marvell Armada7040 SoC support

by Marcin Wojtas

Hello, This series adds initial support for the new Armada 7K and 8K Marvell 64 bits processors. Details about those processors based on the Cortex-A72 can be found at: http://www.marvell.com/embedded-processors/armada-70xx/ http://www.marvell.com/embedded-processors/armada-80xx/ This series comprise following features: * Core support - GICv2 - ARM architected timer - ARM watchdog timer - Marvell UART port - Two development boards support (APN806-DB and Armada7040-rz-DB) * Platform UART driver * SPI - SoC SPI controller driver - SPI Flash driver - 'sf' Shell command for using the flash - 'fupdate' Shell command for updating image in flash * I2C - SoC I2C controller driver - Eeprom driver - 'eeprom' Shell command * MppLib - library needed for pin-multiplexing configuration * Ramdisk - Imported driver from EFI-Toolkit 1.0 project - Enable dynamically allocated space for virtual filesystem Each change is described in the commit logs and in dedicated .txt documentation submitted along with the code. Any remarks and comments would be welcome. Best regards, Marcin Wojtas Bartosz Szczepanek (6): Drivers/I2c: Create MvI2cDxe driver Platforms/Marvell: Copy BdsLib to Armada7040 directory Platforms/Marvell: Add necessary BdsLibConnectAll call Drivers/I2c: Add MvEeprom driver Platforms/Marvell: Enable EEPROM driver on Armada7040 platforms Aplications/Eeprom: Add 'eeprom' command to shell Jan Dąbroś (16): Platforms/Marvell: Create MppLib Platforms/Marvell: Armada: Enable MppLib on Armada7040 platforms Platforms/Marvell: Enable I2C driver on Armada7040 platforms Platforms/Marvell: Enable 'eeprom' command on Armada7040 platforms Platforms/Marvell: Add EFI_SPI_MASTER_PROTOCOL Drivers/Spi: Add Spi master driver Platforms/Marvell: Enable Spi master driver for Armada7040 boards Platforms/Marvell: Add EFI_SPI_FLASH_PROTOCOL Drivers/Spi: Implement Spi flash driver Platforms/Marvell: Enable Spi flash driver on Armada7040 platforms Applications/SpiTool: Add 'sf' command utility Platforms/Marvell: Enable 'sf' command on Armada7040 platforms Drivers/Ramdisk: Import Ramdisk driver from EFI Toolkit 2.0 Drivers/Ramdisk: Adjust Ramdisk driver to EDK2.0 Applications/FirmwareUpdate: Add 'fupdate' comand to shell Platforms/Marvell: Enable 'fupdate' command on Armada7040 platforms Marcin Wojtas (1): Platforms/Marvell: Enable Ramdisk usage on Armada7040 platforms Yehuda Yitschak (3): Chips/Marvell: Add serial port for Marvell SOCs Platforms/Marvell: Add initial support for Armada7040 SOC lib Platforms/Marvell: Add initial support for Armada7040 Platforms Applications/EepromCmd/EepromCmd.c | 363 +++++++++++ Applications/EepromCmd/EepromCmd.inf | 74 +++ Applications/EepromCmd/EepromCmd.uni | Bin 0 -> 6816 bytes Applications/FirmwareUpdate/FUpdate.c | 437 +++++++++++++ Applications/FirmwareUpdate/FUpdate.inf | 69 +++ Applications/FirmwareUpdate/FUpdate.uni | Bin 0 -> 5838 bytes Applications/SpiTool/SpiFlashCmd.c | 528 ++++++++++++++++ Applications/SpiTool/SpiFlashCmd.inf | 76 +++ Applications/SpiTool/SpiFlashCmd.uni | Bin 0 -> 7216 bytes .../Library/SerialPortLib/DwSerialPortLib.c | 303 +++++++++ .../Library/SerialPortLib/DwSerialPortLib.inf | 43 ++ Documentation/Marvell/Drivers/EepromDriver.txt | 95 +++ Documentation/Marvell/Drivers/I2cDriver.txt | 64 ++ Documentation/Marvell/Drivers/SpiDriver.txt | 116 ++++ Documentation/Marvell/PortingGuide/I2c.txt | 16 + Documentation/Marvell/PortingGuide/Mpp.txt | 48 ++ Documentation/Marvell/PortingGuide/Ramdisk.txt | 7 + Documentation/Marvell/PortingGuide/Spi.txt | 15 + Documentation/Marvell/PortingGuide/SpiFlash.txt | 19 + Drivers/I2c/Devices/MvEeprom/MvEeprom.c | 292 +++++++++ Drivers/I2c/Devices/MvEeprom/MvEeprom.h | 88 +++ Drivers/I2c/Devices/MvEeprom/MvEeprom.inf | 70 +++ Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 686 +++++++++++++++++++++ Drivers/I2c/MvI2cDxe/MvI2cDxe.h | 252 ++++++++ Drivers/I2c/MvI2cDxe/MvI2cDxe.inf | 73 +++ Drivers/Ramdisk/Ramdisk.c | 386 ++++++++++++ Drivers/Ramdisk/Ramdisk.h | 142 +++++ Drivers/Ramdisk/Ramdisk.inf | 73 +++ Drivers/Spi/Devices/MvSpiFlash.c | 523 ++++++++++++++++ Drivers/Spi/Devices/MvSpiFlash.h | 130 ++++ Drivers/Spi/Devices/MvSpiFlash.inf | 74 +++ Drivers/Spi/SpiDxe.c | 376 +++++++++++ Drivers/Spi/SpiDxe.h | 145 +++++ Drivers/Spi/SpiDxe.inf | 73 +++ Platforms/Marvell/Armada/Apn806.dsc | 84 +++ Platforms/Marvell/Armada/Armada.dsc.inc | 460 ++++++++++++++ Platforms/Marvell/Armada/Armada7040.fdf | 277 +++++++++ Platforms/Marvell/Armada/Armada7040_rz.dsc | 96 +++ .../Library/Armada7040BdsLib/Armada7040BdsLib.c | 428 +++++++++++++ .../Library/Armada7040BdsLib/Armada7040BdsLib.h | 37 ++ .../Library/Armada7040BdsLib/Armada7040BdsLib.inf | 66 ++ .../Armada7040Lib/AArch64/ArmPlatformHelper.S | 65 ++ .../Armada/Library/Armada7040Lib/Armada7040Lib.c | 156 +++++ .../Armada/Library/Armada7040Lib/Armada7040Lib.inf | 47 ++ .../Library/Armada7040Lib/Armada7040LibMem.c | 73 +++ Platforms/Marvell/Include/Library/MppLib.h | 42 ++ Platforms/Marvell/Include/Protocol/Eeprom.h | 60 ++ Platforms/Marvell/Include/Protocol/Spi.h | 105 ++++ Platforms/Marvell/Include/Protocol/SpiFlash.h | 102 +++ Platforms/Marvell/Library/MppLib/MppLib.c | 181 ++++++ Platforms/Marvell/Library/MppLib/MppLib.inf | 108 ++++ Platforms/Marvell/Marvell.dec | 135 ++++ 52 files changed, 8178 insertions(+) create mode 100644 Applications/EepromCmd/EepromCmd.c create mode 100644 Applications/EepromCmd/EepromCmd.inf create mode 100644 Applications/EepromCmd/EepromCmd.uni create mode 100644 Applications/FirmwareUpdate/FUpdate.c create mode 100644 Applications/FirmwareUpdate/FUpdate.inf create mode 100644 Applications/FirmwareUpdate/FUpdate.uni create mode 100644 Applications/SpiTool/SpiFlashCmd.c create mode 100644 Applications/SpiTool/SpiFlashCmd.inf create mode 100644 Applications/SpiTool/SpiFlashCmd.uni create mode 100644 Chips/Marvell/Library/SerialPortLib/DwSerialPortLib.c create mode 100644 Chips/Marvell/Library/SerialPortLib/DwSerialPortLib.inf create mode 100644 Documentation/Marvell/Drivers/EepromDriver.txt create mode 100644 Documentation/Marvell/Drivers/I2cDriver.txt create mode 100644 Documentation/Marvell/Drivers/SpiDriver.txt create mode 100644 Documentation/Marvell/PortingGuide/I2c.txt create mode 100644 Documentation/Marvell/PortingGuide/Mpp.txt create mode 100644 Documentation/Marvell/PortingGuide/Ramdisk.txt create mode 100644 Documentation/Marvell/PortingGuide/Spi.txt create mode 100644 Documentation/Marvell/PortingGuide/SpiFlash.txt create mode 100644 Drivers/I2c/Devices/MvEeprom/MvEeprom.c create mode 100644 Drivers/I2c/Devices/MvEeprom/MvEeprom.h create mode 100644 Drivers/I2c/Devices/MvEeprom/MvEeprom.inf create mode 100644 Drivers/I2c/MvI2cDxe/MvI2cDxe.c create mode 100644 Drivers/I2c/MvI2cDxe/MvI2cDxe.h create mode 100644 Drivers/I2c/MvI2cDxe/MvI2cDxe.inf create mode 100644 Drivers/Ramdisk/Ramdisk.c create mode 100644 Drivers/Ramdisk/Ramdisk.h create mode 100644 Drivers/Ramdisk/Ramdisk.inf create mode 100644 Drivers/Spi/Devices/MvSpiFlash.c create mode 100644 Drivers/Spi/Devices/MvSpiFlash.h create mode 100644 Drivers/Spi/Devices/MvSpiFlash.inf create mode 100644 Drivers/Spi/SpiDxe.c create mode 100644 Drivers/Spi/SpiDxe.h create mode 100644 Drivers/Spi/SpiDxe.inf create mode 100644 Platforms/Marvell/Armada/Apn806.dsc create mode 100644 Platforms/Marvell/Armada/Armada.dsc.inc create mode 100644 Platforms/Marvell/Armada/Armada7040.fdf create mode 100644 Platforms/Marvell/Armada/Armada7040_rz.dsc create mode 100644 Platforms/Marvell/Armada/Library/Armada7040BdsLib/Armada7040BdsLib.c create mode 100644 Platforms/Marvell/Armada/Library/Armada7040BdsLib/Armada7040BdsLib.h create mode 100644 Platforms/Marvell/Armada/Library/Armada7040BdsLib/Armada7040BdsLib.inf create mode 100644 Platforms/Marvell/Armada/Library/Armada7040Lib/AArch64/ArmPlatformHelper.S create mode 100644 Platforms/Marvell/Armada/Library/Armada7040Lib/Armada7040Lib.c create mode 100644 Platforms/Marvell/Armada/Library/Armada7040Lib/Armada7040Lib.inf create mode 100644 Platforms/Marvell/Armada/Library/Armada7040Lib/Armada7040LibMem.c create mode 100644 Platforms/Marvell/Include/Library/MppLib.h create mode 100644 Platforms/Marvell/Include/Protocol/Eeprom.h create mode 100644 Platforms/Marvell/Include/Protocol/Spi.h create mode 100644 Platforms/Marvell/Include/Protocol/SpiFlash.h create mode 100644 Platforms/Marvell/Library/MppLib/MppLib.c create mode 100644 Platforms/Marvell/Library/MppLib/MppLib.inf create mode 100644 Platforms/Marvell/Marvell.dec -- 1.8.3.1

8 years

[PATCH] Platforms/ARM::Add FileExplorerLib.inf to the dsc file

by Ryan Harkin

From: Dandan Bi <dandan.bi(a)intel.com> Dandan submitted this patch to the EDK2 Mailing list for review before FVP was moved to OpenPlatformPkg: https://www.mail-archive.com/edk2-devel@lists.01.org/msg07113.html His original commit message: ArmPlatformPkg: Add FileExplorerLib.inf to the dsc file V3: Add FileExplorerLib when SECURE_BOOT_ENABLE == TRUE, so when to use FileExplorerLib is clear. Because SecureBootConfigDxe use FileExplorerLib now, but FileExplorerLib is not in the dsc file of the package that use SecureBootConfigDxe. Now add it to pass build. Cc: Leif Lindholm <leif.lindholm(a)linaro.org> Cc: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> Cc: Ryan.Harkin <ryan.harkin(a)linaro.org> Cc: Eric Dong <eric.dong(a)intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi(a)intel.com> Reviewed-by: Ryan Harkin <ryan.har...(a)linaro.org> --- Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc index 265c5d7..78330d6 100644 --- a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc +++ b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc @@ -54,6 +54,9 @@ [LibraryClasses.common] # Virtio Support VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf +!if $(SECURE_BOOT_ENABLE) == TRUE + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf +!endif [LibraryClasses.common.SEC] ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf -- 2.5.0

8 years

[PATCH] Platforms/ARM: add PcdUartDefaultReceiveFifoDepth

by Ryan Harkin

The upstream code uses a PCD to set the FIFO depth: f423d76 2016-03-17 MdeModulePkg/SerialDxe: Set FIFO depth with PCD Add a sensible default for the PCD before the code becomes more widely used. The PL011UartInitializePort function in the PL011 driver expects the receive FIFO depth to be set to a sane value or zero to use the appropriate default for the version of PL011 present on the device. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ryan Harkin <ryan.harkin(a)linaro.org> --- Platforms/ARM/Juno/ArmJuno.dsc | 1 + Platforms/ARM/VExpress/ArmVExpress-CTA15-A7.dsc | 1 + Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc | 1 + 3 files changed, 3 insertions(+) diff --git a/Platforms/ARM/Juno/ArmJuno.dsc b/Platforms/ARM/Juno/ArmJuno.dsc index 8cf0ada..7f030a7 100644 --- a/Platforms/ARM/Juno/ArmJuno.dsc +++ b/Platforms/ARM/Juno/ArmJuno.dsc @@ -121,6 +121,7 @@ [PcdsFixedAtBuild.common] ## PL011 - Serial Terminal gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF80000 gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0 gArmPlatformTokenSpaceGuid.PL011UartInteger|4 gArmPlatformTokenSpaceGuid.PL011UartFractional|0 diff --git a/Platforms/ARM/VExpress/ArmVExpress-CTA15-A7.dsc b/Platforms/ARM/VExpress/ArmVExpress-CTA15-A7.dsc index 44e2105..c6d0b13 100644 --- a/Platforms/ARM/VExpress/ArmVExpress-CTA15-A7.dsc +++ b/Platforms/ARM/VExpress/ArmVExpress-CTA15-A7.dsc @@ -139,6 +139,7 @@ [PcdsFixedAtBuild.common] ## PL011 - Serial Terminal gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1C090000 gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|38400 + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0 ## PL031 RealTimeClock gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000 diff --git a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc index fffbf28..78330d6 100644 --- a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc +++ b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc @@ -145,6 +145,7 @@ [PcdsFixedAtBuild.common] ## PL011 - Serial Terminal gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1c090000 gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0 ## PL031 RealTimeClock gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000 -- 2.5.0

8 years

[PATCH] Platforms/Juno: drop FACS table

by Ard Biesheuvel

The FACS table does not expose anything meaningful on AArch64, and since the Tianocore ACPI table handling code insists on locating FACS below 4 GB, which may fail since since AArch64 platforms may not have any system RAM below 4 GB to begin with. The reason for this behavior is to ensure that a 32-bit PEI can access the FACS table on an otherwise 64-bit system, but this is a concern that does not apply to AArch64, since PEI always runs in 64-bit mode in that case. The PI spec currently does not provide any means for PEI to convey its bitness or how much system RAM it can access, so a permanent fix requires a spec update first. So simply remove the FACS table until the PIWG clarifies the spec in this regard. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- Platforms/ARM/Juno/AcpiTables/AcpiTables.inf | 1 - Platforms/ARM/Juno/AcpiTables/Facs.aslc | 62 ---------------------------- 2 files changed, 63 deletions(-) delete mode 100644 Platforms/ARM/Juno/AcpiTables/Facs.aslc diff --git a/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf b/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf index 3159d7d37c4a..039cff0a743a 100644 --- a/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf +++ b/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf @@ -25,7 +25,6 @@ Dsdt.asl Dbg2.asl Spcr.asl - Facs.aslc Fadt.aslc Gtdt.aslc Madt.aslc diff --git a/Platforms/ARM/Juno/AcpiTables/Facs.aslc b/Platforms/ARM/Juno/AcpiTables/Facs.aslc deleted file mode 100644 index 137ead77c199..000000000000 --- a/Platforms/ARM/Juno/AcpiTables/Facs.aslc +++ /dev/null @@ -1,62 +0,0 @@ -/** @file -* Firmware ACPI Control Structure (FACS) -* -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include <IndustryStandard/Acpi.h> - -EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE Facs = { - EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE, // UINT32 Signature - sizeof (EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE), // UINT32 Length - 0xA152, // UINT32 HardwareSignature - 0, // UINT32 FirmwareWakingVector - 0, // UINT32 GlobalLock - 0, // UINT32 Flags - 0, // UINT64 XFirmwareWakingVector - EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION, // UINT8 Version; - { EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0[0] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0[1] - EFI_ACPI_RESERVED_BYTE }, // UINT8 Reserved0[2] - 0, // UINT32 OspmFlags "Platform firmware must - // initialize this field to zero." - { EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[0] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[1] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[2] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[3] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[4] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[5] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[6] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[7] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[8] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[9] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[10] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[11] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[12] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[13] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[14] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[15] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[16] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[17] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[18] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[19] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[20] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[21] - EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[22] - EFI_ACPI_RESERVED_BYTE }, // UINT8 Reserved1[23] -}; - -// -// Reference the table being generated to prevent the optimizer from removing the -// data structure from the executable -// -VOID* CONST ReferenceAcpiTable = &Facs; -- 2.5.0

8 years

[PATCH v2] xen/arm64: check XSM Magic and Signature from the second unknown module.

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> This patch add a check_xsm_signature static function for detecting XSM from the second unknown module. If xen can't get the kind of module from compatible, we guess the kind of these first two unknown respectively: (1) The first unknown must be kernel; (2) The second unknown is ramdisk, only if we have ramdisk; (3) Start from the 2nd unknown, detect the XSM binary signature; (4) If we got XSM in the 2nd unknown, that means we don't load initrd. Signed-off-by: Fu Wei <fu.wei(a)linaro.org> --- v2: Using XEN_MAGIC macro instead of 0xf97cff8c : uint32_t selinux_magic = 0xf97cff8c; --> uint32_t xen_magic = XEN_MAGIC; Comment out the code(return 0 directly), if CONFIG_FLASK is not set. v1: http://lists.xen.org/archives/html/xen-devel/2016-03/msg02430.html The first upstream patch to xen-devel mailing lists. xen/arch/arm/bootfdt.c | 57 +++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 56 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/bootfdt.c b/xen/arch/arm/bootfdt.c index 8a14015..322f17f 100644 --- a/xen/arch/arm/bootfdt.c +++ b/xen/arch/arm/bootfdt.c @@ -163,6 +163,52 @@ static void __init process_memory_node(const void *fdt, int node, } } +/** + * check_xsm_signature - Check XSM Magic and Signature of the module header + * A XSM module has a special header + * ------------------------------------------------ + * uint magic | uint target_len | uchar target[8] | + * 0xf97cff8c | 8 | "XenFlask" | + * ------------------------------------------------ + * 0xf97cff8c is policy magic number. + * So we only read the first 16 Bytes of the module, then check these three + * parts. + */ +static bool __init check_xsm_signature(const void *fdt, int node, + const char *name, + u32 address_cells, u32 size_cells) +{ +#ifdef CONFIG_FLASK + u32 xen_magic = XSM_MAGIC, target_len = 8; + const struct fdt_property *prop; + paddr_t start, size; + const __be32 *cell; + char buff[16]; + int len; + + prop = fdt_get_property(fdt, node, "reg", &len); + if ( !prop ) + panic("node %s missing `reg' property\n", name); + + if ( len < dt_cells_to_size(address_cells + size_cells) ) + panic("fdt: node `%s': `reg` property length is too short\n", name); + + cell = (const __be32 *)prop->data; + device_tree_get_reg(&cell, address_cells, size_cells, &start, &size); + + copy_from_paddr(buff, start, sizeof(buff)); + + if (strncmp(buff, (char *) &xen_magic, sizeof(u32)) || + strncmp(buff + sizeof(u32), (char *) &target_len, sizeof(u32)) || + strncmp(buff + sizeof(u32) * 2, "XenFlask", target_len)) + return 0; + + return 1; +#else + return 0; +#endif +} + static void __init process_multiboot_node(const void *fdt, int node, const char *name, u32 address_cells, u32 size_cells) @@ -186,7 +232,13 @@ static void __init process_multiboot_node(const void *fdt, int node, else kind = BOOTMOD_UNKNOWN; - /* Guess that first two unknown are kernel and ramdisk respectively. */ + /** + * Guess the kind of these first two unknown respectively: + * (1) The first unknown must be kernel; + * (2) The second unknown is ramdisk, only if we have ramdisk; + * (3) Start from the 2nd unknown, detect the XSM binary signature; + * (4) If we got XSM in the 2nd unknown, that means we have not initrd. + */ if ( kind == BOOTMOD_UNKNOWN ) { switch ( kind_guess++ ) @@ -195,6 +247,9 @@ static void __init process_multiboot_node(const void *fdt, int node, case 1: kind = BOOTMOD_RAMDISK; break; default: break; } + if (kind_guess > 1 && check_xsm_signature(fdt, node, name, + address_cells, size_cells)) + kind = BOOTMOD_XSM; } prop = fdt_get_property(fdt, node, "reg", &len); -- 2.5.0

8 years

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Linaro-uefi March 2016