Linaro-uefi June 2016

linaro-uefi@lists.linaro.org

13 participants
21 discussions

[PATCH 1/3] Platforms/ARM/Juno: Fix IO window translate offset in PCIe root complex

by Sudeep Holla

XPress-RICH3 PCIe driver initialises the root complex with the same source and target address for IO window which makes translate offset 0. This patch fixes the translate offset for the IO window in Juno PCIe root complex ACPI table. Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> Cc: Leif Lindholm <leif.lindholm(a)linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla(a)arm.com> --- Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl index 800d2cb3b2fb..ab5041db731a 100644 --- a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl +++ b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl @@ -109,7 +109,7 @@ DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM 0x00000000, // Granularity 0x5f800000, // Min Base Address 0x5fffffff, // Max Base Address - 0x5f800000, // Translate + 0x00000000, // Translate 0x00800000 // Length ) }) // Name(RBUF) -- 1.9.1

7 years, 5 months

[PATCH v2 0/2] Lan9x driver fixes

by Daniil Egranov

The patches are fixing issues with ARP messages and TX recycle buffer overflow. Daniil Egranov (2): OpenPlatformPkg/Lan91xDxe: Fixed ARP broadst message handling OpenPlatformPkg/Lan91xDxe: Fixed TX recycle buffer overflow Drivers/Net/Lan91xDxe/Lan91xDxe.c | 116 +++++++++++++++++++------------------- 1 file changed, 59 insertions(+), 57 deletions(-) -- 2.7.4

7 years, 9 months

[PATCH v4 0/4] arm64, xen: add xen_boot support into grup-mkconfig

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> This patchset add xen_boot support into grup-mkconfig for generating xen boot entrances automatically Also update the docs/grub.texi for new xen_boot commands. This patchset has been tested on Foudation model with a bug fix: http://lists.gnu.org/archive/html/grub-devel/2016-02/msg00205.html ChangeLog: v4: http://lists.gnu.org/archive/html/grub-devel/2016-05/ according to the XSM loading mechanism of Xen(upstreamed), update the introduction of xen_module commands in docs/grub.texi v3: http://lists.gnu.org/archive/html/grub-devel/2016-02/msg00314.html reorder the patches update the introduction of xen_module commands in docs/grub.texi v2: http://lists.gnu.org/archive/html/grub-devel/2016-02/msg00282.html add "--nounzip" option support in xen_module use "feature_xen_boot" instead of "grub_xen_boot" update the introduction of xen boot commands in docs/grub.texi v1 :first upstream patchset: http://lists.gnu.org/archive/html/grub-devel/2016-02/msg00264.html Fu Wei (4): i386,xen: Add xen_hypervisor and xen_module aliases for i386 arm64: add "--nounzip" option support in xen_module command * util/grub.d/20_linux_xen.in: Add xen_boot command support arm64: update the introduction of xen boot commands in docs/grub.texi docs/grub.texi | 33 ++++++++++----------------------- grub-core/loader/arm64/xen_boot.c | 17 +++++++++++++++++ grub-core/loader/i386/xen.c | 7 +++++++ grub-core/normal/main.c | 2 +- util/grub.d/20_linux_xen.in | 13 ++++++++++--- 5 files changed, 45 insertions(+), 27 deletions(-) -- 2.5.5

7 years, 9 months

[PATCH] Platforms/FVP: Fix MADT to run the Foundation model in GICv3 mode with 4 CPUs

by Ard Biesheuvel

This upgrades the MADT table so that it exposes the GIC as a v3. The virtual base address and interrupt, and the hypervisor base address are corrected as well. Since the Foundation model has 4 cores at the most, and since refactoring this code to update the ACPI tables dynamically based on the actual core count is more trouble that its worth, remove the second cluster while we are at it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- This applies in combination with Graeme's 'Platforms/ARM: Fix FVP FADT version' Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/apic.asl | 116 ++++---------------- 1 file changed, 19 insertions(+), 97 deletions(-) diff --git a/Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/apic.asl b/Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/apic.asl index 9cd303184352..7d915621efef 100644 --- a/Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/apic.asl +++ b/Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/apic.asl @@ -61,9 +61,9 @@ [0004] Performance Interrupt : 00000000 [0008] Parked Address : 0000000000000000 [0008] Base Address : 000000002C000000 /* armv8 FVP Base GIC address */ -[0008] Virtual GIC Base Address : 0 -[0008] Hypervisor GIC Base Address : 0 -[0004] Virtual GIC Interrupt : 0 +[0008] Virtual GIC Base Address : 000000002C02F000 +[0008] Hypervisor GIC Base Address : 000000002C010000 +[0004] Virtual GIC Interrupt : 00000019 [0008] Redistributor Base Address : 0 [0008] ARM MPIDR : 0 [0001] Efficiency Class : 00 @@ -82,9 +82,9 @@ [0004] Performance Interrupt : 00000000 [0008] Parked Address : 0000000000000000 [0008] Base Address : 000000002C000000 -[0008] Virtual GIC Base Address : 0 -[0008] Hypervisor GIC Base Address : 0 -[0004] Virtual GIC Interrupt : 0 +[0008] Virtual GIC Base Address : 000000002C02F000 +[0008] Hypervisor GIC Base Address : 000000002C010000 +[0004] Virtual GIC Interrupt : 00000019 [0008] Redistributor Base Address : 0 [0008] ARM MPIDR : 0000000000000001 [0001] Efficiency Class : 00 @@ -103,9 +103,9 @@ [0004] Performance Interrupt : 00000000 [0008] Parked Address : 0000000000000000 [0008] Base Address : 000000002C000000 -[0008] Virtual GIC Base Address : 0 -[0008] Hypervisor GIC Base Address : 0 -[0004] Virtual GIC Interrupt : 0 +[0008] Virtual GIC Base Address : 000000002C02F000 +[0008] Hypervisor GIC Base Address : 000000002C010000 +[0004] Virtual GIC Interrupt : 00000019 [0008] Redistributor Base Address : 0 [0008] ARM MPIDR : 0000000000000002 [0001] Efficiency Class : 00 @@ -124,103 +124,25 @@ [0004] Performance Interrupt : 00000000 [0008] Parked Address : 0000000000000000 [0008] Base Address : 000000002C000000 -[0008] Virtual GIC Base Address : 0 -[0008] Hypervisor GIC Base Address : 0 -[0004] Virtual GIC Interrupt : 0 +[0008] Virtual GIC Base Address : 000000002C02F000 +[0008] Hypervisor GIC Base Address : 000000002C010000 +[0004] Virtual GIC Interrupt : 00000019 [0008] Redistributor Base Address : 0 [0008] ARM MPIDR : 0000000000000003 [0001] Efficiency Class : 00 [0003] Reserved : 000000 -[0001] Subtable Type : 0B [Generic Interrupt Controller] -[0001] Length : 50 -[0002] Reserved : 0000 -[0004] CPU Interface Number : 00000004 -[0004] Processor UID : 00000004 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Performance Interrupt Trigger Mode : 0 - Virtual GIC Interrupt Trigger Mode : 0 -[0004] Parking Protocol Version : 00000000 -[0004] Performance Interrupt : 00000000 -[0008] Parked Address : 0000000000000000 -[0008] Base Address : 000000002C000000 -[0008] Virtual GIC Base Address : 0 -[0008] Hypervisor GIC Base Address : 0 -[0004] Virtual GIC Interrupt : 0 -[0008] Redistributor Base Address : 0 -[0008] ARM MPIDR : 0000000000000100 -[0001] Efficiency Class : 00 -[0003] Reserved : 000000 - -[0001] Subtable Type : 0B [Generic Interrupt Controller] -[0001] Length : 50 -[0002] Reserved : 0000 -[0004] CPU Interface Number : 00000005 -[0004] Processor UID : 00000005 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Performance Interrupt Trigger Mode : 0 - Virtual GIC Interrupt Trigger Mode : 0 -[0004] Parking Protocol Version : 00000000 -[0004] Performance Interrupt : 00000000 -[0008] Parked Address : 0000000000000000 -[0008] Base Address : 000000002C000000 -[0008] Virtual GIC Base Address : 0 -[0008] Hypervisor GIC Base Address : 0 -[0004] Virtual GIC Interrupt : 0 -[0008] Redistributor Base Address : 0 -[0008] ARM MPIDR : 0000000000000101 -[0001] Efficiency Class : 00 -[0003] Reserved : 000000 - -[0001] Subtable Type : 0B [Generic Interrupt Controller] -[0001] Length : 50 -[0002] Reserved : 0000 -[0004] CPU Interface Number : 00000006 -[0004] Processor UID : 00000006 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Performance Interrupt Trigger Mode : 0 - Virtual GIC Interrupt Trigger Mode : 0 -[0004] Parking Protocol Version : 00000000 -[0004] Performance Interrupt : 00000000 -[0008] Parked Address : 0000000000000000 -[0008] Base Address : 000000002C000000 -[0008] Virtual GIC Base Address : 0 -[0008] Hypervisor GIC Base Address : 0 -[0004] Virtual GIC Interrupt : 0 -[0008] Redistributor Base Address : 0 -[0008] ARM MPIDR : 0000000000000102 -[0001] Efficiency Class : 00 -[0003] Reserved : 000000 - -[0001] Subtable Type : 0B [Generic Interrupt Controller] -[0001] Length : 50 -[0002] Reserved : 0000 -[0004] CPU Interface Number : 00000007 -[0004] Processor UID : 00000007 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Performance Interrupt Trigger Mode : 0 - Virtual GIC Interrupt Trigger Mode : 0 -[0004] Parking Protocol Version : 00000000 -[0004] Performance Interrupt : 00000000 -[0008] Parked Address : 0000000000000000 -[0008] Base Address : 000000002C000000 -[0008] Virtual GIC Base Address : 0 -[0008] Hypervisor GIC Base Address : 0 -[0004] Virtual GIC Interrupt : 0 -[0008] Redistributor Base Address : 0 -[0008] ARM MPIDR : 0000000000000103 -[0001] Efficiency Class : 00 -[0003] Reserved : 000000 - [0001] Subtable Type : 0C [Generic Interrupt Distributor] [0001] Length : 18 [0002] Reserved : 0000 [0004] Local GIC Hardware ID : 00000000 [0008] Base Address : 000000002F000000 /* armv8 FVP Base GIC distributor base addr */ [0004] Interrupt Base : 00000000 -[0001] Version : 02 +[0001] Version : 03 [0003] Reserved : 000000 + +[0001] Subtable Type : 0E [Generic Interrupt Redistributor] +[0001] Length : 10 +[0002] Reserved : 0000 +[0008] Base Address : 000000002F100000 /* armv8 FVP Base GIC redistributor base addr */ +[0004] Region Size : 00200000 -- 2.7.4

7 years, 9 months

[PATCH 0/2] Platforms/ARM/uno: update SPCR to aslC

by evan.lloyd＠arm.com

From: Evan Lloyd <evan.lloyd(a)arm.com> This patch set comprises a split version of the single patch previously submitted under the title "Platforms/ARM: Juno: Acpi - update SPCR to aslc." The split divides the change to aslC format from the update to use PCDs. Code is available at: https://github.com/EvanLloyd/OpenPlatformPkg/tree/SPCR_v3 Original Commit message was: Amend the Serial Port Console Redirection Table to enable (i.a.) Microsoft Windows Emergency Management Services (EMS) over the serial port. This patch replaces the Spcr.asl file which described the SPCR table in TDL format with Spcr.aslc which allows more flexibility by way of permitting the use of PCDs. This means the serial port usage can be modified at build. Evan Lloyd (1): Platforms/ARM/Juno: Use PCDs for SPCR info Sami Mujawar (1): Platforms/ARM/Juno: Acpi - update SPCR to aslc. Platforms/ARM/Juno/ArmJuno.dsc | 1 + Platforms/ARM/Juno/AcpiTables/AcpiTables.inf | 12 ++- Platforms/ARM/Juno/AcpiTables/Spcr.asl | 73 --------------- Platforms/ARM/Juno/AcpiTables/Spcr.aslc | 99 ++++++++++++++++++++ 4 files changed, 110 insertions(+), 75 deletions(-) delete mode 100644 Platforms/ARM/Juno/AcpiTables/Spcr.asl create mode 100644 Platforms/ARM/Juno/AcpiTables/Spcr.aslc -- Guid("CE165669-3EF3-493F-B85D-6190EE5B9759")

7 years, 9 months

[PATCH v5 00/22] Marvell Armada7040 SoC support

by Marcin Wojtas

Hello, Here's v5 version of the support. It's rebased on top of newest master branch and comprise fixes from the latest review. Patches are also available in the github: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/opp… Any comments or remarks would be welcome. Best regards, Marcin Changelog: v4 -> v5 * Add ParsePcdLib - Library created in order to parse PCD strings - it makes support for multi-controller easier to implement * I2c - Introduce multi-bus support - Remove comments regarding GUID-slave address dependency - Add FIXME comment about no-restart dual definition * eeprom command - Enable selecting I2C bus - Add FIXME comment about no-restart dual definition * Spi - Fix writing procedure - Rename protocol to MARVELL_SPI_MASTER_PROTOCOL * General - Remove commented-out, unused lines v3 -> v4 * Update license messages - Unify - Add "Based on" statement were needed - Wrap every message at 80 characters - Add Marvell copyrights * Fix namings - All protocol/file names updated as suggested in review * Clean-up - Remove unneded blank lines and spaces - Fix typos * Add "Reviewed by" for currently accepted patches * Add support for new platform - Armada70x0 - Remove support for old platforms Apn806 and Armada7040_rz - Armada70x0 is based on Armada7040_rz with silicone fixes and improvements - No changes on drivers/libraries caused by this change - Update commit logs in whole tree * MppLib - Fix issue with writing to uninitialized memory * I2c and eeprom command - Remove dependency on BdsLibConnectAll call - I2c stack is connected only if eeprom command is executed and only in case it wasn't done before - gBS->ConnectController() used * BdsLib - Remove import of BdsLib - After rebase on top of new edk2, extra BdsLibConnectAll call isn't necessary (actually for now no BdsLibConnectAll is needed at all for our platform support) * sf command - Remove inclusion of relative path - Necessary macro now defined in globally exported file * RamDisk driver - Drop patch with this feature - As long as there is no possibility to format RamDisk with FAT, driver is not useful on Armada70x0 * fupdate command - Fix issue with "bad checksum" v2 -> v3 * Decrease binary size * Fupdate command - Remove regression - replace ShellExecute with RunShellCommand - Improve error paths * Add proper DEBUG library and change error print levels v1 -> v2 * Fix "may be used uninitialized" variables issue, branch compiles both with DEBUG and RELEASE flags * Remove I2C_FLAG_NORESTART dependency - replace it with local definition * Remove Marvell UART Library: - DW8250 IP has programming interface compatible with NS-16550. Since in edk2 there is support for 16550, internal library is unnecessary. - /Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf is used instead * RamDisk driver: - Remove old driver imported from EFI TOOLKIT 2.0 - Replace it with new MdeModulePkg/Universal/Disk/RamDiskDxe from edk2 - Lack of FAT formatting issue emerged * Add explicit dependency on IoLib in Drivers/Spi/SpiDxe.inf * Add poster's "Signed-off-by" registry to every commit message * Move to 05.04.2016 HEAD of edk2/master - Update CpuExceptionHandlerLib within OPP. Bartosz Szczepanek (3): Drivers/I2c: Create MvI2cDxe driver Drivers/I2c: Add MvEeprom driver Aplications/Eeprom: Add 'eeprom' command to shell Jan Dąbroś (17): Platforms/Marvell: Create MppLib Platforms/Marvell: Armada: Enable MppLib on Armada70x0 platform Platforms/Marvell: Create ParsePcdLib Platforms/Marvell: Enable ParsePcdLib for Armada70x0 platform Platforms/Marvell: Enable I2C driver on Armada70x0 platform Plaforms/Marvell: Enable EEPROM driver on Armada70x0 platform Platforms/Marvell: Enable 'eeprom' command on Armada70x0 platform Platforms/Marvell: Add MARVELL_SPI_MASTER_PROTOCOL Drivers/Spi: Add Spi master driver Platforms/Marvell: Enable Spi master driver for Armada70x0 platform Platforms/Marvell: Add MARVELL_SPI_FLASH_PROTOCOL Drivers/Spi: Implement Spi flash driver Platforms/Marvell: Enable Spi flash driver for Armada70x0 platform Applications/SpiTool: Add 'sf' command utility Platforms/Marvell: Enable 'sf' command on Armada70x0 platform Applications/FirmwareUpdate: Add 'fupdate' comand to shell Platforms/Marvell: Enable 'fupdate' command on Armada70x0 platform Yehuda Yitschak (2): Platforms/Marvell: Add initial support for Armada70x0 SOC lib Platforms/Marvell: Add support for Armada70x0 platform Applications/EepromCmd/EepromCmd.c | 397 +++++++++++ Applications/EepromCmd/EepromCmd.inf | 71 ++ Applications/EepromCmd/EepromCmd.uni | Bin 0 -> 6816 bytes Applications/FirmwareUpdate/FUpdate.c | 447 +++++++++++++ Applications/FirmwareUpdate/FUpdate.inf | 68 ++ Applications/FirmwareUpdate/FUpdate.uni | Bin 0 -> 5838 bytes Applications/SpiTool/SpiFlashCmd.c | 526 +++++++++++++++ Applications/SpiTool/SpiFlashCmd.inf | 75 +++ Applications/SpiTool/SpiFlashCmd.uni | Bin 0 -> 7216 bytes Documentation/Marvell/Drivers/EepromDriver.txt | 96 +++ Documentation/Marvell/Drivers/I2cDriver.txt | 64 ++ Documentation/Marvell/Drivers/SpiDriver.txt | 116 ++++ Documentation/Marvell/PortingGuide/I2c.txt | 20 + Documentation/Marvell/PortingGuide/Mpp.txt | 48 ++ Documentation/Marvell/PortingGuide/Spi.txt | 15 + Documentation/Marvell/PortingGuide/SpiFlash.txt | 23 + Drivers/I2c/Devices/MvEeprom/MvEeprom.c | 297 ++++++++ Drivers/I2c/Devices/MvEeprom/MvEeprom.h | 97 +++ Drivers/I2c/Devices/MvEeprom/MvEeprom.inf | 70 ++ Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 743 +++++++++++++++++++++ Drivers/I2c/MvI2cDxe/MvI2cDxe.h | 263 ++++++++ Drivers/I2c/MvI2cDxe/MvI2cDxe.inf | 75 +++ Drivers/Spi/Devices/MvSpiFlash.c | 531 +++++++++++++++ Drivers/Spi/Devices/MvSpiFlash.h | 132 ++++ Drivers/Spi/Devices/MvSpiFlash.inf | 67 ++ Drivers/Spi/MvSpiDxe.c | 379 +++++++++++ Drivers/Spi/MvSpiDxe.h | 145 ++++ Drivers/Spi/MvSpiDxe.inf | 66 ++ Platforms/Marvell/Armada/Armada.dsc.inc | 448 +++++++++++++ Platforms/Marvell/Armada/Armada70x0.dsc | 97 +++ Platforms/Marvell/Armada/Armada70x0.fdf | 269 ++++++++ .../Armada70x0Lib/AArch64/ArmPlatformHelper.S | 66 ++ .../Armada/Library/Armada70x0Lib/Armada70x0Lib.c | 155 +++++ .../Armada/Library/Armada70x0Lib/Armada70x0Lib.inf | 69 ++ .../Library/Armada70x0Lib/Armada70x0LibMem.c | 93 +++ Platforms/Marvell/Include/Library/MppLib.h | 42 ++ Platforms/Marvell/Include/Library/ParsePcdLib.h | 46 ++ Platforms/Marvell/Include/Protocol/Eeprom.h | 60 ++ Platforms/Marvell/Include/Protocol/Spi.h | 105 +++ Platforms/Marvell/Include/Protocol/SpiFlash.h | 113 ++++ Platforms/Marvell/Library/MppLib/MppLib.c | 163 +++++ Platforms/Marvell/Library/MppLib/MppLib.inf | 107 +++ .../Marvell/Library/ParsePcdLib/ParsePcdLib.c | 228 +++++++ .../Marvell/Library/ParsePcdLib/ParsePcdLib.inf | 50 ++ Platforms/Marvell/Marvell.dec | 136 ++++ 45 files changed, 7078 insertions(+) create mode 100644 Applications/EepromCmd/EepromCmd.c create mode 100644 Applications/EepromCmd/EepromCmd.inf create mode 100644 Applications/EepromCmd/EepromCmd.uni create mode 100644 Applications/FirmwareUpdate/FUpdate.c create mode 100644 Applications/FirmwareUpdate/FUpdate.inf create mode 100644 Applications/FirmwareUpdate/FUpdate.uni create mode 100644 Applications/SpiTool/SpiFlashCmd.c create mode 100644 Applications/SpiTool/SpiFlashCmd.inf create mode 100644 Applications/SpiTool/SpiFlashCmd.uni create mode 100644 Documentation/Marvell/Drivers/EepromDriver.txt create mode 100644 Documentation/Marvell/Drivers/I2cDriver.txt create mode 100644 Documentation/Marvell/Drivers/SpiDriver.txt create mode 100644 Documentation/Marvell/PortingGuide/I2c.txt create mode 100644 Documentation/Marvell/PortingGuide/Mpp.txt create mode 100644 Documentation/Marvell/PortingGuide/Spi.txt create mode 100644 Documentation/Marvell/PortingGuide/SpiFlash.txt create mode 100644 Drivers/I2c/Devices/MvEeprom/MvEeprom.c create mode 100644 Drivers/I2c/Devices/MvEeprom/MvEeprom.h create mode 100644 Drivers/I2c/Devices/MvEeprom/MvEeprom.inf create mode 100755 Drivers/I2c/MvI2cDxe/MvI2cDxe.c create mode 100644 Drivers/I2c/MvI2cDxe/MvI2cDxe.h create mode 100755 Drivers/I2c/MvI2cDxe/MvI2cDxe.inf create mode 100755 Drivers/Spi/Devices/MvSpiFlash.c create mode 100755 Drivers/Spi/Devices/MvSpiFlash.h create mode 100644 Drivers/Spi/Devices/MvSpiFlash.inf create mode 100755 Drivers/Spi/MvSpiDxe.c create mode 100644 Drivers/Spi/MvSpiDxe.h create mode 100644 Drivers/Spi/MvSpiDxe.inf create mode 100644 Platforms/Marvell/Armada/Armada.dsc.inc create mode 100644 Platforms/Marvell/Armada/Armada70x0.dsc create mode 100644 Platforms/Marvell/Armada/Armada70x0.fdf create mode 100644 Platforms/Marvell/Armada/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S create mode 100644 Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.c create mode 100644 Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf create mode 100644 Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c create mode 100644 Platforms/Marvell/Include/Library/MppLib.h create mode 100644 Platforms/Marvell/Include/Library/ParsePcdLib.h create mode 100644 Platforms/Marvell/Include/Protocol/Eeprom.h create mode 100644 Platforms/Marvell/Include/Protocol/Spi.h create mode 100644 Platforms/Marvell/Include/Protocol/SpiFlash.h create mode 100644 Platforms/Marvell/Library/MppLib/MppLib.c create mode 100644 Platforms/Marvell/Library/MppLib/MppLib.inf create mode 100644 Platforms/Marvell/Library/ParsePcdLib/ParsePcdLib.c create mode 100644 Platforms/Marvell/Library/ParsePcdLib/ParsePcdLib.inf create mode 100644 Platforms/Marvell/Marvell.dec -- 1.8.3.1

7 years, 9 months

[PATCH] Platforms/ARM: Juno: PL011 PCD changes

by evan.lloyd＠arm.com

From: Sami Mujawar <sami.mujawar(a)arm.com> The generic PL011 driver has been updated to allow for UARTs on a board having different clock sources (as is the case on Juno). See "ArmPlatformPkg: Add support to configure PL011 UART clock" This change modifies the Juno code to use the new driver options. By replacing Pl011UartInteger with Pl011UartClKInHz, the driver can be used with different serial ports. This replaces an erroneous calculated value with a TRM defined clock rate. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar(a)arm.com> Signed-off-by: Evan Lloyd <evan.lloyd(a)arm.com> --- Notes: PL011_v2: - Commit message updated to clarify [Ryan Harking] PL011_v3: - No code update, just adding a link for Leif [Leif Lindholm] Code available at: https://github.com/EvanLloyd/OpenPlatformPkg/tree/PL011_v3 Platforms/ARM/Juno/ArmJuno.dsc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Platforms/ARM/Juno/ArmJuno.dsc b/Platforms/ARM/Juno/ArmJuno.dsc index 3626dfb6e5834f36d136214550ecfde7ed41e4e5..490e08eb9248a4c63ae4580a55037624be435d6c 100644 --- a/Platforms/ARM/Juno/ArmJuno.dsc +++ b/Platforms/ARM/Juno/ArmJuno.dsc @@ -122,8 +122,7 @@ [PcdsFixedAtBuild.common] gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF80000 gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0 - gArmPlatformTokenSpaceGuid.PL011UartInteger|4 - gArmPlatformTokenSpaceGuid.PL011UartFractional|0 + gArmPlatformTokenSpaceGuid.PL011UartClkInHz|7372800 gArmPlatformTokenSpaceGuid.PL011UartInterrupt|115 ## PL031 RealTimeClock -- Guid("CE165669-3EF3-493F-B85D-6190EE5B9759")

7 years, 9 months

[PATCH] Platforms/ARM/Juno: Acpi - fix GTDT.

by evan.lloyd＠arm.com

From: Sami Mujawar <sami.mujawar(a)arm.com> The wrong type name is used in the definition of the GTDT, causing the header to have an incorrect size value. EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE is changed to EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES to rectify this. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar(a)arm.com> Signed-off-by: Evan Lloyd <evan.lloyd(a)arm.com> --- Notes: GTDT_v3: - No code update, resubmit with Link [Leif Lindholm] Code available at: https://github.com/EvanLloyd/OpenPlatformPkg/tree/GTDT_v3 Platforms/ARM/Juno/AcpiTables/Gtdt.aslc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Platforms/ARM/Juno/AcpiTables/Gtdt.aslc b/Platforms/ARM/Juno/AcpiTables/Gtdt.aslc index c0e3f5fc11203ed4cc41dddf4aecb6dc600f38d0..1c258fcfe2489601a3fa55bbdddc5bff686b0c4a 100644 --- a/Platforms/ARM/Juno/AcpiTables/Gtdt.aslc +++ b/Platforms/ARM/Juno/AcpiTables/Gtdt.aslc @@ -1,7 +1,7 @@ /** @file * Generic Timer Description Table (GTDT) * -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved. +* Copyright (c) 2012 - 2016, ARM Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -70,7 +70,7 @@ { ARM_ACPI_HEADER( EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, - EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE, + EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES, EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION ), SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress -- Guid("CE165669-3EF3-493F-B85D-6190EE5B9759")

7 years, 9 months

[PATCH] Platforms/ARM: Fix FVP FADT version

by Graeme Gregory

MADT will now compile with v6.1 fields so we need to bump the FADT to indicate v6.1 compatability otherwise kernel will fail to parse MADT correctly and issue the error "No valid GICC entries exist". Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/facp.asl | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/facp.asl b/Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/facp.asl index c288ae2..b52413f 100644 --- a/Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/facp.asl +++ b/Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/facp.asl @@ -35,7 +35,7 @@ [0004] Signature : "FACP" [0004] Table Length : 0000010C -[0001] Revision : 05 +[0001] Revision : 06 [0001] Checksum : 18 [0006] Oem ID : "LINARO" [0008] Oem Table ID : "RTSMVEV8" @@ -195,3 +195,4 @@ [0001] Encoded Access Width : 01 [Byte Access:8] [0008] Address : 0000000000000000 +[0008] Hypervisor ID : 0000000000000000 -- 2.8.1

7 years, 9 months

[PATCH] Platforms/ARM/Juno/AcpiTables: Fix FADT Compilation Bug

by evan.lloyd＠arm.com

From: Alexei Fedorov <Alexei.Fedorov(a)arm.com> #if ARM_JUNO_ACPI_5_0 causes the GCC error listed below k:\edk2\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables\Fadt.aslc:76:22: error: #if with no expression when ARM_JUNO_ACPI_5_0 is defined in edk2\ArmPlatformPkg\ArmJunoPkg\Include\ArmPlatform.h: The problem occurs because the macro is defined but has no value. The bug is corrected by replacing #if ARM_JUNO_ACPI_5_0 with #ifdef ARM_JUNO_ACPI_5_0 This usage is also consistent with that on line 20 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Alexei Fedorov <Alexei.Fedorov(a)arm.com> Signed-off-by: Evan Lloyd <Evan.Lloyd(a)arm.com> --- Platforms/ARM/Juno/AcpiTables/Fadt.aslc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Platforms/ARM/Juno/AcpiTables/Fadt.aslc b/Platforms/ARM/Juno/AcpiTables/Fadt.aslc index eafdecb8aff74a1c5899fcf552d73fce1d0cad2b..6b756292bdd14de7585c9c792a42542b88eb865e 100644 --- a/Platforms/ARM/Juno/AcpiTables/Fadt.aslc +++ b/Platforms/ARM/Juno/AcpiTables/Fadt.aslc @@ -1,7 +1,7 @@ /** @file * Fixed ACPI Description Table (FADT) * -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved. +* Copyright (c) 2012 - 2016, ARM Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -72,7 +72,7 @@ EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = { EFI_ACPI_5_0_HW_REDUCED_ACPI | EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE, // UINT32 Flags NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg 0, // UINT8 ResetValue -#if ARM_JUNO_ACPI_5_0 +#ifdef ARM_JUNO_ACPI_5_0 {EFI_ACPI_RESERVED_BYTE,EFI_ACPI_RESERVED_BYTE,EFI_ACPI_RESERVED_BYTE}, // UINT8 Reserved2[3] #else EFI_ACPI_5_1_ARM_PSCI_COMPLIANT, // UINT16 ArmBootArchFlags -- Guid("CE165669-3EF3-493F-B85D-6190EE5B9759")

7 years, 9 months

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Linaro-uefi June 2016