Linaro-uefi April 2015

linaro-uefi@lists.linaro.org

12 participants
10 discussions

[PATCH] BaseTools: aarch64: add -fno-asynchronous-unwind-tables to cflags

by Leif Lindholm

Some toolchains, at least Fedora GCC, generate inline unwind tables in object files. These confuses GenFw to no end, leading to build failures: GenFw: ERROR 3000: Invalid WriteSections64(): ... unsupported ELF EM_AARCH64 relocation 0x105. GenFw: ERROR 3000: Invalid WriteSections64(): ... unsupported ELF EM_AARCH64 relocation 0x0. I am aware of no current use of these tables, so explicitly disable their generation for aarch64. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm(a)linaro.org> --- BaseTools/Conf/tools_def.template | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template index f008024..04fdeba 100644 --- a/BaseTools/Conf/tools_def.template +++ b/BaseTools/Conf/tools_def.template @@ -3817,7 +3817,7 @@ DEFINE GCC_IA32_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -m32 -malign-double - DEFINE GCC_X64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mno-red-zone -Wno-address -mno-stack-arg-probe DEFINE GCC_IPF_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -minline-int-divide-min-latency DEFINE GCC_ARM_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mword-relocations -mlittle-endian -mabi=aapcs -mapcs -fno-short-enums -save-temps -fsigned-char -ffunction-sections -fdata-sections -fomit-frame-pointer -Wno-address -mthumb -mfloat-abi=soft -DEFINE GCC_AARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mcmodel=large -mlittle-endian -fno-short-enums -save-temps -fverbose-asm -fsigned-char -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-builtin -Wno-address +DEFINE GCC_AARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mcmodel=large -mlittle-endian -fno-short-enums -save-temps -fverbose-asm -fsigned-char -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-builtin -Wno-address -fno-asynchronous-unwind-tables DEFINE GCC_DLINK_FLAGS_COMMON = -nostdlib --pie DEFINE GCC_IA32_X64_DLINK_COMMON = DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections DEFINE GCC_ARM_AARCH64_DLINK_COMMON= -Ttext=0x0 --emit-relocs -nostdlib --gc-sections -u $(IMAGE_ENTRY_POINT) -e $(IMAGE_ENTRY_POINT) -Map $(DEST_DIR_DEBUG)/$(BASE_NAME).map -- 2.1.3

8 years, 9 months

FastBoot: Add support for sparse images

by riku.voipio＠linaro.org

From: Riku Voipio <riku.voipio(a)linaro.org> For linaro-uefi: This patch is for Hikey - ArmVExpressFastBoot is obviously the wrong place to implement this, but something is needed now ;) As for proper implementation, it seems AndroidFastbootApp is the right place. This requires changing at least FASTBOOT_PLATFORM_FLASH, adding with a "offset" parameter. Since I'm new to the codebase and conventions, I don't think it make sense for me to try to fit the code for upstream, until I've got instructions from you UEFI team.. Particularly if ABI compatability is needed or it is ok to change the function parameters. Original commit comments: Adds support for current Fastboot Sparse images. Tested to be able to flash both a a small image (60MB) And a large 1.5GB image. The code in it's current form doesn't do many checks, so no defences against corrupt and bad images. That is on todo after the AndroidFastbootApp / ArmVExpressFastBoot code is clear. Cc: Zhangfei Gao <zhangfei.gao(a)linaro.org> Cc: Olivier Martin <olivier.martin(a)arm.com> Signed-off-by: Riku Voipio <riku.voipio(a)linaro.org> --- .../ArmVExpressFastBootDxe/ArmVExpressFastBoot.c | 58 ++++++++++++++++++++-- .../Include/Protocol/AndroidFastbootPlatform.h | 26 ++++++++++ 2 files changed, 81 insertions(+), 3 deletions(-) diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBoot.c b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBoot.c index d35ddab..8888dcd 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBoot.c +++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBoot.c @@ -319,6 +319,11 @@ ArmFastbootPlatformFlashPartition ( FASTBOOT_PARTITION_LIST *Entry; CHAR16 PartitionNameUnicode[60]; BOOLEAN PartitionFound; + SPARSE_HEADER *SparseHeader; + CHUNK_HEADER *ChunkHeader; + UINTN Offset = 0; + UINT32 Chunk; + AsciiStrToUnicodeStr (PartitionName, PartitionNameUnicode); @@ -350,6 +355,22 @@ ArmFastbootPlatformFlashPartition ( return EFI_NOT_FOUND; } + SparseHeader=(SPARSE_HEADER *)Image; + + if (SparseHeader->Magic == SPARSE_HEADER_MAGIC) { + DEBUG ((EFI_D_INFO, "Sparse Magic: 0x%x Major: %d Minor: %d fhs: %d chs: %d bs: %d tbs: %d tcs: %d checksum: %d \n", + SparseHeader->Magic, SparseHeader->MajorVersion, SparseHeader->MinorVersion, SparseHeader->FileHeaderSize, + SparseHeader->ChunkHeaderSize, SparseHeader->BlockSize, SparseHeader->TotalBlocks, + SparseHeader->TotalChunks, SparseHeader->ImageChecksum)); + if (SparseHeader->MajorVersion != 1) { + DEBUG ((EFI_D_ERROR, "Sparse image version %d.%d not supported.\n", + SparseHeader->MajorVersion, SparseHeader->MinorVersion)); + return EFI_INVALID_PARAMETER; + } + + Size = SparseHeader->BlockSize * SparseHeader->TotalBlocks; + } + // Check image will fit on device PartitionSize = (BlockIo->Media->LastBlock + 1) * BlockIo->Media->BlockSize; if (PartitionSize < Size) { @@ -371,9 +392,40 @@ ArmFastbootPlatformFlashPartition ( ); ASSERT_EFI_ERROR (Status); - Status = DiskIo->WriteDisk (DiskIo, MediaId, 0, Size, Image); - if (EFI_ERROR (Status)) { - return Status; + if (SparseHeader->Magic == SPARSE_HEADER_MAGIC) { + Image += SparseHeader->FileHeaderSize; + for (Chunk = 0; Chunk < SparseHeader->TotalChunks; Chunk++) { + UINTN WriteSize; + ChunkHeader = (CHUNK_HEADER *)Image; + DEBUG ((EFI_D_INFO, "Chunk #%d - Type: 0x%x Size: %d TotalSize: %d Offset %d\n", + (Chunk+1), ChunkHeader->ChunkType, ChunkHeader->ChunkSize, + ChunkHeader->TotalSize, Offset)); + Image += sizeof(CHUNK_HEADER); + WriteSize=(SparseHeader->BlockSize) * ChunkHeader->ChunkSize; + switch (ChunkHeader->ChunkType) { + case CHUNK_TYPE_RAW: + DEBUG ((EFI_D_INFO, "Writing %d at Offset %d\n", WriteSize, Offset)); + Status = DiskIo->WriteDisk (DiskIo, MediaId, Offset, WriteSize, Image); + if (EFI_ERROR (Status)) { + return Status; + } + Image+=WriteSize; + break; + case CHUNK_TYPE_DONT_CARE: + break; + case CHUNK_TYPE_CRC32: + break; + default: + DEBUG ((EFI_D_ERROR, "Unknown Chunk Type: 0x%x")); + return EFI_PROTOCOL_ERROR; + } + Offset += WriteSize; + } + } else { + Status = DiskIo->WriteDisk (DiskIo, MediaId, 0, Size, Image); + if (EFI_ERROR (Status)) { + return Status; + } } BlockIo->FlushBlocks(BlockIo); diff --git a/EmbeddedPkg/Include/Protocol/AndroidFastbootPlatform.h b/EmbeddedPkg/Include/Protocol/AndroidFastbootPlatform.h index a9b4aac..d0693c1 100644 --- a/EmbeddedPkg/Include/Protocol/AndroidFastbootPlatform.h +++ b/EmbeddedPkg/Include/Protocol/AndroidFastbootPlatform.h @@ -142,4 +142,30 @@ typedef struct _FASTBOOT_PLATFORM_PROTOCOL { FASTBOOT_PLATFORM_OEM_COMMAND DoOemCommand; } FASTBOOT_PLATFORM_PROTOCOL; +/* See sparse_format.h in AOSP */ +#define SPARSE_HEADER_MAGIC 0xed26ff3a +#define CHUNK_TYPE_RAW 0xCAC1 +#define CHUNK_TYPE_FILL 0xCAC2 +#define CHUNK_TYPE_DONT_CARE 0xCAC3 +#define CHUNK_TYPE_CRC32 0xCAC4 + +typedef struct _SPARSE_HEADER { + UINT32 Magic; + UINT16 MajorVersion; + UINT16 MinorVersion; + UINT16 FileHeaderSize; + UINT16 ChunkHeaderSize; + UINT32 BlockSize; + UINT32 TotalBlocks; + UINT32 TotalChunks; + UINT32 ImageChecksum; +} SPARSE_HEADER; + +typedef struct _CHUNK_HEADER { + UINT16 ChunkType; + UINT16 Reserved1; + UINT32 ChunkSize; + UINT32 TotalSize; +} CHUNK_HEADER; + #endif -- 2.1.4

8 years, 10 months

[PATCH 0/5]arm64: Add multiboot support (via fdt) for Xen boot

by Fu Wei

- This multiboot support is built into linux module for aarch64. - The implementation for Xen is following <Multiboot on ARM Specification>: http://wiki.xen.org/wiki/Xen_ARM_with_Virtualization_Extensions/Multiboot and xen/docs/misc/arm/device-tree/booting.txt in Xen source code. - The example of this support is <How to boot Xen with GRUB on AArch64 the Foundation FVP model> https://wiki.linaro.org/LEG/Engineering/Grub2/Xen_booting_on_Foundation_FVP… - This adds support for the Xen Multiboot on ARM specification for arm64, enabling config file portability across the architectures. - The multiboot command is currently x86-only, so reusing these command names should not conflict with any future additions of ARM support to multiboot2. - The reason of adding this functionality to the existing "linux" module rather than "multiboot(2)" (1)multiboot is x86 only (2)Multiboot is added to "linux" module because it reuses existing code. - Some changes in original linux module code Move some #define from grub-core/loader/arm64/linux.c to include/grub/arm64/linux.h Make some shared functions for multiboot.c Remove "loaded" checking in the grub_cmd_devicetree of linux.c - Add grub_fdt_set_reg64 macro into fdt.h header file for inserting "reg" properiy, while #address-cells = <0x2> and #size-cells = <0x2> - Add the introduction of multiboot/module command in docs/grub.texi This multiboot support will be built in linux module for aarch64, and can not be used alone. docs/grub.texi | 10 + grub-core/Makefile.core.def | 1 + grub-core/loader/arm64/linux.c | 72 ++--- grub-core/loader/arm64/multiboot.c | 593 +++++++++++++++++++++++++++++++++++++ include/grub/arm64/linux.h | 11 + include/grub/arm64/multiboot.h | 115 +++++++ include/grub/fdt.h | 12 + 7 files changed, 778 insertions(+), 36 deletions(-) create mode 100644 grub-core/loader/arm64/multiboot.c create mode 100644 include/grub/arm64/multiboot.h Signed-off-by: Fu Wei <fu.wei(a)linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm(a)linaro.org> -- 1.8.3.1

8 years, 11 months

[PATCH v3] ArmPlatformPkg: fix gtdt.asl for ArmVExpressPkg

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> Add Memory-mapped GT and SBSA Generic Watchdog timer info base on Foundation Model Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Wei <fu.wei(a)linaro.org> --- .../AcpiTables/rtsm_ve-aemv8a/gtdt.asl | 67 +++++++++++++++++----- 1 file changed, 53 insertions(+), 14 deletions(-) diff --git a/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl b/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl index d304243..11d5f89 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl +++ b/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl @@ -36,16 +36,16 @@ */ [0004] Signature : "GTDT" -[0004] Table Length : 00000050 +[0004] Table Length : 000000D8 [0001] Revision : 02 [0001] Checksum : F1 [0006] Oem ID : "LINARO" [0008] Oem Table ID : "RTSMVEV8" -[0004] Oem Revision : 00000001 +[0004] Oem Revision : 00000002 [0004] Asl Compiler ID : "INTL" [0004] Asl Compiler Revision : 20110623 -[0008] Counter Block Address : 0000000000000000 +[0008] Counter Block Address : 000000002a430000 [0004] Reserved : 00000000 /* In RTSM model's dts file, the last cell of interrupts @@ -83,26 +83,35 @@ Always-on : 0 /* The 64-bit physical address at which the Counter Read block is located */ -[0008] CntReadBase Physical address : 0000000000000000 +[0008] CntReadBase Physical address : 000000002a800000 -[0004] Platform Timer Count : 00000001 -[0004] Platform Timer Offset : 0000005C +[0004] Platform Timer Count : 00000002 +[0004] Platform Timer Offset : 00000060 /* Memory-mapped GT (Generic Timer) structures */ [0001] Subtable Type : 00 [0002] Length : 0064 [0001] Reserved : 000000 [0008] Block Address : 000000002a810000 -[0004] Timer Count : 00000001 -[0004] Timer Offset : 00000010 +[0004] Timer Count : 00000002 +[0004] Timer Offset : 00000014 -/* One frame is available */ +/* Two frames are available + * In FVP base model's dts file, the last cell of interrupts + * is 0x04, it means its trigger type is 4 = active high level-sensitive. + * + * So in ACPI the Trigger Mode is 0 - Level triggered, and + * Polarity is 0 - Active high as ACPI spec describled. + * + * Using direct mapping for hwirqs, it means that we using IRQ ID: + * (SPI offset + 32), not SPI offset used in FDT. + */ [0001] Frame Number : 00 [0003] Reserved : 000000 [0008] Base Address : 000000002a820000 -[0008] EL0 Base Address : FFFFFFFFFFFFFFFF -[0004] Timer Interrupt : 00000029 /* 25+16 */ -[0004] Timer Flags (decoded below) : 00000000 /* Active high level-sensitive */ +[0008] EL0 Base Address : 000000002a820000 +[0004] Timer Interrupt : 00000039 /* 25(SPI)+32 */ +[0004] Timer Flags (decoded below) : 00000000 Trigger Mode : 0 Polarity : 0 /* No virtual timer */ @@ -110,7 +119,37 @@ [0004] Virtual Timer Flags (decoded below) : 00000000 Trigger Mode : 0 Polarity : 0 -[0004] Common Flags (decoded below) : 00000000 - Secure : 0 +/* CNTPSIRQ Secure physical timer event.*/ +[0004] Common Flags (decoded below) : 00000001 + Secure : 1 + Always On : 0 + +[0001] Frame Number : 01 +[0003] Reserved : 000000 +[0008] Base Address : 000000002a830000 +[0008] EL0 Base Address : 000000002a830000 +[0004] Timer Interrupt : 0000003A /* 26(SPI)+32 */ +[0004] Timer Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 +/* No virtual timer */ +[0004] Virtual Timer Interrupt : 00000000 +[0004] Virtual Timer Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 +/* CNTPSIRQ1 Secure physical timer event.*/ +[0004] Common Flags (decoded below) : 00000001 + Secure : 1 Always On : 0 +/* One EL2 SBSA Generic Watchdog timer is available */ +[0001] Subtable Type : 01 [SBSA Generic Watchdog] +[0001] Length : 1C +[0002] Reserved : 0000 +[0008] Refresh Frame Address : 000000002a450000 +[0008] Control Frame Address : 000000002a440000 +[0004] Timer Interrupt : 0000003B /* 27(SPI)+32 */ +[0004] Timer Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + Secure : 0 -- 1.8.3.1

8 years, 11 months

State of EDK2 on beaglebone black

by Roy Franz

Hi Leif, Is the beaglebone black EDK2 port in reasonable shape? If so I want to try Ard's new 32 bit EFI stub update a try on that. Thanks, Roy

8 years, 11 months

[PATCH 0/8] Updated EFI support for 32-bit ARM

by Ard Biesheuvel

Hi all, Yesterday and this morning, I had a go at bringing the 32-bit ARM EFI support in line with the current arm64 upstream code. I have reshuffled a lot of Roy's code, mainly so that the remaining delta against the ARM tree is as small as possible, and keeps out of existing early init code as much as possible. I have not reused any of the existing 32-bit runtime services code. I did not use the early ioremap support but instead refactored the existing init code lightly so that we can use two adjacent fixmap slots instead. This mostly works, but there are (at least) two issues that need resolving: - LPAE support builds but doesn't run - the EFI page tables are clobbered at some point in the execution -> note in the log below that the RTC efi is read successfully once, but later on (when invoked by hwclock from userland), the page table entries have been cleared I don't intend to burn a lot of time on this but it may be worthwile to run this on a model (with better watchpoint support) to figure out what is going on with the page tables. Not today though .... Ard Biesheuvel (7): efi: avoid initialized .data in the EFI stub efi: build efi_config_init() only if CONFIG_EARLY_IOREMAP arm64/efi: split off EFI init and runtime code for reuse by 32-bit ARM arm64/efi: refactor EFI init and runtime code for reuse by 32-bit ARM ARM: move fixmap init before memblock init and use static allocation ARM: split off core code from create_mapping() for EFI reuse ARM: add UEFI support Roy Franz (1): ARM: add strstr and strncmp to compressed string.c arch/arm/Kconfig | 19 ++ arch/arm/boot/compressed/.gitignore | 2 + arch/arm/boot/compressed/Makefile | 18 +- arch/arm/boot/compressed/efi-header.S | 141 +++++++++++ arch/arm/boot/compressed/efi-stub.c | 89 +++++++ arch/arm/boot/compressed/head.S | 66 ++++- arch/arm/boot/compressed/string.c | 43 ++++ arch/arm/include/asm/efi.h | 135 ++++++++++ arch/arm/include/asm/fixmap.h | 4 + arch/arm/include/asm/mach/map.h | 1 + arch/arm/kernel/setup.c | 5 + arch/arm/mm/mmu.c | 68 +++-- arch/arm64/include/asm/efi.h | 29 +++ arch/arm64/kernel/efi.c | 330 +------------------------ drivers/firmware/efi/Makefile | 4 + drivers/firmware/efi/arm-init.c | 212 ++++++++++++++++ drivers/firmware/efi/arm-runtime.c | 142 +++++++++++ drivers/firmware/efi/efi.c | 2 + drivers/firmware/efi/libstub/efi-stub-helper.c | 8 +- 19 files changed, 952 insertions(+), 366 deletions(-) create mode 100644 arch/arm/boot/compressed/efi-header.S create mode 100644 arch/arm/boot/compressed/efi-stub.c create mode 100644 arch/arm/include/asm/efi.h create mode 100644 drivers/firmware/efi/arm-init.c create mode 100644 drivers/firmware/efi/arm-runtime.c -- EFI stub: Booting Linux Kernel... EFI stub: Using DTB from configuration table EFI stub: Exiting boot services and installing virtual address map... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 4.1.0-rc1-00008-gb6fc321f4ca5-dirty (ard@ards-macbook-pro) (gcc version 4.9.1 20140529 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.06 - Linaro GCC 4.9-2014.06) ) #124 SMP Wed Apr 29 13:28:54 CEST 2015 [ 0.000000] CPU: ARMv7 Processor [412fc0f1] revision 1 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: linux,dummy-virt [ 0.000000] earlycon: no match for ttyAMA0 [ 0.000000] efi: Getting EFI parameters from FDT: [ 0.000000] efi: System Table: 0x000000007fc25010 [ 0.000000] efi: MemMap Address: 0x0000000076b20010 [ 0.000000] efi: MemMap Size: 0x00000540 [ 0.000000] efi: MemMap Desc. Size: 0x00000030 [ 0.000000] efi: MemMap Desc. Version: 0x00000001 [ 0.000000] Processing EFI memory map: [ 0.000000] 0x000040000000-0x0000425f5fff [Loader Data | | | | | |WB|WT|WC|UC] [ 0.000000] 0x0000425f6000-0x000047fedfff [Conventional Memory| | | | | |WB|WT|WC|UC] [ 0.000000] 0x000047fee000-0x000047ffffff [Loader Data | | | | | |WB|WT|WC|UC] [ 0.000000] 0x000048000000-0x000076b1ffff [Conventional Memory| | | | | |WB|WT|WC|UC] [ 0.000000] 0x000076b20000-0x000076b21fff [Loader Data | | | | | |WB|WT|WC|UC] [ 0.000000] 0x000076b22000-0x000077116fff [Loader Code | | | | | |WB|WT|WC|UC] [ 0.000000] 0x000077117000-0x00007711afff [Reserved | | | | | |WB|WT|WC|UC]* [ 0.000000] 0x00007711b000-0x00007711cfff [ACPI Reclaim Memory| | | | | |WB|WT|WC|UC]* [ 0.000000] 0x00007711d000-0x0000771dffff [Runtime Data |RUN| | | | |WB|WT|WC|UC]* [ 0.000000] 0x0000771e0000-0x000079e6bfff [Conventional Memory| | | | | |WB|WT|WC|UC] [ 0.000000] 0x000079e6c000-0x00007a59cfff [Boot Data | | | | | |WB|WT|WC|UC] [ 0.000000] 0x00007a59d000-0x00007a63afff [Conventional Memory| | | | | |WB|WT|WC|UC] [ 0.000000] 0x00007a63b000-0x00007babbfff [Boot Data | | | | | |WB|WT|WC|UC] [ 0.000000] 0x00007babc000-0x00007bb0afff [Conventional Memory| | | | | |WB|WT|WC|UC] [ 0.000000] 0x00007bb0b000-0x00007bb19fff [Boot Data | | | | | |WB|WT|WC|UC] [ 0.000000] 0x00007bb1a000-0x00007bb1efff [Conventional Memory| | | | | |WB|WT|WC|UC] [ 0.000000] 0x00007bb1f000-0x00007c01ffff [Boot Data | | | | | |WB|WT|WC|UC] [ 0.000000] 0x00007c020000-0x00007fabefff [Conventional Memory| | | | | |WB|WT|WC|UC] [ 0.000000] 0x00007fabf000-0x00007fbc7fff [Boot Code | | | | | |WB|WT|WC|UC] [ 0.000000] 0x00007fbc8000-0x00007fbdbfff [Runtime Code |RUN| | | | |WB|WT|WC|UC]* [ 0.000000] 0x00007fbdc000-0x00007fc0dfff [Runtime Data |RUN| | | | |WB|WT|WC|UC]* [ 0.000000] 0x00007fc0e000-0x00007fc0ffff [Boot Data | | | | | |WB|WT|WC|UC] [ 0.000000] 0x00007fc10000-0x00007fc23fff [Conventional Memory| | | | | |WB|WT|WC|UC] [ 0.000000] 0x00007fc24000-0x00007fc24fff [Boot Data | | | | | |WB|WT|WC|UC] [ 0.000000] 0x00007fc25000-0x00007fc25fff [Runtime Data |RUN| | | | |WB|WT|WC|UC]* [ 0.000000] 0x00007fc26000-0x00007fffffff [Boot Data | | | | | |WB|WT|WC|UC] [ 0.000000] 0x000004000000-0x000007ffffff [Memory Mapped I/O |RUN| | | | | | | |UC] [ 0.000000] 0x000009010000-0x000009010fff [Memory Mapped I/O |RUN| | | | | | | |UC] [ 0.000000] EFI v2.40 by EDK II [ 0.000000] efi: [ 0.000000] cma: Reserved 64 MiB at 0x7b800000 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv0.2 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] PERCPU: Embedded 12 pages/cpu @eefe3000 s16960 r8192 d24000 u49152 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260624 [ 0.000000] Kernel command line: console=ttyAMA0 uefi_debug root=/dev/vda2 [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 958824K/1048576K available (8132K kernel code, 967K rwdata, 3688K rodata, 828K init, 321K bss, 24216K reserved, 65536K cma-reserved, 203708K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0000000 - 0xff000000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xef800000 ( 760 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0208000 - 0xc0d940e0 (11825 kB) [ 0.000000] .init : 0xc0d95000 - 0xc0e64000 ( 828 kB) [ 0.000000] .data : 0xc0e64000 - 0xc0f55f40 ( 968 kB) [ 0.000000] .bss : 0xc0f58000 - 0xc0fa86d8 ( 322 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] Hierarchical RCU implementation. [ 0.000000] Additional per-CPU info printed with stalls. [ 0.000000] RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=1. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1 [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] Architected cp15 timer(s) running at 62.50MHz (virt). [ 0.000000] clocksource arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x1cd42e208c, max_idle_ns: 881590405314 ns [ 0.000118] sched_clock: 56 bits at 62MHz, resolution 16ns, wraps every 4398046511096ns [ 0.000226] Switching to timer-based delay loop, resolution 16ns [ 0.002942] Console: colour dummy device 80x30 [ 0.003398] Calibrating delay loop (skipped), value calculated using timer frequency.. 125.00 BogoMIPS (lpj=312500) [ 0.003518] pid_max: default: 32768 minimum: 301 [ 0.006917] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.006955] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.014326] CPU: Testing write buffer coherency: ok [ 0.020134] /cpus/cpu@0 missing clock-frequency property [ 0.020346] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.020922] Setting up static identity map for 0x40209000 - 0x40209098 [ 0.028361] Brought up 1 CPUs [ 0.028426] SMP: Total of 1 processors activated (125.00 BogoMIPS). [ 0.028474] CPU: All CPU(s) started in SVC mode. [ 0.036288] devtmpfs: initialized [ 0.040769] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.053306] clocksource jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 9556302231375000 ns [ 0.064590] pinctrl core: initialized pinctrl subsystem [ 0.080529] NET: Registered protocol family 16 [ 0.087570] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.091747] cpuidle: using governor ladder [ 0.091877] cpuidle: using governor menu [ 0.091935] Remapping and enabling EFI services. [ 0.092255] EFI remap 0x7711d000 => 4000d000 [ 0.092976] EFI remap 0x7fbc8000 => 400d8000 [ 0.093004] EFI remap 0x7fbdc000 => 400fc000 [ 0.093024] EFI remap 0x7fc25000 => 40135000 [ 0.093039] EFI remap 0x04000000 => 40200000 [ 0.093110] EFI remap 0x09010000 => 44200000 [ 0.113384] No ATAGs? [ 0.113803] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.113892] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.119299] Serial: AMBA PL011 UART driver [ 0.120749] 9000000.pl011: ttyAMA0 at MMIO 0x9000000 (irq = 52, base_baud = 0) is a PL011 rev1 [ 0.139298] console [ttyAMA0] enabled [ 0.233516] vgaarb: loaded [ 0.239868] SCSI subsystem initialized [ 0.244809] usbcore: registered new interface driver usbfs [ 0.245706] usbcore: registered new interface driver hub [ 0.246613] usbcore: registered new device driver usb [ 0.253095] media: Linux media interface: v0.10 [ 0.253947] Linux video capture interface: v2.00 [ 0.254678] pps_core: LinuxPPS API ver. 1 registered [ 0.255062] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti(a)linux.it> [ 0.255873] PTP clock support registered [ 0.257389] EDAC MC: Ver: 3.0.0 [ 0.265252] Advanced Linux Sound Architecture Driver Initialized. [ 0.282630] Switched to clocksource arch_sys_counter [ 0.332666] NET: Registered protocol family 2 [ 0.341082] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.342231] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.343018] TCP: Hash tables configured (established 8192 bind 8192) [ 0.344267] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.344795] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.347463] NET: Registered protocol family 1 [ 0.352278] RPC: Registered named UNIX socket transport module. [ 0.352676] RPC: Registered udp transport module. [ 0.352960] RPC: Registered tcp transport module. [ 0.353230] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.373238] futex hash table entries: 256 (order: 2, 16384 bytes) [ 0.420563] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.425328] NFS: Registering the id_resolver key type [ 0.426767] Key type id_resolver registered [ 0.427035] Key type id_legacy registered [ 0.427812] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.438395] bounce: pool size: 64 pages [ 0.439517] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 248) [ 0.440019] io scheduler noop registered [ 0.440277] io scheduler deadline registered [ 0.441080] io scheduler cfq registered (default) [ 0.463911] PCI host bridge /pcie@10000000 ranges: [ 0.464611] IO 0x3eff0000..0x3effffff -> 0x00000000 [ 0.465131] MEM 0x10000000..0x3efeffff -> 0x10000000 [ 0.468035] pci-host-generic 3f000000.pcie: PCI host bridge to bus 0000:00 [ 0.468773] pci_bus 0000:00: root bus resource [bus 00-0f] [ 0.469124] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.469463] pci_bus 0000:00: root bus resource [mem 0x10000000-0x3efeffff] [ 0.472424] pci 0000:00:00.0: IOMMU is currently not supported for PCI [ 0.474335] PCI: bus0: Fast back to back transfers disabled [ 0.632744] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled [ 0.636742] SuperH (H)SCI(F) driver initialized [ 0.638086] msm_serial: driver initialized [ 0.639063] STMicroelectronics ASC driver initialized [ 0.641720] [drm] Initialized drm 1.1.0 20060810 [ 0.659210] loop: module loaded [ 0.674291] vda: vda1 vda2 [ 0.689435] CAN device driver interface [ 0.691055] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.2.15-k [ 0.691280] igb: Copyright (c) 2007-2014 Intel Corporation. [ 0.694341] pegasus: v0.9.3 (2013/04/25), Pegasus/Pegasus II USB Ethernet driver [ 0.694655] usbcore: registered new interface driver pegasus [ 0.694987] usbcore: registered new interface driver asix [ 0.695260] usbcore: registered new interface driver ax88179_178a [ 0.695545] usbcore: registered new interface driver cdc_ether [ 0.695860] usbcore: registered new interface driver smsc75xx [ 0.696165] usbcore: registered new interface driver smsc95xx [ 0.696563] usbcore: registered new interface driver net1080 [ 0.696881] usbcore: registered new interface driver cdc_subset [ 0.697179] usbcore: registered new interface driver zaurus [ 0.697529] usbcore: registered new interface driver cdc_ncm [ 0.701287] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 0.701882] ehci-pci: EHCI PCI platform driver [ 0.702229] ehci-platform: EHCI generic platform driver [ 0.702671] ehci-omap: OMAP-EHCI Host Controller driver [ 0.703101] ehci-orion: EHCI orion driver [ 0.703434] SPEAr-ehci: EHCI SPEAr driver [ 0.703766] ehci-st: EHCI STMicroelectronics driver [ 0.704114] ehci-exynos: EHCI EXYNOS driver [ 0.704610] tegra-ehci: Tegra EHCI driver [ 0.705215] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver [ 0.705714] ohci-pci: OHCI PCI platform driver [ 0.706201] ohci-platform: OHCI generic platform driver [ 0.706838] ohci-omap3: OHCI OMAP3 driver [ 0.707191] SPEAr-ohci: OHCI SPEAr driver [ 0.707534] ohci-st: OHCI STMicroelectronics driver [ 0.708011] usbcore: registered new interface driver usb-storage [ 0.710715] mousedev: PS/2 mouse device common for all mice [ 0.715348] pgd = ee0a8000 [ 0.715530] [40135fa8] *pgd=6eff0801, *pte=7fc2565f, *ppte=7fc2545f [ 0.717378] pgd = c0204000 [ 0.717569] [40135fa8] *pgd=00000000 [ 0.718496] pgd = ee0a8000 [ 0.718662] [40135fa8] *pgd=6eff0801, *pte=7fc2565f, *ppte=7fc2545f [ 0.719064] pgd = c0204000 [ 0.719229] [40135fa8] *pgd=00000000 [ 0.720592] rtc-efi rtc-efi: rtc core: registered rtc-efi as rtc0 [ 0.725523] i2c /dev entries driver [ 0.730382] usbcore: registered new interface driver uvcvideo [ 0.730574] USB Video Class driver (1.1.1) [ 0.730722] gspca_main: v2.14.0 registered [ 0.738884] sdhci: Secure Digital Host Controller Interface driver [ 0.739077] sdhci: Copyright(c) Pierre Ossman [ 0.741055] Synopsys Designware Multimedia Card Interface Driver [ 0.742779] sdhci-pltfm: SDHCI platform and OF driver helper [ 0.745151] ledtrig-cpu: registered to indicate activity on CPUs [ 0.745887] usbcore: registered new interface driver usbhid [ 0.746056] usbhid: USB HID core driver [ 0.752141] usbcore: registered new interface driver snd-usb-audio [ 0.757717] NET: Registered protocol family 17 [ 0.757962] can: controller area network core (rev 20120528 abi 9) [ 0.758407] NET: Registered protocol family 29 [ 0.758597] can: raw protocol (rev 20120528) [ 0.758793] can: broadcast manager protocol (rev 20120528 t) [ 0.759009] can: netlink gateway (rev 20130117) max_hops=1 [ 0.760727] Key type dns_resolver registered [ 0.761485] ThumbEE CPU extension supported. [ 0.761804] Registering SWP/SWPB emulation handler [ 0.769849] pgd = ee0a8000 [ 0.770038] [40135fa8] *pgd=6eff0801, *pte=7fc2565f, *ppte=7fc2545f [ 0.771889] rtc-efi rtc-efi: setting system clock to 2015-04-29 11:29:27 UTC (1430306967) [ 0.773564] ALSA device list: [ 0.773716] No soundcards found. [ 0.776119] uart-pl011 9000000.pl011: no DMA platform data [ 0.780952] EXT4-fs (vda2): couldn't mount as ext3 due to feature incompatibilities [ 0.782820] EXT4-fs (vda2): couldn't mount as ext2 due to feature incompatibilities [ 0.785690] EXT4-fs (vda2): INFO: recovery required on readonly filesystem [ 0.785914] EXT4-fs (vda2): write access will be enabled during recovery [ 0.818639] EXT4-fs (vda2): recovery complete [ 0.823286] EXT4-fs (vda2): mounted filesystem with ordered data mode. Opts: (null) [ 0.824828] VFS: Mounted root (ext4 filesystem) readonly on device 254:2. [ 0.829458] devtmpfs: mounted [ 0.850536] Freeing unused kernel memory: 828K (c0d95000 - c0e64000) INIT: version 2.88 booting Error opening /dev/fb0: No such file or directory Starting udev [ 2.201880] udevd[65]: starting version 182 [ 9.722297] FAT-fs (vda1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ 9.968052] EXT4-fs (vda2): re-mounted. Opts: data=ordered [ 10.346751] random: dd urandom read with 9 bits of entropy available Populating dev cache [ 13.790965] pgd = ee0a8000 [ 13.791126] [40135fa8] *pgd=6eff0801, *pte=00000000, *ppte=00000000 [ 13.791581] Unable to handle kernel paging request at virtual address 40135fa8 [ 13.791820] pgd = ed170000 [ 13.791925] [40135fa8] *pgd=00000000 [ 13.792281] Internal error: Oops: 7 [#1] SMP ARM [ 13.792553] Modules linked in: [ 13.792879] CPU: 0 PID: 308 Comm: hwclock Not tainted 4.1.0-rc1-00008-gb6fc321f4ca5-dirty #124 [ 13.793144] Hardware name: Generic DT based system [ 13.793355] task: ed03d300 ti: ed252000 task.ti: ed252000 [ 13.793607] PC is at virt_efi_get_time+0x4c/0x88 [ 13.793794] LR is at broadcast_tlb_a15_erratum+0x1c/0x3c [ 13.793985] pc : [<c0851a58>] lr : [<c0216ca8>] psr: 60060093 [ 13.793985] sp : ed253e68 ip : 00000000 fp : 00000000 [ 13.794328] r10: 00000000 r9 : ed252000 r8 : ed253e84 [ 13.794508] r7 : 40060013 r6 : ed253e90 r5 : c0f9be08 r4 : c0f9be04 [ 13.794718] r3 : 40135f90 r2 : 00000000 r1 : ed253e84 r0 : ed253e90 [ 13.794982] Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment user [ 13.795221] Control: 10c5387d Table: 6e0a806a DAC: 00000015 [ 13.795425] Process hwclock (pid: 308, stack limit = 0xed252220) [ 13.795646] Stack: (0xed253e68 to 0xed254000) [ 13.795903] 3e60: ed253ed4 c0f0a158 ee389800 bed83c34 c0ab1b20 c07baadc [ 13.796169] 3e80: ee002d00 ed08ef00 ed253ef0 c03154a4 ed253eac ed0c3080 00000000 ed0c9a50 [ 13.796426] 3ea0: ed253fb0 ee389994 ed253ed4 c07b6d68 ee389800 ee389998 ed253ed4 c07b6dbc [ 13.796684] 3ec0: ee389800 80247009 ee389998 c07b8048 ed0e0000 00000000 00000000 00000000 [ 13.796937] 3ee0: 00000000 00000000 00000000 00000000 00000000 00000000 b37f1802 00000004 [ 13.797191] 3f00: ed14e540 000a7cf8 00000000 ed8256e8 ee38abe8 00000101 00000004 0000004a [ 13.797446] 3f20: ee38abe8 bed83c34 ed08ef00 00000003 bed83c34 c0318944 00000000 00000000 [ 13.797701] 3f40: 00020000 00000003 00000003 ed08ef00 ed0e0000 ee38abe8 ed08ef08 00000020 [ 13.797953] 3f60: 00000000 c03075fc 00000000 00000000 00000000 ed08ef00 00000003 ed08ef00 [ 13.798209] 3f80: 80247009 bed83c34 ed252000 c0318b6c 00094500 00000003 00000002 00000036 [ 13.798464] 3fa0: c0210784 c0210600 00094500 00000003 00000003 80247009 bed83c34 00094500 [ 13.798720] 3fc0: 00094500 00000003 00000002 00000036 00000000 00000000 000a7cf8 00000000 [ 13.798984] 3fe0: b6e2e8a0 bed83bfc 00019538 b6e2e8ac 60060010 00000003 6f7fd821 6f7fdc21 [ 13.799397] [<c0851a58>] (virt_efi_get_time) from [<c07baadc>] (efi_read_time+0x28/0x74) [ 13.799709] [<c07baadc>] (efi_read_time) from [<c07b6d68>] (__rtc_read_time.isra.3+0x48/0x6c) [ 13.799986] [<c07b6d68>] (__rtc_read_time.isra.3) from [<c07b6dbc>] (rtc_read_time+0x30/0x44) [ 13.800237] [<c07b6dbc>] (rtc_read_time) from [<c07b8048>] (rtc_dev_ioctl+0x328/0x5b0) [ 13.800481] [<c07b8048>] (rtc_dev_ioctl) from [<c0318944>] (do_vfs_ioctl+0x418/0x60c) [ 13.800755] [<c0318944>] (do_vfs_ioctl) from [<c0318b6c>] (SyS_ioctl+0x34/0x5c) [ 13.800991] [<c0318b6c>] (SyS_ioctl) from [<c0210600>] (ret_fast_syscall+0x0/0x34) [ 13.801370] Code: e1a01008 e5933000 e1a00006 e5933038 (e5933018) [ 13.801783] ---[ end trace d5b7f564e6da9c28 ]---

8 years, 11 months

[PATCHv2 0/2] Add SPCR/DBG2 tables for kernel testing/debug

by Graeme Gregory

These patches add the DBG2/SPCR tables for FVP/Juno for kernel testing. They allow a kernel to find a serial console without console= line. They have been tested using the Redhat patches for SPCR support which are work in progress! Thanks Changes since v1 Ryan pointed out I had used RTSM in the JUNO tables - fixed.

9 years

UEFI on KVM fails to start on juno on cortex-a57 cluster

by Riku Voipio

Hi, It appears on juno, I can start kvm with UEFI only on cortex-a53 cores: taskset -c 0 qemu-system-aarch64 -m 1024 -cpu host -M virt -bios QEMU_EFI.fd -enable-kvm -nographic -> works: UEFI Interactive Shell v2.0 taskset -c 1 qemu-system-aarch64 -m 1024 -cpu host -M virt -bios QEMU_EFI.fd -enable-kvm -nographic -> hangs at cpu spinning 100% ... Qemu and kernel are latest mainline, kvm from last months Ĺinaro release. According to cpuinfo cores 0 and 3-5 are a53 and 1-2 are a57. Details: # wget http://releases.linaro.org/15.01/components/kernel/uefi-linaro/release/qemu… uname -a # Linux linaro-nano 4.0.0-rc5-linaro-juno #1 SMP PREEMPT Tue Mar 24 10:46:53 UTC 2015 aarch64 aarch64 aarch64 GNU/Linux # qemu-system-aarch64 --version QEMU emulator version 2.2.91 (Debian 2.3.0~rc1-185linaro+utopic), Copyright (c) 2003-2008 Fabrice Bellard # grep -E '(processor|part)' /proc/cpuinfo processor : 0 CPU part : 0xd03 processor : 1 CPU part : 0xd07 processor : 2 CPU part : 0xd07 processor : 3 CPU part : 0xd03 processor : 4 CPU part : 0xd03 processor : 5 CPU part : 0xd03

9 years

[PATCH v2] ArmPlatformPkg: fix gtdt.asl for ArmVExpressPkg

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> Add Memory-mapped GT and SBSA Generic Watchdog timer info base on Foundation Model Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Wei <fu.wei(a)linaro.org> --- .../AcpiTables/rtsm_ve-aemv8a/gtdt.asl | 67 +++++++++++++++++----- 1 file changed, 53 insertions(+), 14 deletions(-) diff --git a/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl b/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl index d304243..11d5f89 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl +++ b/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl @@ -36,16 +36,16 @@ */ [0004] Signature : "GTDT" -[0004] Table Length : 00000050 +[0004] Table Length : 000000D8 [0001] Revision : 02 [0001] Checksum : F1 [0006] Oem ID : "LINARO" [0008] Oem Table ID : "RTSMVEV8" -[0004] Oem Revision : 00000001 +[0004] Oem Revision : 00000002 [0004] Asl Compiler ID : "INTL" [0004] Asl Compiler Revision : 20110623 -[0008] Counter Block Address : 0000000000000000 +[0008] Counter Block Address : 000000002a430000 [0004] Reserved : 00000000 /* In RTSM model's dts file, the last cell of interrupts @@ -83,26 +83,35 @@ Always-on : 0 /* The 64-bit physical address at which the Counter Read block is located */ -[0008] CntReadBase Physical address : 0000000000000000 +[0008] CntReadBase Physical address : 000000002a800000 -[0004] Platform Timer Count : 00000001 -[0004] Platform Timer Offset : 0000005C +[0004] Platform Timer Count : 00000002 +[0004] Platform Timer Offset : 00000060 /* Memory-mapped GT (Generic Timer) structures */ [0001] Subtable Type : 00 [0002] Length : 0064 [0001] Reserved : 000000 [0008] Block Address : 000000002a810000 -[0004] Timer Count : 00000001 -[0004] Timer Offset : 00000010 +[0004] Timer Count : 00000002 +[0004] Timer Offset : 00000014 -/* One frame is available */ +/* Two frames is available + * In FVP base model's dts file, the last cell of interrupts + * is 0x04, it means its trigger type is 4 = active high level-sensitive. + * + * So in ACPI the Trigger Mode is 0 - Level triggered, and + * Polarity is 0 - Active high as ACPI spec describled. + * + * Using direct mapping for hwirqs, it means that we using IRQ ID: + * (SPI offset + 32), not SPI offset used in FDT. + */ [0001] Frame Number : 00 [0003] Reserved : 000000 [0008] Base Address : 000000002a820000 -[0008] EL0 Base Address : FFFFFFFFFFFFFFFF -[0004] Timer Interrupt : 00000029 /* 25+16 */ -[0004] Timer Flags (decoded below) : 00000000 /* Active high level-sensitive */ +[0008] EL0 Base Address : 000000002a820000 +[0004] Timer Interrupt : 00000039 /* 25(SPI)+32 */ +[0004] Timer Flags (decoded below) : 00000000 Trigger Mode : 0 Polarity : 0 /* No virtual timer */ @@ -110,7 +119,37 @@ [0004] Virtual Timer Flags (decoded below) : 00000000 Trigger Mode : 0 Polarity : 0 -[0004] Common Flags (decoded below) : 00000000 - Secure : 0 +/* CNTPSIRQ Secure physical timer event.*/ +[0004] Common Flags (decoded below) : 00000001 + Secure : 1 + Always On : 0 + +[0001] Frame Number : 01 +[0003] Reserved : 000000 +[0008] Base Address : 000000002a830000 +[0008] EL0 Base Address : 000000002a830000 +[0004] Timer Interrupt : 0000003A /* 26(SPI)+32 */ +[0004] Timer Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 +/* No virtual timer */ +[0004] Virtual Timer Interrupt : 00000000 +[0004] Virtual Timer Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 +/* CNTPSIRQ1 Secure physical timer event.*/ +[0004] Common Flags (decoded below) : 00000001 + Secure : 1 Always On : 0 +/* One EL2 SBSA Generic Watchdog timer is available */ +[0001] Subtable Type : 01 [SBSA Generic Watchdog] +[0001] Length : 1C +[0002] Reserved : 0000 +[0008] Refresh Frame Address : 000000002a450000 +[0008] Control Frame Address : 000000002a440000 +[0004] Timer Interrupt : 0000003B /* 27(SPI)+32 */ +[0004] Timer Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + Secure : 0 -- 1.8.3.1

9 years

[PATCH] ArmPlatformPkg: fix gtdt.asl for ArmVExpressPkg

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> Add Memory-mapped GT and SBSA Generic Watchdog timer info base on Foundation Model Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Wei <fu.wei(a)linaro.org> --- .../AcpiTables/rtsm_ve-aemv8a/gtdt.asl | 54 +++++++++++++++++----- 1 file changed, 42 insertions(+), 12 deletions(-) diff --git a/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl b/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl index d304243..8adf7b6 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl +++ b/ArmPlatformPkg/ArmVExpressPkg/AcpiTables/rtsm_ve-aemv8a/gtdt.asl @@ -36,16 +36,16 @@ */ [0004] Signature : "GTDT" -[0004] Table Length : 00000050 +[0004] Table Length : 000000D8 [0001] Revision : 02 [0001] Checksum : F1 [0006] Oem ID : "LINARO" [0008] Oem Table ID : "RTSMVEV8" -[0004] Oem Revision : 00000001 +[0004] Oem Revision : 00000002 [0004] Asl Compiler ID : "INTL" [0004] Asl Compiler Revision : 20110623 -[0008] Counter Block Address : 0000000000000000 +[0008] Counter Block Address : 000000002a430000 [0004] Reserved : 00000000 /* In RTSM model's dts file, the last cell of interrupts @@ -83,34 +83,64 @@ Always-on : 0 /* The 64-bit physical address at which the Counter Read block is located */ -[0008] CntReadBase Physical address : 0000000000000000 +[0008] CntReadBase Physical address : 000000002a800000 -[0004] Platform Timer Count : 00000001 -[0004] Platform Timer Offset : 0000005C +[0004] Platform Timer Count : 00000002 +[0004] Platform Timer Offset : 00000060 /* Memory-mapped GT (Generic Timer) structures */ [0001] Subtable Type : 00 [0002] Length : 0064 [0001] Reserved : 000000 [0008] Block Address : 000000002a810000 -[0004] Timer Count : 00000001 -[0004] Timer Offset : 00000010 +[0004] Timer Count : 00000002 +[0004] Timer Offset : 00000014 -/* One frame is available */ +/* two frames is available */ [0001] Frame Number : 00 [0003] Reserved : 000000 [0008] Base Address : 000000002a820000 -[0008] EL0 Base Address : FFFFFFFFFFFFFFFF -[0004] Timer Interrupt : 00000029 /* 25+16 */ +[0008] EL0 Base Address : 000000002a820000 +[0004] Timer Interrupt : 00000039 /* 25+32 */ [0004] Timer Flags (decoded below) : 00000000 /* Active high level-sensitive */ + Trigger Mode : 1 + Polarity : 0 +/* No virtual timer */ +[0004] Virtual Timer Interrupt : 00000000 +[0004] Virtual Timer Flags (decoded below) : 00000000 Trigger Mode : 0 Polarity : 0 + +[0004] Common Flags (decoded below) : 00000000 + Secure : 1 + Always On : 0 + +[0001] Frame Number : 01 +[0003] Reserved : 000000 +[0008] Base Address : 000000002a830000 +[0008] EL0 Base Address : 000000002a830000 +[0004] Timer Interrupt : 0000003A /* 26+32 */ +[0004] Timer Flags (decoded below) : 00000000 /* Active high level-sensitive */ + Trigger Mode : 1 + Polarity : 0 /* No virtual timer */ [0004] Virtual Timer Interrupt : 00000000 [0004] Virtual Timer Flags (decoded below) : 00000000 Trigger Mode : 0 Polarity : 0 + [0004] Common Flags (decoded below) : 00000000 - Secure : 0 + Secure : 1 Always On : 0 +/* one EL2 SBSA Generic Watchdog timer is available */ +[0001] Subtable Type : 01 [SBSA Generic Watchdog] +[0001] Length : 1C +[0002] Reserved : 0000 +[0008] Refresh Frame Address : 000000002a450000 +[0008] Control Frame Address : 000000002a440000 +[0004] Timer Interrupt : 0000003B /* 27+32 */ +[0004] Timer Flags (decoded below) : 00000001 + Trigger Mode : 1 + Polarity : 0 + Secure : 0 -- 1.8.3.1

9 years

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Linaro-uefi April 2015