Hi,
After introduction of MvHwDescLib got merged, I submit second version
of the RTC support, which now use it as well. Other than that all
remarks from v1 are answered, details can be found in the changelog below.
The patches are also available in the github.
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/opp…
Any comments or remarks would be very welcome.
Best regards,
Marcin
Changelog:
v1 -> v2:
* Include <Library/UefiBootServicesTableLib.h> instead of extern *gBS
* Remove RtcReset function entirely
* Add RtcDelayedWrite helper function for modification of time and alarm
registers - cleaner code, with common valid comment.
* Use MmioAndThenOr32 instead of RtcUpdateMbusTimingParams function, remove
magic
* Add proper error path instead of assertions
* Move defines to local header
* Create new RTC description template in MvHwDescLib.h and use it for
obtaining controller data.
* Sort packages in inf file
Marcin Wojtas (2):
Platforms/Marvell: Introduce RTC support
Platforms/Marvell: Enable RTC library on Armada70x0 platforms
Platforms/Marvell/Armada/Armada.dsc.inc | 3 +-
Platforms/Marvell/Armada/Armada70x0.dsc | 3 +
.../Library/RealTimeClockLib/RealTimeClockLib.c | 335 +++++++++++++++++++++
.../Library/RealTimeClockLib/RealTimeClockLib.inf | 53 ++++
Platforms/Marvell/Include/Library/MvHwDescLib.h | 25 ++
Platforms/Marvell/Marvell.dec | 3 +
6 files changed, 421 insertions(+), 1 deletion(-)
create mode 100644 Platforms/Marvell/Armada/Library/RealTimeClockLib/RealTimeClockLib.c
create mode 100644 Platforms/Marvell/Armada/Library/RealTimeClockLib/RealTimeClockLib.inf
--
1.8.3.1
Hi,
Here's third version of the patchset comprising minor issues fixed pointed
in v2.
The commits are also available in the github:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/opp…
Any remarks or comments will be very welcome.
Best regards,
Marcin
Changelog
v2 -> v3:
* Add reviewed-by's to 1/4 and 3/4
* 1/4 Add 'Status = EFI_INVALID_PARAMETER' in switch default and remove
default variable initalization
* 3/4 For clarity leave NonDiscoverable header in PciEmulation as well
* 4/4 Fix whitespaces
v1 -> v2:
* 1/4: Change type of COMPHY_CHIP_INIT callback to VOID and rework Status usage
* 2/4: Add 'Reviewed-by'
* 3/4:
- Sort includes in header
- Rename 'storage' to 'nondiscoverable' in all macros and names
- Add defines for array sizes in definition
- Add defines for base addresses, so that they describe HW block and device
- Add comments for sections
* 4/4:
- Remove 'Ptr' suffixes
- Move and rename DEV_ENABLED macro from PciEmulation driver - use it in
ComPhy code
- Simplify obtaining enabled Sata ports and do not return EFI_SUCCESS on
PCD mismatch (lane enabled in ComPhy, despite the controller disabled)
- Add macros for controller ID's
- Remove unrelated style fixes
- Rewrite error print information in ComPhyCp110Init, because from now we
have more root causes than PLL
Konstantin Porotchkin (4):
Platforms/Marvell: ComPhyLib: Fix compilation warning
Platforms/Marvell: Add support for COMPHY on CP slaves
Platform/Marvell: Extend and share the platform description
Platform/Marvell: ComPhyLib: Enable SATA PHY init for multiple devices
Platforms/Marvell/Armada/Armada70x0.dsc | 9 +-
Platforms/Marvell/Include/Library/MvHwDescLib.h | 106 ++++++++++++++++++++++
Platforms/Marvell/Library/ComPhyLib/ComPhyCp110.c | 45 ++++++---
Platforms/Marvell/Library/ComPhyLib/ComPhyLib.c | 8 +-
Platforms/Marvell/Library/ComPhyLib/ComPhyLib.h | 4 +-
Platforms/Marvell/Library/ComPhyLib/ComPhyLib.inf | 3 +-
Platforms/Marvell/Marvell.dec | 3 -
Platforms/Marvell/PciEmulation/PciEmulation.c | 51 ++---------
8 files changed, 156 insertions(+), 73 deletions(-)
create mode 100644 Platforms/Marvell/Include/Library/MvHwDescLib.h
--
1.8.3.1
Hi,
I submit v2 of Armada 7k/8k improvements. It addresses all comments from
review and add some minor improvements. Details can be found in the
changelog and commit logs.
The commits are also available in the github:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/opp…
Any remarks or comments will be very welcome.
Best regards,
Marcin
Changelog
v1 -> v2:
* 1/4: Change type of COMPHY_CHIP_INIT callback to VOID and rework Status usage
* 2/4: Add 'Reviewed-by'
* 3/4:
- Sort includes in header
- Rename 'storage' to 'nondiscoverable' in all macros and names
- Add defines for array sizes in definition
- Add defines for base addresses, so that they describe HW block and device
- Add comments for sections
* 4/4:
- Remove 'Ptr' suffixes
- Move and rename DEV_ENABLED macro from PciEmulation driver - use it in
ComPhy code
- Simplify obtaining enabled Sata ports and do not return EFI_SUCCESS on
PCD mismatch (lane enabled in ComPhy, despite the controller disabled)
- Add macros for controller ID's
- Remove unrelated style fixes
- Rewrite error print information in ComPhyCp110Init, because from now we
have more root causes than PLL
Konstantin Porotchkin (4):
Platforms/Marvell: ComPhyLib: Fix compilation warning
Platforms/Marvell: Add support for COMPHY on CP slaves
Platform/Marvell: Extend and share the platform description
Platform/Marvell: ComPhyLib: Enable SATA PHY init for multiple devices
Platforms/Marvell/Armada/Armada70x0.dsc | 9 +-
Platforms/Marvell/Include/Library/MvHwDescLib.h | 106 ++++++++++++++++++++++
Platforms/Marvell/Library/ComPhyLib/ComPhyCp110.c | 46 ++++++----
Platforms/Marvell/Library/ComPhyLib/ComPhyLib.c | 8 +-
Platforms/Marvell/Library/ComPhyLib/ComPhyLib.h | 4 +-
Platforms/Marvell/Library/ComPhyLib/ComPhyLib.inf | 3 +-
Platforms/Marvell/Marvell.dec | 4 -
Platforms/Marvell/PciEmulation/PciEmulation.c | 52 ++---------
8 files changed, 156 insertions(+), 76 deletions(-)
create mode 100644 Platforms/Marvell/Include/Library/MvHwDescLib.h
--
1.8.3.1
Any comments?
在 3/16/2017 9:03 PM, Heyi Guo 写道:
> Hi folks,
>
> In "ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c", line 262, I
> found below code which seems like a bug. Could you help to confirm?
>
> 262 TableAttributes = TT_TABLE_AP_NO_PERMISSION;
> 263 if (Attributes & TT_NS) {
> 264 TableAttributes = TT_TABLE_NS;
> 265 }
> 266
>
> Why not a "|=" is used at line 264? Are TT_TABLE_AP_NO_PERMISSION and
> TT_TABLE_NS exclusive?
>
> Thanks and regards,
>
> Gary (Heyi Guo)
>
>
Hi Ard,
To support UEFI GOP frame buffer, is it enough to provide UEFI GOP
protocol and valid FrameBufferBase and FrameBufferSize via GOP mode?
I still have some question. As we are using a PCIe VGA device, the frame
buffer might probably be certain PCIe memory resource BAR of VGA device.
Then is it possible for OS to re-enumerate PCIe bus and re-allocate
memory BAR resources? If so, who will be responsible to update frame
buffer base?
Thanks and regards,
Heyi Guo (Gary)
Hi,
As agreed during RTC support review, we submit first a series being
a preparation for adding Armada 80x0 SoC support, which is a superset
of existing in OpenPlatformPkg Armada 70x0. Because currently the devices
hardware description is unnecessarily added in the PCD's, we begin
a cleanup, allowing to achieve more flexible and scalable approach.
This patchset is a beginning of Armada 7k/8k support improvement,
that will allow to store SoC's description in one place, accessible
for the drivers and libraries. In near future more peripherals
will be described in a similar way to storage devices, that are registered
via PciEmulation.
The commits are also available in the github:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/opp…
Any remarks or comments will be very welcome.
Best regards,
Marcin
Konstantin Porotchkin (4):
Platforms/Marvell: ComPhyLib: Fix compilation warning
Platforms/Marvell: Add support for COMPHY on CP slaves
Platform/Marvell: Extend and share the platform description
Platform/Marvell: ComPhyLib: Enable SATA PHY init for multiple devices
Platforms/Marvell/Armada/Armada70x0.dsc | 9 +--
Platforms/Marvell/Include/Library/MvHwDescLib.h | 78 +++++++++++++++++++++++
Platforms/Marvell/Library/ComPhyLib/ComPhyCp110.c | 52 ++++++++++-----
Platforms/Marvell/Library/ComPhyLib/ComPhyLib.c | 8 ++-
Platforms/Marvell/Library/ComPhyLib/ComPhyLib.inf | 3 +-
Platforms/Marvell/Marvell.dec | 4 --
Platforms/Marvell/PciEmulation/PciEmulation.c | 44 ++-----------
7 files changed, 128 insertions(+), 70 deletions(-)
create mode 100644 Platforms/Marvell/Include/Library/MvHwDescLib.h
--
1.8.3.1
The varstore shadow FV is kept in sync with actual SPI flash read,
write and erase operations. Since we only expose a small slice of
the SPI flash for the variable store, we keep an internal LBA offset
and take it into account when translating shadow FV LBAs to actual
LBAs.
As it turns out, the erase routine applies the LBA offset incorrectly,
resulting in the wrong flash block being erased, and the wrong range
to be erased in the shadow FV, which could result in a crash if the
memory access is out of bounds.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org>
---
Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c b/Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c
index 03fd9e816b96..f544af3eeb2d 100644
--- a/Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c
+++ b/Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c
@@ -439,7 +439,6 @@ StyxSpiFvDxeErase (
for (Start = VA_ARG (Args, EFI_LBA);
Start != EFI_LBA_LIST_TERMINATOR;
Start = VA_ARG (Args, EFI_LBA)) {
- Start += mNvStorageLbaOffset;
Length = VA_ARG (Args, UINTN);
Status = mIscpDxeProtocol->AmdExecuteEraseFvBlockDxe (mIscpDxeProtocol,
(Start + mNvStorageLbaOffset) * BLOCK_SIZE,
--
2.7.4
The SiI isn't an AHCI compatible adapter so it implements the EFI ATA
pass-through protocol directly. This works for fixed hard drives, but
not ATAPI attached devices (CDROM, DVDROM, TAPE, etc).
This patch adds read only ATAPI support via the EFI SCSI pass-through
protocol, allowing boot from attached CD/DVD. This patch also cleans
up, and tweaks recovery paths/etc in the original driver. When
combined with the ARM/PCI dma lib changes this allows us to relax the
IO alignment requirement that caused grub failures.
Finally, the OpenPlatformPkg/Juno must be updated, with another patch
to avoid build breaks now that the SiI has a dependency on the SCSI
libraries.
V3->V4
Fixed a bug that in theory kept multiple ATAPI devices from working.
More patch formatting fixes per Ard
Dropped the sense validation logic, and changes to the Mde header
V2->V3:
Send the correct patch, rather than the one I was running
the patch checker against.
V1->V2:
Formatting corrections per Ard's comments and Daniil's
updated patch checker.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.linton(a)arm.com>
Jeremy Linton (6):
EmbeddedPkg: SiI3132: Note that ARM is using this Dxe
EmbeddedPkg: SiI3132: Add ScsiProtocol callbacks
EmbeddedPkg: SiI3132: Add SCSI protocol support to header
EmbeddedPkg: SiI3132: Break out FIS command submission
EmbeddedPkg: SiI3132: Cleanup device node creation
EmbeddedPkg: SiI3132: Enable SCSI pass-through protocol
EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c | 52 ++-
EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h | 103 ++++-
.../Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf | 2 +
.../Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c | 280 ++++++++------
.../Drivers/SataSiI3132Dxe/SiI3132ScsiPassThru.c | 424 +++++++++++++++++++++
MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf | 2 +-
OpenPlatformPkg | 2 +-
7 files changed, 725 insertions(+), 140 deletions(-)
create mode 100644 EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132ScsiPassThru.c
--
2.9.3