An array of static strings is set up for use in printing debug messages.
This makes some compilers unhappy when building in RELEASE mode. So hide
the definition behind #ifndef MDE_NDEBUG.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm(a)linaro.org>
---
Platforms/ARM/Juno/Library/JunoPciHostBridgeLib/JunoPciHostBridgeLib.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Platforms/ARM/Juno/Library/JunoPciHostBridgeLib/JunoPciHostBridgeLib.c b/Platforms/ARM/Juno/Library/JunoPciHostBridgeLib/JunoPciHostBridgeLib.c
index f5cb254465..5263a2985d 100644
--- a/Platforms/ARM/Juno/Library/JunoPciHostBridgeLib/JunoPciHostBridgeLib.c
+++ b/Platforms/ARM/Juno/Library/JunoPciHostBridgeLib/JunoPciHostBridgeLib.c
@@ -138,9 +138,11 @@ PciHostBridgeFreeRootBridges (
}
+#ifndef MDEPKG_NDEBUG
STATIC CONST CHAR16 mPciHostBridgeLibAcpiAddressSpaceTypeStr[][4] = {
L"Mem", L"I/O", L"Bus"
};
+#endif
/**
Inform the platform that the resource conflict happens.
--
2.11.0
Update the DTS and ACPI descriptions with correct information about the
routing of legacy interrupts.
For DT, this comes down to updating the interrupt-map with distinct sets
of 4 GIC interrupt lines per PCIe slot.
For ACPI, we need to update the PNP0A08 node and add three companion devices,
one for each slot, whose _PRT methods describe the legacy interrupt routing
of each respective slot. The _PRT method at the root of the PCI ACPI hierarchy
is updated to map INTA (which is shared by all functions of the bridge device)
to GIC interrupt #320. With this change, the boot log is free of warnings and
non-MSI capable devices work as expected.
Tested on Cello with xhci_hcd.quirks=64 passed on the kernel command line, in
which case the xhci interrupt is routed to GIC interrupt #324
Ard Biesheuvel (2):
Platforms/AMD: correct legacy PCI interrupt routing in DSDT
Platforms/AMD: correct legacy PCI interrupt routing in DTS
Platforms/AMD/Styx/AcpiTables/Dsdt.asl | 63 +++++++++++---------
Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dtb | Bin 7973 -> 8123 bytes
Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dts | 20 +++++--
3 files changed, 49 insertions(+), 34 deletions(-)
--
2.9.3
Upstream EDK2 changes now require platforms that build the UEFI Shell
from source to provide a resolution for UefiBootManagerLib, and some
other library class it transitively depends on. So add them to the
DSC include shared between the HiSilicon platforms.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org>
---
Chips/Hisilicon/Hisilicon.dsc.inc | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Chips/Hisilicon/Hisilicon.dsc.inc b/Chips/Hisilicon/Hisilicon.dsc.inc
index d856a659a8fb..716900874274 100644
--- a/Chips/Hisilicon/Hisilicon.dsc.inc
+++ b/Chips/Hisilicon/Hisilicon.dsc.inc
@@ -198,7 +198,12 @@
HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
+
+[LibraryClasses.common.UEFI_DRIVER,LibraryClasses.common.UEFI_APPLICATION]
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+ UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
[LibraryClasses.common.UEFI_DRIVER]
ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
--
2.9.3
This is now mainly focused on FVP, although some changes affect TC2 and Juno
as well. However, the switch to DtPlatformDxe, which is the primary purpose of
this series, is only implemented for FVP.
Note that the full functionality is only enabled when building with
DT_SUPPORT=TRUE, in which case the platform is built with a bunch of DTB
images built in, and a menu option that allows choosing between ACPI and
DT (which does require working non-volatile storage). Without DT support,
the platform is essentially ACPI only, unless a DTB is supplied to the OS
via one of the available out-of-band mechanisms.
Ard Biesheuvel (6):
Platforms/VExpress: remove unused logo PCD
Platforms/VExpress: remove unused StatusCode references
Platforms/VExpress: get rid of Tiano compression
Platforms/VExpress: remove BdsLib library class resolutions
Platforms/FVP: add DtPlatformDtbLoaderLib implementation
Platforms/FVP-AArch64: switch to simpler DT platform driver
Platforms/ARM/Juno/ArmJuno.dsc | 8 ++
Platforms/ARM/Juno/ArmJuno.fdf | 9 --
Platforms/ARM/VExpress/ArmVExpress-CTA15-A7.dsc | 13 +-
Platforms/ARM/VExpress/ArmVExpress-CTA15-A7.fdf | 16 ---
Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc | 33 ++---
Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf | 54 ++------
Platforms/ARM/VExpress/ArmVExpress.dsc.inc | 24 +---
Platforms/ARM/VExpress/Library/ArmVExpressDtPlatformDtbLoaderLib/ArmVExpressDtPlatformDtbLoaderLib.c | 134 ++++++++++++++++++++
Platforms/ARM/VExpress/Library/ArmVExpressDtPlatformDtbLoaderLib/ArmVExpressDtPlatformDtbLoaderLib.inf | 39 ++++++
9 files changed, 221 insertions(+), 109 deletions(-)
create mode 100644 Platforms/ARM/VExpress/Library/ArmVExpressDtPlatformDtbLoaderLib/ArmVExpressDtPlatformDtbLoaderLib.c
create mode 100644 Platforms/ARM/VExpress/Library/ArmVExpressDtPlatformDtbLoaderLib/ArmVExpressDtPlatformDtbLoaderLib.inf
--
2.9.3
ode can also be found in linaro repo:
http://git.linaro.org/people/heyi.guo/OpenPlatformPkg.git
branch: rp-17.04-04
Mainly include
* refine the code style according Leif's comments
* drop the "Hisilicon: Fix ACPI/DSDT table checksum error" path this time,
and will send out after ERP17.04
Chenhui Sun (2):
Hisilicon: disable RC Option Rom
Hisilicon: Add reconfig lane number feature
shaochangliang (1):
Hisilicon/PCIe: Fix the probability of I350 enumeration fail issue.
.../Hi1610/Drivers/PcieInit1610/PcieInitLib.c | 184 ++++++++++++++++++++-
.../Hi1610/Drivers/PcieInit1610/PcieInitLib.h | 4 +
Chips/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h | 5 +
3 files changed, 191 insertions(+), 2 deletions(-)
--
1.9.1
Hi,
I submit a series of patches adding analog parameters configuration
sequences for Sata and Pcie, 10G link (SFI + RXAUI) initalization
and 2 minor improvements. Also first part of PCD rework is added,
moving the controllers description to MvHwDescLib. Per-board lanes
description new implementation will be submitted after this one.
The commits are also available in the github:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/opp…
Any remarks or comments will be very welcome.
Best regards,
Marcin
Marcin Wojtas (6):
Platform/Marvell: ComPhyLib: Cleanup and fix SerDes lanes assignment
Platform/Marvell: ComPhyLib: Mark failing lane as unconnected
Platform/Marvell: ComPhyLib: Configure analog parameters for SATA
Platform/Marvell: ComPhyLib: Configure analog parameters for PCIE
Platform/Marvell: ComPhyLib: Add missing SFI and RXAUI configuration
Platform/Marvell: ComPhyLib: Move devices description to MvHwDescLib
Documentation/Marvell/PortingGuide/ComPhy.txt | 60 +-
Platforms/Marvell/Armada/Armada70x0.dsc | 13 +-
Platforms/Marvell/Include/Library/MvComPhyLib.h | 5 +
Platforms/Marvell/Include/Library/MvHwDescLib.h | 38 +
Platforms/Marvell/Library/ComPhyLib/ComPhyCp110.c | 886 +++++++++++++++++++++-
Platforms/Marvell/Library/ComPhyLib/ComPhyLib.c | 96 ++-
Platforms/Marvell/Library/ComPhyLib/ComPhyLib.h | 318 +++++++-
Platforms/Marvell/Library/ComPhyLib/ComPhyLib.inf | 26 +-
Platforms/Marvell/Marvell.dec | 28 +-
9 files changed, 1278 insertions(+), 192 deletions(-)
--
1.8.3.1
ode can also be found in linaro repo:
http://git.linaro.org/people/heyi.guo/OpenPlatformPkg.git
branch: rp-17.04-04
Mainly include
* refine the code style according Leif's comments
* drop the "Hisilicon: Fix ACPI/DSDT table checksum error" path this time,
and will send out after ERP17.04
Chenhui Sun (2):
Hisilicon: disable RC Option Rom
Hisilicon: Add reconfig lane number feature
shaochangliang (1):
Hisilicon/PCIe: Fix the probability of I350 enumeration fail issue.
.../Hi1610/Drivers/PcieInit1610/PcieInitLib.c | 184 ++++++++++++++++++++-
.../Hi1610/Drivers/PcieInit1610/PcieInitLib.h | 4 +
Chips/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h | 5 +
3 files changed, 191 insertions(+), 2 deletions(-)
--
1.9.1