Hi all,
As some of you may be aware, I have been working around the lack of
a clear upstreaming strategy for platform support by keeping such code
in a dedicated repository I set up at Linaro for that purpose:
https://git.linaro.org/uefi/OpenPlatformPkg.git
During discussions at the last Seattle plugfest we finally agreed on
the (theoretical) details of how to use the edk2-platforms repository.
After that I promised to migrate OpenPlatformPkg across to the
edk2-platforms and edk2-non-osi structure, with the explicit end goal
from my side that this should become the master branch for each.
And now, before the release of HURD 1.0, I have.
Current limitations (that I can remember):
- A few references to OpenPlatformPkg remain, in ways that do not
appear to break any of the platform builds. Most likely this affects
dead code, but in case it's been accidentally orphaned, I thought it
best to
- I have simply nuked all references to Ebl (used in _addition_ to the
UEFI shell, which was never the intent) and the efi-toolkit
ramdisk driver.
- The Marvell Yukon driver that I sent out for review last week has
not migrated anywhere, and so has been temporarily disabled
Mike suggested I should
- USB support on the LeMaker Cello board depends on the patch
"OptionRomPkg: add firmware loader driver for Renesas PD72020x"
sent out by Ard on 18th of April.
- I have dropped some of the binary-only modules from OpenPlatformPkg,
and contacted the platform owners with requests for modifications.
- The git history is quite messy and will be cleaned up, but I wanted
to keep the transition quite visible in the RFC.
- I haven't filled anything into the Maintainers.txt files - I am in
favour of moving to a fully machine-readable format with wildcards
as Laszlo has proposed in the past, and think this would be an
excellent point to have that discussion (which can be had separately
for edk2-platforms and edk2-non-osi from edk2).
- Few of the platforms complete the FV generation stage, and I've
inserted a couple of silly hacks to get them to get as far as they
do. I think that either I am missing some points of how
PACKAGES_PATH is intended to work, or I'm simply hitting corner
cases no one has come across before. I could really use some help
debugging these issues. (examples below).
The below depends on the 3-part series I sent out today for importing
DwEmmcDxe and EfiTimeBaseLib from OpenPlatformPkg. But apart from
that, I have uploaded branches called devel-OpenPlatformPkg to:
https://github.com/tianocore/edk2-platforms/tree/devel-OpenPlatformPkghttps://github.com/tianocore/edk2-non-osi/tree/devel-OpenPlatformPkg
These branches _will_ be rebased occasionally until they get to a
point where they can move out of devel- stage (and hopefully onto
master).
Build issue description
=======================
So, one of the hopefully easier ones is what I'm seeing when trying to
build the Juno platform:
$ PACKAGES_PATH="/work/maint/edk2-platforms:/work/maint/edk2-non-osi" GCC5_AARCH64_PREFIX=aarch64-linux-gnu- build -a AARCH64 -t GCC5 -p Platform/ARM/Juno/ArmJuno.dsc -b RELEASE -n 9
results in:
<<<
GenFds.py...
: error F003: Output file for RAW section could not be found for
Platform/ARM/Juno/AcpiTables/AcpiTables.inf
###
build.py...
: error 7000: Failed to execute command
GenFds -f /work/maint/edk2-platforms/Platform/ARM/Juno/ArmJuno.fdf --conf=/work/maint/edk2/Conf -o /work/maint/edk2/Build/ArmJuno/RELEASE_GCC5 -t GCC5 -b RELEASE -p /work/maint/edk2-platforms/Platform/ARM/Juno/ArmJuno.dsc -a AARCH64 -D "EFI_SOURCE=/work/maint/edk2/EdkCompatibilityPkg" -D "EDK_SOURCE=/work/maint/edk2/EdkCompatibilityPkg" -D "TOOL_CHAIN_TAG=GCC5" -D "TOOLCHAIN=GCC5" -D "TARGET=RELEASE" -D "FAMILY=GCC" -D "WORKSPACE=/work/maint/edk2" -D "EDK_TOOLS_PATH=/work/maint/edk2/BaseTools" -D "ARCH=AARCH64" -D "ECP_SOURCE=/work/maint/edk2/EdkCompatibilityPkg"
[/work/maint/edk2]
- Failed -
>>>
And when I copy and paste the above command manually, I get:
<<<
GenFds.py...
/work/maint/edk2-platforms/Platform/ARM/Juno/ArmJuno.dsc(34): error
000E: File/directory not found in workspace
/work/maint/edk2-platforms/Platform/ARM/Juno/Platform/ARM/VExpress/ArmVExpress.dsc.inc
/work/maint/edk2/Platform/ARM/VExpress/ArmVExpress.dsc.inc
>>>
So, to an uniformed observer, it seems the portion
!include Platform/ARM/VExpress/ArmVExpress.dsc.inc
from ArmJuno.dsc
gets expanded to "directory ArmJuno.dsc is in" + "Platform/ARM/VExpress/ArmVExpress.dsc.inc"
whereas I was hoping for it to try to find a match for
"Platform/ARM/VExpress/ArmVExpress.dsc.inc" along PACKAGES_PATH (and
find one in edk2-platforms).
I also have the impression that something similar is happening in
ArmJuno.fdf for the line
INF RuleOverride=ACPITABLE Platform/ARM/Juno/AcpiTables/AcpiTables.inf
generating the error message from the original build command.
But I'm not quite sure how to debug these issues (short of fully
figuring out the innards of MultipleWorkspace.py, MetaFileParser.py
and a few others).
Any ideas of where to look, or even what is going on?
Would these cases be expected to work?
/
Leif
Support both v1 and v2 hardware of hikey960 platform.
Signed-off-by: Haojian Zhuang <haojian.zhuang(a)linaro.org>
---
platforms.config | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/platforms.config b/platforms.config
index 5332e0f..0639583 100644
--- a/platforms.config
+++ b/platforms.config
@@ -210,6 +210,17 @@ SCP_BIN=OpenPlatformPkg/Platforms/Hisilicon/HiKey/Binary/mcuimage.bin
# Uncomment this to use UART0 as the OP-TEE Trusted OS console
#TOS_BUILDFLAGS=CFG_CONSOLE_UART=0
+[hikey960]
+LONGNAME=Hikey960
+DSC=OpenPlatformPkg/Platforms/Hisilicon/HiKey960/HiKey960.dsc
+ARCH=AARCH64
+UEFI_BIN=BL33_AP_UEFI.fd
+UEFI_IMAGE_DIR=HiKey960
+BUILD_ATF=yes
+SCP_BIN=OpenPlatformPkg/Platforms/Hisilicon/HiKey960/Binary/lpm3.img
+# Uncomment this to use UART5 as the EDK2 console for v1 hardware
+#BUILDFLAGS=-DSERIAL_BASE=0xFDF05000
+
[xen64]
LONGNAME=AArch64 Xen guest
BUILDFLAGS=
--
2.7.4
Find the structure in memory that describes the DRAM discovered by the
secure firmware, and use it to initialize the UEFI memory descriptors.
At the same time, drop the hardcoded DRAM size to 2 GB, which should be
a reasonable lower bound for the amount of DDR4 DRAM on platforms built
around this SoC family.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org>
---
Platforms/Marvell/Armada/Armada.dsc.inc | 2 +-
.../Armada70x0Lib/AArch64/ArmPlatformHelper.S | 84 +++++++++++++++------
.../Library/Armada70x0Lib/ARM/ArmPlatformHelper.S | 88 ++++++++++++++++------
.../Library/Armada70x0Lib/Armada70x0LibMem.c | 15 ++--
4 files changed, 140 insertions(+), 49 deletions(-)
diff --git a/Platforms/Marvell/Armada/Armada.dsc.inc b/Platforms/Marvell/Armada/Armada.dsc.inc
index 222ab89cb45e..002c3b3ec961 100644
--- a/Platforms/Marvell/Armada/Armada.dsc.inc
+++ b/Platforms/Marvell/Armada/Armada.dsc.inc
@@ -371,7 +371,7 @@
# ARM Pcds
gArmTokenSpaceGuid.PcdSystemMemoryBase|0
- gArmTokenSpaceGuid.PcdSystemMemorySize|0x100000000
+ gArmTokenSpaceGuid.PcdSystemMemorySize|0x80000000
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|36
gMarvellTokenSpaceGuid.PcdSecureRegionBase|0x4000000
diff --git a/Platforms/Marvell/Armada/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S b/Platforms/Marvell/Armada/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S
index ba9685f1d36e..8246892f2585 100644
--- a/Platforms/Marvell/Armada/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S
+++ b/Platforms/Marvell/Armada/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S
@@ -26,37 +26,47 @@
#define CCU_MC_RTBR_OFFSET 0x8
#define CCU_MC_RTBR_TARGET_BASE(Base) (((Base) >> 20) << 10)
+#define SYSTEM_INFO_ADDRESS 0x4000000
+#define SYSINFO_ARRAY_SIZE 0x0
+#define SYSINFO_DRAM_CS0_SIZE 0x1
+
ASM_FUNC(ArmPlatformPeiBootAction)
mov x29, xzr
+ mov x28, x30
.if FixedPcdGet64 (PcdSystemMemoryBase) != 0
.err PcdSystemMemoryBase should be 0x0 on this platform!
.endif
.if FixedPcdGet64 (PcdSystemMemorySize) > FixedPcdGet32 (PcdDramRemapTarget)
- //
- // Remap the DRAM region [DramRemapTarget, DramRemapTarget + DramRemapSize)
- // to the top of the DRAM space. This is mainly intended to free up 32-bit
- // addressable memory for MMIO and PCI windows.
- //
- MOV32 (x0, CCU_MC_BASE)
- MOV32 (w1, CCU_MC_RSBR_SOURCE_BASE (FixedPcdGet64 (PcdSystemMemorySize)))
- MOV32 (w2, CCU_MC_RTBR_TARGET_BASE (FixedPcdGet32 (PcdDramRemapTarget)))
- MOV32 (w3, CCU_MC_RCR_REMAP_SIZE (FixedPcdGet32 (PcdDramRemapSize)) | CCU_MC_RCR_REMAP_EN)
- str w1, [x0, #CCU_MC_RSBR_OFFSET]
- str w2, [x0, #CCU_MC_RTBR_OFFSET]
- str w3, [x0, #CCU_MC_RCR_OFFSET]
-
- //
- // Use the low range for UEFI itself. The remaining memory will be mapped
- // and added to the GCD map later.
- //
- adr x0, mSystemMemoryEnd
- MOV64 (x1, FixedPcdGet32 (PcdDramRemapTarget) - 1)
- str x1, [x0]
+ .err Hard coded PcdSystemMemorySize should not exceed PcdDramRemapTarget
.endif
- MOV32 (x0, FixedPcdGet64 (PcdFvBaseAddress))
+ bl DiscoverDramSize
+ cbz w0, 0f
+
+ //
+ // Remap the DRAM region [DramRemapTarget, DramRemapTarget + DramRemapSize)
+ // to the top of the DRAM space. This is mainly intended to free up 32-bit
+ // addressable memory for MMIO and PCI windows.
+ //
+ lsl w1, w0, #10 // set CCU_MC_RSBR_SOURCE_BASE to DRAM size in KiB
+ MOV32 (x0, CCU_MC_BASE)
+ MOV32 (w2, CCU_MC_RTBR_TARGET_BASE (FixedPcdGet32 (PcdDramRemapTarget)))
+ MOV32 (w3, CCU_MC_RCR_REMAP_SIZE (FixedPcdGet32 (PcdDramRemapSize)) | CCU_MC_RCR_REMAP_EN)
+ str w1, [x0, #CCU_MC_RSBR_OFFSET]
+ str w2, [x0, #CCU_MC_RTBR_OFFSET]
+ str w3, [x0, #CCU_MC_RCR_OFFSET]
+
+ //
+ // Use the low range for UEFI itself. The remaining memory will be mapped
+ // and added to the GCD map later.
+ //
+ adr x0, mSystemMemoryEnd
+ MOV64 (x1, FixedPcdGet32 (PcdDramRemapTarget) - 1)
+ str x1, [x0]
+
+0:MOV32 (x0, FixedPcdGet64 (PcdFvBaseAddress))
MOV32 (x3, FixedPcdGet32 (PcdFvSize))
add x3, x3, x0
@@ -70,6 +80,38 @@ ASM_FUNC(ArmPlatformPeiBootAction)
cmp x0, x3
b.lt 0b
+ ret x28
+
+DiscoverDramSize:
+ //
+ // ARM Trusted Firmware leaves us a structure in memory that describes the
+ // nature of the available DRAM. It consists of an array of <u32, u32>
+ // key/value pairs, where the only keys we are [currently] interested in are:
+ //
+ // 0x0 (ARRAY_SIZE) the overall number of entries (should be the first)
+ // 0x1 (DRAM_CS0_SIZE) the size in MiB of DRAM bank 0
+ //
+ MOV32 (x4, SYSTEM_INFO_ADDRESS)
+ ldp w0, w1, [x4], #8
+
+ cmp w0, #SYSINFO_ARRAY_SIZE // first entry contains array size?
+ b.ne 1f
+
+0:subs w1, w1, #1 // more entries to check?
+ b.eq 1f
+
+ ldp w2, w3, [x4], #8 // next entry contains DRAM CS0 size?
+ cmp w2, #SYSINFO_DRAM_CS0_SIZE
+ b.ne 0b
+
+ mov w0, w3 // return value in MiB
+
+ adr x1, DiscoveredDramSize // store value in bytes
+ lsl x3, x3, #20
+ str x3, [x1]
+ ret
+
+1:mov w0, wzr
ret
//UINTN
diff --git a/Platforms/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S b/Platforms/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S
index 4cd8b3154e82..fdb688ca489a 100644
--- a/Platforms/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S
+++ b/Platforms/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S
@@ -26,36 +26,80 @@
#define CCU_MC_RTBR_OFFSET 0x8
#define CCU_MC_RTBR_TARGET_BASE(Base) (((Base) >> 20) << 10)
+#define SYSTEM_INFO_ADDRESS 0x4000000
+#define SYSINFO_ARRAY_SIZE 0x0
+#define SYSINFO_DRAM_CS0_SIZE 0x1
+
ASM_FUNC(ArmPlatformPeiBootAction)
+ mov r13, lr
+
.if FixedPcdGet64 (PcdSystemMemoryBase) != 0
.err PcdSystemMemoryBase should be 0x0 on this platform!
.endif
.if FixedPcdGet64 (PcdSystemMemorySize) > FixedPcdGet32 (PcdDramRemapTarget)
- //
- // Remap the DRAM region [DramRemapTarget, DramRemapTarget + DramRemapSize)
- // to the top of the DRAM space. This is mainly intended to free up 32-bit
- // addressable memory for MMIO and PCI windows.
- //
- MOV32 (r0, CCU_MC_BASE)
- MOV32 (r1, CCU_MC_RSBR_SOURCE_BASE (FixedPcdGet64 (PcdSystemMemorySize)))
- MOV32 (r2, CCU_MC_RTBR_TARGET_BASE (FixedPcdGet32 (PcdDramRemapTarget)))
- MOV32 (r3, CCU_MC_RCR_REMAP_SIZE (FixedPcdGet32 (PcdDramRemapSize)) | CCU_MC_RCR_REMAP_EN)
- str r1, [r0, #CCU_MC_RSBR_OFFSET]
- str r2, [r0, #CCU_MC_RTBR_OFFSET]
- str r3, [r0, #CCU_MC_RCR_OFFSET]
-
- //
- // Use the low range for UEFI itself. The remaining memory will be mapped
- // and added to the GCD map later.
- //
- ADRL (r0, mSystemMemoryEnd)
- MOV32 (r2, FixedPcdGet32 (PcdDramRemapTarget) - 1)
- mov r3, #0
- strd r2, r3, [r0]
-
+ .err Hard coded PcdSystemMemorySize should not exceed PcdDramRemapTarget
.endif
+ bl DiscoverDramSize
+ cmp r0, #0
+ beq 0f
+
+ //
+ // Remap the DRAM region [DramRemapTarget, DramRemapTarget + DramRemapSize)
+ // to the top of the DRAM space. This is mainly intended to free up 32-bit
+ // addressable memory for MMIO and PCI windows.
+ //
+ lsl r1, r0, #10 // set CCU_MC_RSBR_SOURCE_BASE to DRAM size in KiB
+ MOV32 (r0, CCU_MC_BASE)
+ MOV32 (r2, CCU_MC_RTBR_TARGET_BASE (FixedPcdGet32 (PcdDramRemapTarget)))
+ MOV32 (r3, CCU_MC_RCR_REMAP_SIZE (FixedPcdGet32 (PcdDramRemapSize)) | CCU_MC_RCR_REMAP_EN)
+ str r1, [r0, #CCU_MC_RSBR_OFFSET]
+ str r2, [r0, #CCU_MC_RTBR_OFFSET]
+ str r3, [r0, #CCU_MC_RCR_OFFSET]
+
+ //
+ // Use the low range for UEFI itself. The remaining memory will be mapped
+ // and added to the GCD map later.
+ //
+ ADRL (r0, mSystemMemoryEnd)
+ MOV32 (r2, FixedPcdGet32 (PcdDramRemapTarget) - 1)
+ mov r3, #0
+ strd r2, r3, [r0]
+
+0:bx r13
+
+DiscoverDramSize:
+ //
+ // ARM Trusted Firmware leaves us a structure in memory that describes the
+ // nature of the available DRAM. It consists of an array of <u32, u32>
+ // key/value pairs, where the only keys we are [currently] interested in are:
+ //
+ // 0x0 (ARRAY_SIZE) the overall number of entries (should be the first)
+ // 0x1 (DRAM_CS0_SIZE) the size in MiB of DRAM bank 0
+ //
+ MOV32 (r4, SYSTEM_INFO_ADDRESS)
+ ldrd r0, r1, [r4], #8
+
+ cmp r0, #SYSINFO_ARRAY_SIZE // first entry contains array size?
+ bne 1f
+
+0:subs r1, r1, #1 // more entries to check?
+ beq 1f
+
+ ldrd r2, r3, [r4], #8 // next entry contains DRAM CS0 size?
+ cmp r2, #SYSINFO_DRAM_CS0_SIZE
+ bne 0b
+
+ mov r0, r3 // return value in MiB
+
+ ADRL (r1, DiscoveredDramSize)
+ lsl r2, r3, #20 // store value in bytes
+ lsr r3, r3, #12
+ strd r2, r3, [r1]
+ bx lr
+
+1:mov r0, #0
bx lr
//UINTN
diff --git a/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c b/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c
index 4d80426c177c..85df57164b7f 100644
--- a/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c
+++ b/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c
@@ -47,6 +47,13 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
STATIC ARM_MEMORY_REGION_DESCRIPTOR VirtualMemoryTable[MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS];
+//
+// This will be overwritten by ArmPlatformPeiBootAction() based on information
+// provided by the secure firmware. PcdSystemMemorySize should be a reasonable
+// default otherwise.
+//
+UINT64 DiscoveredDramSize = FixedPcdGet64 (PcdSystemMemorySize);
+
/**
Return the Virtual Memory Map of your platform
@@ -63,7 +70,6 @@ ArmPlatformGetVirtualMemoryMap (
)
{
UINTN Index = 0;
- UINT64 MemSize;
UINT64 MemLowSize;
UINT64 MemHighStart;
UINT64 MemHighSize;
@@ -71,11 +77,10 @@ ArmPlatformGetVirtualMemoryMap (
ASSERT (VirtualMemoryMap != NULL);
- MemSize = FixedPcdGet64 (PcdSystemMemorySize);
- MemLowSize = MIN (FixedPcdGet64 (PcdDramRemapTarget), MemSize);
+ MemLowSize = MIN (FixedPcdGet64 (PcdDramRemapTarget), DiscoveredDramSize);
MemHighStart = (UINT64)FixedPcdGet64 (PcdDramRemapTarget) +
FixedPcdGet32 (PcdDramRemapSize);
- MemHighSize = MemSize - MemLowSize;
+ MemHighSize = DiscoveredDramSize - MemLowSize;
ResourceAttributes = (
EFI_RESOURCE_ATTRIBUTE_PRESENT |
@@ -105,7 +110,7 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[Index].Length = 0x20000000;
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
- if (MemSize > MemLowSize) {
+ if (DiscoveredDramSize > MemLowSize) {
//
// If we have more than MemLowSize worth of DRAM, the remainder will be
// mapped at the top of the remapped window.
--
2.9.3
From: Achin Gupta <achin.gupta(a)arm.com>
Hi,
This patch makes some tweaks to the ARM Trusted firmware build command being
used to include support for the MM Dispatcher and EDK2 MM images. It also
updated the atf-build.sh to not export the SCP_BL2 option for the FVP platform.
cheers,
Achin
Changelog:
v3: Split last patch in v2 to separate changes to remove the
EDK2_ENABLE_SMSC_91X build option and to update the ARM TF build command
line
v2: Replaced platform specific conditional to not export the SCP_BL2 option with
a generic condition.
v1: First patchset
Achin Gupta (2):
Do not export SCP firmware path on FVP build
MM: Change options to include MM image in ARM TF
atf-build.sh | 33 +++++++++++++++++++++------------
platforms.config | 11 +++++------
2 files changed, 26 insertions(+), 18 deletions(-)
--
1.9.1
From: Achin Gupta <achin.gupta(a)arm.com>
Hi,
This patchset incorporates changes to the AArch64StandaloneMm branch
that:
1. Update the size of the MM communication buffer shared between the
normal and secure worlds
2. Restore the size of the secure partition of the DRAM to 16MB instead
of 64MB
I would like the AArch64StandaloneMm branch to be force updated with
this patch stack on top of the latest master branch. Please ignore any
patches posted previously in this regard.
cheers,
Achin
Achin Gupta (3):
Platforms/ARM/VExpress: Define extents of MM communication buffer
Platforms/ARM/VExpress: Include MM communication protocol driver
Platforms/ARM/VExpress: Include UEFI Info application in FVP build
Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc | 14 ++++++++++++++
Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf | 6 ++++++
2 files changed, 20 insertions(+)
--
1.9.1
From: Achin Gupta <achin.gupta(a)arm.com>
Hi,
This patch makes some tweaks to the ARM Trusted firmware build command being
used to include support for the MM Dispatcher and EDK2 MM images. It also
updated the atf-build.sh to not export the SCP_BL2 option for the FVP platform.
cheers,
Achin
Achin Gupta (2):
Do not export SCP firmware path on FVP build
MM: Change options to include MM image in ARM TF
atf-build.sh | 33 +++++++++++++++++++++------------
platforms.config | 11 +++++------
2 files changed, 26 insertions(+), 18 deletions(-)
--
1.9.1
From: Achin Gupta <achin.gupta(a)arm.com>
Hi,
This patch makes some tweaks to the ARM Trusted firmware build command being
used to include support for the MM Dispatcher and EDK2 MM images. It also
updated the atf-build.sh to not export the SCP_BL2 option for the FVP platform.
cheers,
Achin
Changelog:
v2: Replaced platform specific conditional to not export the SCP_BL2 option with
a generic condition.
v1: First patchset
Achin Gupta (2):
Do not export SCP firmware path on FVP build
MM: Change options to include MM image in ARM TF
atf-build.sh | 33 +++++++++++++++++++++------------
platforms.config | 11 +++++------
2 files changed, 26 insertions(+), 18 deletions(-)
--
1.9.1
From: Achin Gupta <achin.gupta(a)arm.com>
Hi,
This patch fixes two build issues encountered on the Base FVP after
rebasing the AArch64StandaloneMm branch on master (commit 0434ff6). A
proper fix is being tested within ARM since the problem could be present
on Juno as well. Can this patch be applied on the rebased branch since
the proper fix is not ready yet.
cheers,
Achin
Achin Gupta (1):
Platforms/ARM/VExpress: Fixes to build Base FVP platform
Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--
1.9.1
From: Sami Mujawar <sami.mujawar(a)arm.com>
The PL031 Real time Clock Lib was modified recently to
move the common functionality to TimeBaseLib. Therefore
the PL031RealTimeClockLib now has a dependency on the
TimeBaseLib.
Adding TimeBaseLib to ArmVExpress.dsc.inc to fix the
missing dependency for Juno and VExpress-FVP builds.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Sami Mujawar <sami.mujawar(a)arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd(a)arm.com>
---
Platforms/ARM/VExpress/ArmVExpress.dsc.inc | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Platforms/ARM/VExpress/ArmVExpress.dsc.inc b/Platforms/ARM/VExpress/ArmVExpress.dsc.inc
index 1e8ba1b60500433376dcd6dfae3e863c95db8b3f..e293d1af028973b7d6af9889d28cb9da7c36570e 100644
--- a/Platforms/ARM/VExpress/ArmVExpress.dsc.inc
+++ b/Platforms/ARM/VExpress/ArmVExpress.dsc.inc
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2011-2015, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2017, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -90,6 +90,8 @@ [LibraryClasses.common]
!endif
# ARM PL031 RTC Driver
RealTimeClockLib|ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClockLib.inf
+ TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
+
# ARM PL354 SMC Driver
PL35xSmcLib|ArmPlatformPkg/Drivers/PL35xSmc/PL35xSmc.inf
# ARM PL011 UART Driver
--
Guid("CE165669-3EF3-493F-B85D-6190EE5B9759")