Linaro-uefi July 2017

linaro-uefi@lists.linaro.org

8 participants
13 discussions

[PATCH 0/3] Platforms: switch to generic ResetSystemRuntimeDxe

by Ard Biesheuvel

Remove the dependency on the deprecated ResetRuntimeDxe in EmbeddedPkg, by switching to the generic implementation in MdeModulePkg instead. Ard Biesheuvel (3): Platforms/AMD/Styx: switch to generic ResetSystemRuntimeDxe Platforms/Hisilicon: switch to generic ResetSystemRuntimeDxe Platforms/HiKey: switch to generic ResetSystemRuntimeDxe Chips/Hisilicon/Hisilicon.dsc.inc | 2 +- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 4 +- Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf | 2 +- Platforms/AMD/Styx/Library/ResetSystemLib/ResetSystemLib.c | 113 -------------------- Platforms/AMD/Styx/Library/ResetSystemLib/ResetSystemLib.inf | 47 -------- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 4 +- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.fdf | 2 +- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 4 +- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf | 2 +- Platforms/Hisilicon/D02/Pv660D02.dsc | 2 +- Platforms/Hisilicon/D02/Pv660D02.fdf | 2 +- Platforms/Hisilicon/D03/D03.dsc | 2 +- Platforms/Hisilicon/D03/D03.fdf | 2 +- Platforms/Hisilicon/D05/D05.dsc | 2 +- Platforms/Hisilicon/D05/D05.fdf | 2 +- Platforms/Hisilicon/HiKey/HiKey.dsc | 4 +- Platforms/Hisilicon/HiKey/HiKey.fdf | 2 +- 17 files changed, 19 insertions(+), 179 deletions(-) delete mode 100644 Platforms/AMD/Styx/Library/ResetSystemLib/ResetSystemLib.c delete mode 100644 Platforms/AMD/Styx/Library/ResetSystemLib/ResetSystemLib.inf -- 2.9.3

7 years, 5 months

[PATCH 1/2] Drivers/Mmc/DwEmmc: limit max clock for platform

by Jun Nie

Some boards may have max clock limitation. Add a Pcd to notify driver. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jun Nie <jun.nie(a)linaro.org> --- Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.c | 3 +++ Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.dec | 1 + Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.inf | 1 + 3 files changed, 5 insertions(+) diff --git a/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.c b/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.c index fe23d11..c67dd0d 100644 --- a/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.c +++ b/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.c @@ -560,6 +560,9 @@ DwEmmcSetIos ( EFI_STATUS Status = EFI_SUCCESS; UINT32 Data; + if (BusClockFreq > PcdGet32 (PcdDwEmmcDxeMaxClockFrequencyInHz)) + return EFI_UNSUPPORTED; + if (TimingMode != EMMCBACKWARD) { Data = MmioRead32 (DWEMMC_UHSREG); switch (TimingMode) { diff --git a/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.dec b/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.dec index c4bf7ed..7b84a9a 100644 --- a/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.dec +++ b/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.dec @@ -40,3 +40,4 @@ # DwEmmc Driver PCDs gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeBaseAddress|0x0|UINT32|0x00000001 gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|0x0|UINT32|0x00000002 + gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeMaxClockFrequencyInHz|0x0|UINT32|52000000 diff --git a/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.inf b/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.inf index c0cbba7..99176f1 100644 --- a/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.inf +++ b/Drivers/Mmc/DwEmmcDxe/DwEmmcDxe.inf @@ -49,6 +49,7 @@ [Pcd] gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeBaseAddress gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz + gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeMaxClockFrequencyInHz [Depex] TRUE -- 1.9.1

7 years, 5 months

How to add support to different reg offset definition to share the same driver code?

by Jun Nie

Hi, I am trying to add support to different reg offset and bit offset in PL011 UART. It seems impossible to add macro in platform.dsc to enable undef/redef in the header file with "#ifdef ZX_PL011_FLAG". Is there any proper way to control the reg/bit offset definition? Or we have to adopt the Linux driver method with a structure to hold different offset value and wrap register access function as below? If so, another Pcd is needed to specify the offset structure index for the platforms. static u16 pl011_st_offsets[REG_ARRAY_SIZE] = { [REG_DR] = UART01x_DR, [REG_ST_DMAWM] = ST_UART011_DMAWM, [REG_ST_TIMEOUT] = ST_UART011_TIMEOUT, ... } static unsigned int pl011_read(const struct uart_amba_port *uap, unsigned int reg) { void __iomem *addr = uap->port.membase + uap->reg_offset[reg]; return (uap->port.iotype == UPIO_MEM32) ? readl_relaxed(addr) : readw_relaxed(addr); } Jun

7 years, 5 months

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Linaro-uefi July 2017