Main Change since v1:
1 Modify comments;
Code can also be found in github:
https://github.com/hisilicon/OpenPlatformPkg.git
branch: d06-acs-non-osi-v2
Ming Huang (4):
Hisilicon/D06: Add cpu on/off feature in TrustedFirmware
Hisilicon/D06: Fix SBSA test case 42 failed issues
Hisilicon/D06: Fix set usb reg failed issue
Hisilicon/D06: Fix SBSA PE-15 failed issue
Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi | Bin 229216 -> 232832 bytes
Platform/Hisilicon/D06/bl1.bin | Bin 12432 -> 12432 bytes
Platform/Hisilicon/D06/fip.bin | Bin 113578 -> 113450 bytes
3 files changed, 0 insertions(+), 0 deletions(-)
--
2.9.5
The major features of this patchset include:
1. Modify acpi table for ACS test;
2. Enable secure boot for SBBR-SCT;
3. Other change for ACS test;
For this SCT issue:
RT.SetVariable - Create one Time Base Auth Variable, the expect return status
should be EFI_SUCCESS – FAILURE
The resule of fail is effected by the edk2 commit(67943427).
If Modify Variable.c as below, this case will pass.
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
@@ -3188,7 +3188,7 @@ VariableServiceSetVariable (
// Maybe it's the delete operation of common authenticated variable at
// user physical presence.
//
if (DataSize != AUTHINFO_SIZE) {
- return EFI_UNSUPPORTED;
+ return EFI_SECURITY_VIOLATION;
I supect ACS SCT compatible with UEFI 2.7 spec. We will analyze this issue
continue.
Code can also be found in github:
https://github.com/hisilicon/OpenPlatformPkg.git
branch: d06-acs-platforms
Ming Huang (12):
Silicon/Hisilicon/D06: Add watchdog to GTDT
Silicon/Hisilicon/D06: Drop _CID for fwts issue
Silicon/Hisilicon/D06: Fix fwts issue in Dbg2
Silicon/Hisilicon/D06: Fix fwts issue in FADT
Hisilicon/D06: Move some functions to OemMiscLib
Silicon/Hisilicon: Modify for SBBR fwts SetTime_Func test case
Hisilicon/D0x: Fix secure boot bug in FlashFvbDxe
Hisilicon/D06: Fix SBBR-SCT AuthVar issue
Silicon/Hisilicon/D06: Reserve ECAM resource in DSDT
Silicon/Hisilicon/D06: Modify GTDT timer flag
Hisilicon/D06: Modify Gic base
Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot
Silicon/Hisilicon/HisiPkg.dec | 1 +
Silicon/Hisilicon/Hisilicon.dsc.inc | 16 ++
Platform/Hisilicon/D03/D03.dsc | 5 +
Platform/Hisilicon/D05/D05.dsc | 5 +
Platform/Hisilicon/D06/D06.dsc | 9 +-
.../Drivers/FlashFvbDxe/FlashFvbDxe.inf | 2 +
.../M41T83RealTimeClockLib.inf | 3 +-
.../Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 2 +-
.../Hisilicon/Include/Library/OemMiscLib.h | 9 +
.../M41T83RealTimeClock.h | 8 +-
.../D06/Library/OemMiscLibD06/OemMiscLibD06.c | 82 ++++++
.../Drivers/FlashFvbDxe/FlashFvbDxe.c | 14 +-
.../M41T83RealTimeClockLib.c | 263 ++++++++++++------
.../Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 1 -
.../Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 48 ----
.../Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 36 ++-
.../Hi1620/Hi1620AcpiTables/Fadt.aslc | 2 +-
.../Hi1620/Hi1620AcpiTables/Gtdt.aslc | 35 +--
.../Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 4 +-
.../Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 18 +-
.../Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 194 ++++++-------
.../Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 2 +-
22 files changed, 475 insertions(+), 284 deletions(-)
--
2.18.0
This patch set include:
1 Add cpu on/off support for SBSA PE test;
2 Modify IoInitDxe.efi for SBSA test issue.
Code can also be found in github:
https://github.com/hisilicon/OpenPlatformPkg.git
branch: d06-acs-non-osi
Ming Huang (4):
Hisilicon/D06: Add cpu on/off feature in TrustedFirmware
Hisilicon/D06: Fix SBSA test case 42 failed issues
Hisilicon/D06: Fix set usb reg failed issue
Hisilicon/D06: Fix SBSA PE-15 failed issue
.../D06/Drivers/IoInitDxe/IoInitDxe.efi | Bin 229216 -> 230816 bytes
Platform/Hisilicon/D06/bl1.bin | Bin 12432 -> 12432 bytes
Platform/Hisilicon/D06/fip.bin | Bin 113578 -> 113450 bytes
3 files changed, 0 insertions(+), 0 deletions(-)
--
2.18.0
Hi Ming,
A while back, I forwarded to Al Stone (on cc) the issues we were
having with different versions of acpica-tools and the D06 ACPI table
generation.
He's come back with a few bugs he found in the .asl, as well as a
weird bug in iasl ... apparently only reproducible under Fedora.
Since the latter has not been fully investigated yet, I'll ignore that
until someone flags this as an issue for them.
I'm attaching a simple patch that resolves all the issues on current
master. Can you please turn this into a proper patch and send out
(giving Al a Reported-by:)?
Main gist is reformatting some of the IORT into a form the current
acpica-tools can handle, but there are also some bugfixes and closing
of comment blocks.
Once I have given feedback for v1 of your edk2-platforms series,
please rebase that onto a version that incorporates these fixes for
v2.
Best Regards,
Leif
>From 5651683495f3d36c886f97db17976c9a6eac7b47 Mon Sep 17 00:00:00 2001
From: Leif Lindholm <leif.lindholm(a)linaro.org>
Date: Mon, 29 Oct 2018 16:34:23 +0000
Subject: [PATCH edk2-platforms] ahs3-fixes
---
Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 32 +++++++-------------
Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620IortNoSmmu.asl | 2 ++
2 files changed, 13 insertions(+), 21 deletions(-)
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl
index 33b5d5250b..4037ea4f1b 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl
+++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl
@@ -53,9 +53,7 @@
[0004] PRI Interrupt : 00000000
[0004] GERR Interrupt : 00000000
[0004] Sync Interrupt : 00000000
-[0001] Proximity Domain : 01
-[0001] Reserved : 00
-[0002] Reserved : 0000
+[0001] Proximity Domain : 00000001
[0004] DeviceID mapping index : 00000002
[0004] Input base : 00000000
@@ -99,9 +97,7 @@
[0004] PRI Interrupt : 00000000
[0004] GERR Interrupt : 00000000
[0004] Sync Interrupt : 00000000
-[0001] Proximity Domain : 01
-[0001] Reserved : 00
-[0002] Reserved : 0000
+[0001] Proximity Domain : 00000001
[0004] DeviceID mapping index : 0001
[0004] Input base : 00007c00
@@ -139,9 +135,7 @@
[0004] PRI Interrupt : 00000000
[0004] GERR Interrupt : 00000000
[0004] Sync Interrupt : 00000000
-[0001] Proximity Domain : 01
-[0001] Reserved : 00
-[0002] Reserved : 0000
+[0001] Proximity Domain : 00000001
[0004] DeviceID mapping index : 00000001
[0004] Input base : 00007400
@@ -179,9 +173,7 @@
[0004] PRI Interrupt : 00000000
[0004] GERR Interrupt : 00000000
[0004] Sync Interrupt : 00000000
-[0001] Proximity Domain : 03
-[0001] Reserved : 00
-[0002] Reserved : 0000
+[0001] Proximity Domain : 00000003
[0004] DeviceID mapping index : 00000002
[0004] Input base : 00008000
@@ -225,9 +217,7 @@
[0004] PRI Interrupt : 00000000
[0004] GERR Interrupt : 00000000
[0004] Sync Interrupt : 00000000
-[0001] Proximity Domain : 03
-[0001] Reserved : 00
-[0002] Reserved : 0000
+[0001] Proximity Domain : 00000003
[0004] DeviceID mapping index : 0001
[0004] Input base : 0000BC00
@@ -265,9 +255,7 @@
[0004] PRI Interrupt : 00000000
[0004] GERR Interrupt : 00000000
[0004] Sync Interrupt : 00000000
-[0001] Proximity Domain : 03
-[0001] Reserved : 00
-[0002] Reserved : 0000
+[0001] Proximity Domain : 00000003
[0004] DeviceID mapping index : 00000001
[0004] Input base : 0000B400
@@ -290,7 +278,7 @@
[0001] Revision : 00
[0004] Reserved : 00000000
[0004] Mapping Count : 0000000C
-[0004] Mapping Offset : 00000028
+[0004] Mapping Offset : 00000024
[0008] Memory Properties : [IORT Memory Access Properties]
[0004] Cache Coherency : 00000001
@@ -305,6 +293,8 @@
Device Attribute : 0
[0004] ATS Attribute : 00000000
[0004] PCI Segment Number : 00000000 // should match with above MCFG
+ Memory Size Limit : 00
+ Reserved : 00000000
/* BDF of pcie host 0 -> stream ID of pcie 0/1 SMMU */
[0004] Input base : 00000000
@@ -322,7 +312,7 @@
[0004] Flags (decoded below) : 00000000
Single Mapping : 1
-/* host2 and host3 should no open smmu for chips smmu bug *
+/* host2 and host3 should no open smmu for chips smmu bug */
/* BDF of pcie host 2 -> stream ID of pcie 0/1 ITS */
[0004] Input base : 00007a00
[0004] ID Count : 00000100 // the number of IDs in range
@@ -371,7 +361,7 @@
[0004] Flags (decoded below) : 00000000
Single Mapping : 1
-/* host8 and host9 should no open smmu for chips smmu bug *
+/* host8 and host9 should no open smmu for chips smmu bug */
/* BDF of pcie host 8 -> stream ID of pcie ITS */
[0004] Input base : 0000BA00
[0004] ID Count : 00000100 // the number of IDs in range
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620IortNoSmmu.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620IortNoSmmu.asl
index 63d11b83eb..f4bef6ec89 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620IortNoSmmu.asl
+++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620IortNoSmmu.asl
@@ -54,6 +54,8 @@
Device Attribute : 0
[0004] ATS Attribute : 00000000
[0004] PCI Segment Number : 00000000 // should match with above MCFG
+ Memory Size Limit : 00
+ Reserved : 00000000
/* BDF of pcie host 0 -> stream ID of pcie 0/1 SMMU */
[0004] Input base : 00000000
--
2.11.0