Linaro-uefi

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811 discussions

Need for a patch to enable HYP mode in UEFI on Versatile board

by Kim Danny

Hi, all. Do you have any patch file (if exists, it's the best), idea, or tip to enable HYP mode in UEFI on Versatile board? I've been searching for the patch file; however, I couldn't find any. I would appreciate it if you help me. Thank you. Regards, Danny Kim

9 years, 1 month

[PATCH] Platforms/ARM: Juno: Acpi - DBG2 to aslc for UART1

by evan.lloyd＠arm.com

From: Sami Mujawar <sami.mujawar(a)arm.com> The DBG2 table is used to publish the presence of debug ports available on a system. The existing DBG2 table implementation configures the Juno UART0 port to be used for SPCR and DBG2. This prevents the usage of the Operating System Debugger when the EMS terminal is active. This patch: 1. Changes the usage of the UART ports as below: - Juno UART0 - for UEFI serial terminal and SPCR port. - Juno UART1 - for debug port. 2. It also replaces the Dbg2.asl file which described the DBG2 table in TDL format with Dbg2.aslc, which allows more flexibility by way of allowing the usage of PCDs. Dependency: * This patch requires ARM Trusted Firmware to configure the UART1 for Non-Secure World access. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Alexei Fedorov <alexei.fedorov(a)arm.com> Signed-off-by: Girish Pathak <girish.pathak(a)arm.com> Signed-off-by: Sami Mujawar <sami.mujawar(a)arm.com> Signed-off-by: Evan Lloyd <evan.lloyd(a)arm.com> --- Platforms/ARM/Juno/AcpiTables/AcpiTables.inf | 4 +- Platforms/ARM/Juno/AcpiTables/Dbg2.asl | 72 --------------- Platforms/ARM/Juno/AcpiTables/Dbg2.aslc | 92 ++++++++++++++++++++ Platforms/ARM/Juno/ArmJuno.dsc | 5 ++ 4 files changed, 100 insertions(+), 73 deletions(-) diff --git a/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf b/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf index 412f43d..076110c 100644 --- a/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf +++ b/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf @@ -23,7 +23,7 @@ [Sources] Dsdt.asl - Dbg2.asl + Dbg2.aslc Spcr.aslc Facs.aslc Fadt.aslc @@ -60,3 +60,5 @@ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate gArmPlatformTokenSpaceGuid.PL011UartClkInHz gArmPlatformTokenSpaceGuid.PL011UartInterrupt + + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase diff --git a/Platforms/ARM/Juno/AcpiTables/Dbg2.asl b/Platforms/ARM/Juno/AcpiTables/Dbg2.asl deleted file mode 100644 index f57fa7e..0000000 --- a/Platforms/ARM/Juno/AcpiTables/Dbg2.asl +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Copyright (c) 2015, Graeme Gregory <graeme.gregory(a)linaro.org> - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - * NB: This License is also known as the "BSD 2-Clause License". - * - * - * [DBG2] ACPI Table - * - */ - -[0004] Signature : "DBG2" [Debug Port table type 2] -[0004] Table Length : 0000005A -[0001] Revision : 00 -[0001] Checksum : 06 -[0006] Oem ID : "LINARO" -[0008] Oem Table ID : "ARM-JUNO" -[0004] Oem Revision : 00000000 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20140926 - -[0004] Info Offset : 0000002C -[0004] Info Count : 00000001 - -[0001] Revision : 00 -[0002] Length : 002C -[0001] Register Count : 01 -[0002] Namepath Length : 0005 -[0002] Namepath Offset : 0026 -[0002] OEM Data Length : 0000 [Optional field not present] -[0002] OEM Data Offset : 0000 [Optional field not present] -[0002] Port Type : 8000 -[0002] Port Subtype : 0003 -[0002] Reserved : 0000 -[0002] Base Address Offset : 0016 -[0002] Address Size Offset : 0022 - -[000C] Base Address Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 20 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 03 [DWord Access:32] -[0008] Address : 000000007FF80000 - -[0004] Address Size : 00001000 - -[0004] Namepath : "COM1" -[0001] OEM Data : 00 diff --git a/Platforms/ARM/Juno/AcpiTables/Dbg2.aslc b/Platforms/ARM/Juno/AcpiTables/Dbg2.aslc new file mode 100644 index 0000000..adb0650 --- /dev/null +++ b/Platforms/ARM/Juno/AcpiTables/Dbg2.aslc @@ -0,0 +1,92 @@ +/** @file +* DBG2 Table +* +* Copyright (c) 2012-2016, ARM Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include "ArmPlatform.h" +#include <Library/AcpiLib.h> +#include <Library/ArmLib.h> +#include <Library/PcdLib.h> +#include <IndustryStandard/Acpi.h> +#include <IndustryStandard/DebugPort2Table.h> + +#pragma pack(1) + +#define DBG2_NUM_DEBUG_PORTS 1 +#define DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS 1 +#define DBG2_NAMESPACESTRING_FIELD_SIZE 8 +#define PL011_UART_LENGTH 0x1000 + +#define NAME_STR_UART1 {'C', 'O', 'M', '1', '\0', '\0', '\0', '\0'} + +typedef struct { + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device; + EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister; + UINT32 AddressSize; + UINT8 NameSpaceString[DBG2_NAMESPACESTRING_FIELD_SIZE]; +} DBG2_DEBUG_DEVICE_INFORMATION; + +typedef struct { + EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description; + DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo[DBG2_NUM_DEBUG_PORTS]; +} DBG2_TABLE; + + +#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) { \ + { \ + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION, /* UINT8 Revision */ \ + sizeof (DBG2_DEBUG_DEVICE_INFORMATION), /* UINT16 Length */ \ + NumReg, /* UINT8 NumberofGenericAddressRegisters */ \ + DBG2_NAMESPACESTRING_FIELD_SIZE, /* UINT16 NameSpaceStringLength */ \ + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString), /* UINT16 NameSpaceStringOffset */ \ + 0, /* UINT16 OemDataLength */ \ + 0, /* UINT16 OemDataOffset */ \ + EFI_ACPI_DBG2_PORT_TYPE_SERIAL, /* UINT16 Port Type */ \ + SubType, /* UINT16 Port Subtype */ \ + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, /* UINT8 Reserved[2] */ \ + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* UINT16 BaseAddressRegister Offset */ \ + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize) /* UINT16 AddressSize Offset */ \ + }, \ + ARM_GAS32 (UartBase), /* EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \ + UartAddrLen, /* UINT32 AddressSize */ \ + UartNameStr /* UINT8 NameSpaceString[MAX_DBG2_NAME_LEN] */ \ + } + + +STATIC DBG2_TABLE Dbg2 = { + { + ARM_ACPI_HEADER (EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE, + DBG2_TABLE, + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION), + OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo), + DBG2_NUM_DEBUG_PORTS // UINT32 NumberDbgDeviceInfo + }, + { + /* + * Kernel Debug Port + */ + DBG2_DEBUG_PORT_DDI (DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS, + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART, + FixedPcdGet64 (PcdSerialDbgRegisterBase), + PL011_UART_LENGTH, + NAME_STR_UART1), + } +}; + +#pragma pack() + +// +// Reference the table being generated to prevent the optimizer from removing the +// data structure from the executable +// +VOID* CONST ReferenceAcpiTable = &Dbg2; diff --git a/Platforms/ARM/Juno/ArmJuno.dsc b/Platforms/ARM/Juno/ArmJuno.dsc index 3e17831..3a15285 100644 --- a/Platforms/ARM/Juno/ArmJuno.dsc +++ b/Platforms/ARM/Juno/ArmJuno.dsc @@ -129,6 +129,11 @@ gArmPlatformTokenSpaceGuid.PL011UartClkInHz|7372800 gArmPlatformTokenSpaceGuid.PL011UartInterrupt|115 + ## PL011 - Serial Debug UART + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x7FF70000 + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|7372800 + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|115200 + ## PL031 RealTimeClock gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000 -- 2.7.0

9 years, 1 month

Linux Tftpboot on ARM64

by Bhupesh Sharma

Hi Ryan, We are trying to boot Linux via tftp command on our NXP ARMv8 board. I found some relevant information about how this was tried and enabled on ARM Juno: 1. https://lists.linaro.org/pipermail/linaro-uefi/2015-January/000653.html 2. https://wiki.linaro.org/WorkingGroups/Kernel/ARMv8/TFTPJunoBoard We are able to use the tftp command on the Shell to get a kernel Image file from network and write it to a filesystem (for e.g. on a FAT32 formatted SD card). Now, I was wondering how we can use the same in conjunction with the LinuxLoader.efi application to tftp the 'kernel and rfs' images from network and pass the same to the LinuxLoader.efi, which can in-turn boot the kernel Image. Can you please let me know if my understanding is correct and point us to how this is achieved on ARM Juno. Thanks for the help. Regards, Bhupesh

9 years, 1 month

[PATCH 0/2] OpenPlatformPkg: implement EFI_RNG_PROTOCOL for Juno

by Ard Biesheuvel

Since my KASLR implementation for arm64 Linux is based on the EFI_RNG_PROTOCOL (at least for UEFI systems), which is not yet widely available on systems that are under developement currently, this implements a pseudo-random version for ARM Juno. This code is not suitable for production, but since Juno is strictly a development platform, that concern does not apply here. Note that the library is delivered as a binary which prints a warning to the console the first time it is called. Ard Biesheuvel (2): Platforms/ARM: implement a pseudo-random version of RngLib Platforms/ArmJuno: add RngDxe based on PseudoRngLib Platforms/ARM/Drivers/PseudoRngLib/License.txt | 19 ++++++++++ Platforms/ARM/Drivers/PseudoRngLib/PseudoRngLib.inf | 38 ++++++++++++++++++++ Platforms/ARM/Drivers/PseudoRngLib/PseudoRngLib.lib | Bin 0 -> 29610 bytes Platforms/ARM/Drivers/PseudoRngLib/README | 8 +++++ Platforms/ARM/Juno/ArmJuno.dsc | 8 +++++ Platforms/ARM/Juno/ArmJuno.fdf | 5 +++ 6 files changed, 78 insertions(+) create mode 100644 Platforms/ARM/Drivers/PseudoRngLib/License.txt create mode 100644 Platforms/ARM/Drivers/PseudoRngLib/PseudoRngLib.inf create mode 100644 Platforms/ARM/Drivers/PseudoRngLib/PseudoRngLib.lib create mode 100644 Platforms/ARM/Drivers/PseudoRngLib/README -- 2.5.0

9 years, 1 month

[PATCH] Platforms/ARM: Juno: Acpi - fix GTDT.

by evan.lloyd＠arm.com

From: Sami Mujawar <sami.mujawar(a)arm.com> The wrong type name is used in the definition of the GTDT, causing the header to have an incorrect size value. EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE is changed to EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES to rectify this. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Evan Lloyd <evan.lloyd(a)arm.com> --- Platforms/ARM/Juno/AcpiTables/Gtdt.aslc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Platforms/ARM/Juno/AcpiTables/Gtdt.aslc b/Platforms/ARM/Juno/AcpiTables/Gtdt.aslc index c0e3f5f..1c258fc 100644 --- a/Platforms/ARM/Juno/AcpiTables/Gtdt.aslc +++ b/Platforms/ARM/Juno/AcpiTables/Gtdt.aslc @@ -1,7 +1,7 @@ /** @file * Generic Timer Description Table (GTDT) * -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved. +* Copyright (c) 2012 - 2016, ARM Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -70,7 +70,7 @@ { ARM_ACPI_HEADER( EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, - EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE, + EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES, EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION ), SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress -- 2.7.0

9 years, 1 month

[PATCH] EmbeddedPkg/AndroidFastbootTransportTcpDxe: Resolved compiler and build warnings

by Shivamurthy Shastri

Resolved below errors: 1. Variable 'gEfiHostnameVariableGuid' used, but not defined GUID. 2. File 'Hostname.h' is included, but it is not available in source. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Shivamurthy Shastri <shivamurthy.shastri(a)linaro.org> --- EmbeddedPkg/EmbeddedPkg.dec | 2 ++ EmbeddedPkg/Include/Guid/Hostname.h | 20 ++++++++++++++++++++ 2 files changed, 22 insertions(+) create mode 100644 EmbeddedPkg/Include/Guid/Hostname.h diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec index cd0d96f..2617323 100644 --- a/EmbeddedPkg/EmbeddedPkg.dec +++ b/EmbeddedPkg/EmbeddedPkg.dec @@ -55,6 +55,8 @@ # Include/Guid/FdtHob.h gFdtHobGuid = { 0x16958446, 0x19B7, 0x480B, { 0xB0, 0x47, 0x74, 0x85, 0xAD, 0x3F, 0x71, 0x6D } } gFdtVariableGuid = { 0x25a4fd4a, 0x9703, 0x4ba9, { 0xa1, 0x90, 0xb7, 0xc8, 0x4e, 0xfb, 0x3e, 0x57 } } + # Include/Guid/Hostname.h + gEfiHostnameVariableGuid = { 0xf1851fe8, 0x7d79, 0x43fb, { 0xae, 0x4c, 0x65, 0x7d, 0xd8, 0xd3, 0xc8, 0x80 } } [Protocols.common] gHardwareInterruptProtocolGuid = { 0x2890B3EA, 0x053D, 0x1643, { 0xAD, 0x0C, 0xD6, 0x48, 0x08, 0xDA, 0x3F, 0xF1 } } diff --git a/EmbeddedPkg/Include/Guid/Hostname.h b/EmbeddedPkg/Include/Guid/Hostname.h new file mode 100644 index 0000000..6789d89 --- /dev/null +++ b/EmbeddedPkg/Include/Guid/Hostname.h @@ -0,0 +1,20 @@ +/** @file +* +* Copyright (c) 2015, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef __HOSTNAME_H__ +#define __HOSTNAME_H__ + +extern EFI_GUID gEfiHostnameVariableGuid; + +#endif /* __HOSTNAME_H__ */ -- 1.9.1

9 years, 1 month

[PATCH 0/3] Fix PL180 for Versatile Express TC2

by Ryan Harkin

These simple fixes get the Versatile Express TC2 board booting properly and restore PL180 functionalily. [PATCH 1/3] ArmPlatformPkg/PL180MciDxe: fix Depex for TC2 [PATCH 2/3] ArmPlatformPkg/PL180MciDxe: warn on probe fail [PATCH 3/3] ArmPlatformPkg/PL180MciDxe: don't check ID_REG3

9 years, 1 month

PL180MciDxe problem with TC2

by Ryan Harkin

Hi Ard/Leif/anyone who cares, So I was trying to work out who broke MMC support in TC2 in the upstream EDK2 tree. It was difficult because the tree is borked on TC2 in so many interesting ways throughout history, but I eventually bisected down to this patch: 300fc77 2015-08-25 ArmPlatformPkg/PL180MciDxe: check PrimeCell ID before initializing [Ard Biesheuvel] Basically, TC2 reads 0x02 for MCI_PERIPH_ID_REG3, when, according to the spec, the register is supposed to read 0x00 in all cases. So the driver doesn't probe and is never initialised. I guess this is an FPGA bug in TC2? It's probably known about, but not to me ;-) Anyway, how to fix it?? We could mask off the "stuck" bit, we could not check ID_REG3, there are other things we could do. I decided to mask off the bit rather than discard the register check in my patch below, just to get things working But would you like to do? For extra point.... this was extra fun to track down due to other problems. TC2 stopped booting since this patch was submitted d340ef7 2014-08-26 ArmPkg/ArmArchTimerLib: Remove non required [depex] and IoLib [Olivier Martin] I've always carried a revert patch in my tree because I was previously told I was wrong and that it wasn't a problem, even though it clearly is. TC2 is spewing out a constant stream of this message: IRQ Exception PC at 0xBFB74C20 CPSR 0x60000133 It wasn't fixed until Ard's patch that broke MMC support. Ugh! I'm suspecting that the MMC support has a dependency on IoLib - for that is the part of the patch that broke TC2 in the first place. But I have yet to investigate that problem; I don't even know what IoLib is. So until this 2nd problem is fixed, I really don't want to submit a fix to the PL180 problem or I'll have a dead TC2 port again :-/ Cheers, Ryan. --- ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h | 3 +++ ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c | 26 +++++++++++++++++++++++++- 2 files changed, 28 insertions(+), 1 deletion(-) diff --git a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h index ce38a9e..8d36456 100644 --- a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h +++ b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h @@ -64,11 +64,14 @@ #define MCI_PERIPH_ID1 0x11 #define MCI_PERIPH_ID2 0x04 #define MCI_PERIPH_ID3 0x00 +#define MCI_PERIPH_ID3_TC2 0x02 #define MCI_PCELL_ID0 0x0D #define MCI_PCELL_ID1 0xF0 #define MCI_PCELL_ID2 0x05 #define MCI_PCELL_ID3 0xB1 +#define MCI_PERIPH_ID3_MASK (~0x02) + #define MCI_POWER_OFF 0 #define MCI_POWER_UP BIT1 #define MCI_POWER_ON (BIT1 | BIT0) diff --git a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c index 688cd8a..8ae88b3 100644 --- a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c +++ b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c @@ -520,6 +520,14 @@ PL180MciDxeInitialize ( { EFI_STATUS Status; EFI_HANDLE Handle; + UINT8 r1 = MmioRead8 (MCI_PERIPH_ID_REG0); + UINT8 r2 = MmioRead8 (MCI_PERIPH_ID_REG1); + UINT8 r3 = MmioRead8 (MCI_PERIPH_ID_REG2); + UINT8 r4 = MmioRead8 (MCI_PERIPH_ID_REG3); + UINT8 r5 = MmioRead8 (MCI_PCELL_ID_REG0); + UINT8 r6 = MmioRead8 (MCI_PCELL_ID_REG1); + UINT8 r7 = MmioRead8 (MCI_PCELL_ID_REG2); + UINT8 r8 = MmioRead8 (MCI_PCELL_ID_REG3); DEBUG ((EFI_D_WARN, "Probing ID registers at 0x%lx for a PL180\n", MCI_PERIPH_ID_REG0)); @@ -528,14 +536,30 @@ PL180MciDxeInitialize ( if (MmioRead8 (MCI_PERIPH_ID_REG0) != MCI_PERIPH_ID0 || MmioRead8 (MCI_PERIPH_ID_REG1) != MCI_PERIPH_ID1 || MmioRead8 (MCI_PERIPH_ID_REG2) != MCI_PERIPH_ID2 || - MmioRead8 (MCI_PERIPH_ID_REG3) != MCI_PERIPH_ID3 || + (MmioRead8 (MCI_PERIPH_ID_REG3) & MCI_PERIPH_ID3_MASK) != MCI_PERIPH_ID3 || MmioRead8 (MCI_PCELL_ID_REG0) != MCI_PCELL_ID0 || MmioRead8 (MCI_PCELL_ID_REG1) != MCI_PCELL_ID1 || MmioRead8 (MCI_PCELL_ID_REG2) != MCI_PCELL_ID2 || MmioRead8 (MCI_PCELL_ID_REG3) != MCI_PCELL_ID3) { + DEBUG ((EFI_D_ERROR, "PL180MciDxeInitialize(): Failed to probe PL180\n")); + DEBUG ((EFI_D_ERROR, "PL180MciDxeInitialize(): want: %x,%x,%x,%x,%x,%x,%x,%x\n", + MCI_PERIPH_ID0, + MCI_PERIPH_ID1, + MCI_PERIPH_ID2, + MCI_PERIPH_ID3, + MCI_PCELL_ID0, + MCI_PCELL_ID1, + MCI_PCELL_ID2, + MCI_PCELL_ID3 + )); + + DEBUG ((EFI_D_ERROR, "PL180MciDxeInitialize(): read: %x,%x,%x,%x,%x,%x,%x,%x\n", r1, r2, r3, r4, r5, r6, r7, r8)); return EFI_NOT_FOUND; } + else { + DEBUG ((EFI_D_ERROR, "PL180MciDxeInitialize(): Probe succeeded\n")); + } Handle = NULL; -- 2.5.0

9 years, 1 month

[PATCH] platforms.config: update hikey build path

by Haojian Zhuang

Since hikey is rebased on OpenPlatformPkg tree, update the build path of hikey platform. Signed-off-by: Haojian Zhuang <haojian.zhuang(a)linaro.org> --- platforms.config | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/platforms.config b/platforms.config index f9c07ea..baaf18a 100644 --- a/platforms.config +++ b/platforms.config @@ -170,7 +170,7 @@ UEFI_IMAGE_DIR=Overdrive [hikey] LONGNAME=CircuitCo HiKey -DSC=HisiPkg/HiKeyPkg/HiKey.dsc +DSC=OpenPlatformPkg/Platforms/Hisilicon/HiKey/HiKey.dsc ARCH=AARCH64 UEFI_BIN=BL33_AP_UEFI.fd UEFI_IMAGE_DIR=HiKey @@ -178,7 +178,7 @@ BUILD_ATF=yes ATF_SPD=opteed TOS_BIN=tee.bin BUILD_TOS=yes -SCP_BIN=HisiPkg/HiKeyPkg/NonFree/mcuimage.bin +SCP_BIN=OpenPlatformPkg/Platforms/Hisilicon/HiKey/Binary/mcuimage.bin # Uncomment this to use UART0 as the EDK2 console #BUILDFLAGS=-DSERIAL_BASE=0xF8015000 # Uncomment this to use UART0 as the ARM Trusted Firmware console -- 1.9.1

9 years, 1 month

[PATCH] Platforms/ARM: ArmVexpress.dsc.inc - update debug levels

by Leif Lindholm

The comments on PcdDebugPrintErrorLevel are clearly based on a version of MdePkg/Include/Library/DebugLib.h predating SVN r12933. Bring up to date to reduce confusion (and fix a couple of mistakes). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm(a)linaro.org> --- Platforms/ARM/VExpress/ArmVExpress.dsc.inc | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/Platforms/ARM/VExpress/ArmVExpress.dsc.inc b/Platforms/ARM/VExpress/ArmVExpress.dsc.inc index 61912ef..7d07d39 100644 --- a/Platforms/ARM/VExpress/ArmVExpress.dsc.inc +++ b/Platforms/ARM/VExpress/ArmVExpress.dsc.inc @@ -344,19 +344,20 @@ # DEBUG_WARN 0x00000002 // Warnings # DEBUG_LOAD 0x00000004 // Load events # DEBUG_FS 0x00000008 // EFI File system - # DEBUG_POOL 0x00000010 // Alloc & Free's - # DEBUG_PAGE 0x00000020 // Alloc & Free's - # DEBUG_INFO 0x00000040 // Verbose + # DEBUG_POOL 0x00000010 // Alloc & Free (pool) + # DEBUG_PAGE 0x00000020 // Alloc & Free (page) + # DEBUG_INFO 0x00000040 // Informational debug messages # DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers # DEBUG_VARIABLE 0x00000100 // Variable # DEBUG_BM 0x00000400 // Boot Manager # DEBUG_BLKIO 0x00001000 // BlkIo Driver # DEBUG_NET 0x00004000 // SNI Driver # DEBUG_UNDI 0x00010000 // UNDI Driver - # DEBUG_LOADFILE 0x00020000 // UNDI Driver + # DEBUG_LOADFILE 0x00020000 // LoadFile # DEBUG_EVENT 0x00080000 // Event messages # DEBUG_GCD 0x00100000 // Global Coherency Database changes # DEBUG_CACHE 0x00200000 // Memory range cachability changes + # DEBUG_VERBOSE 0x00400000 // Detailed debug messages that may significantly impact boot performance # DEBUG_ERROR 0x80000000 // Error gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F -- 2.1.4

9 years, 1 month

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