Re: [Linaro-uefi] [PATCH v5 03/22] Platforms/Marvell: Create MppLib

30 Jun 2016

On Wed, Jun 22, 2016 at 06:02:37PM +0200, Marcin Wojtas wrote:
...
From: Jan Dąbroś jsd@semihalf.com

Create Mpp Library, which allows to set MPP on board.
Create Platforms/Marvell/Marvell.dec file, which holds PCDs' declaration.
Export configuration capabilities via PCDs.
Prepare porting guide document

Because GetMppPcd has to be adjusted to possible 8 MPP registers,
although unused, additional PcdChip<X>MppSel are added in order to
satisfy preprocessor demands. For the same reason there are MPP
PCDs for all of 4 possible chips.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jan Dabros jsd@semihalf.com
Signed-off-by: Marcin Wojtas mw@semihalf.com
Reviewed-by: Leif Lindholm leif.lindholm@linaro.org
...

Documentation/Marvell/PortingGuide/Mpp.txt  |  48 ++++++++
 Platforms/Marvell/Include/Library/MppLib.h  |  42 +++++++
 Platforms/Marvell/Library/MppLib/MppLib.c   | 163 ++++++++++++++++++++++++++++
 Platforms/Marvell/Library/MppLib/MppLib.inf | 107 ++++++++++++++++++
 Platforms/Marvell/Marvell.dec               | 106 ++++++++++++++++++
 5 files changed, 466 insertions(+)
 create mode 100644 Documentation/Marvell/PortingGuide/Mpp.txt
 create mode 100644 Platforms/Marvell/Include/Library/MppLib.h
 create mode 100644 Platforms/Marvell/Library/MppLib/MppLib.c
 create mode 100644 Platforms/Marvell/Library/MppLib/MppLib.inf
 create mode 100644 Platforms/Marvell/Marvell.dec

diff --git a/Documentation/Marvell/PortingGuide/Mpp.txt b/Documentation/Marvell/PortingGuide/Mpp.txt
new file mode 100644
index 0000000..3e36b5f
--- /dev/null
+++ b/Documentation/Marvell/PortingGuide/Mpp.txt
@@ -0,0 +1,48 @@
+MPP configuration
+-----------------
+Multi-Purpose Ports (MPP) are configurable through platform PCDs.
+In order to set desired pin multiplexing, .dsc file needs to be modified.
+(OpenPlatformPkg/Platforms/Marvell/Armada/{platform_name}.dsc - please refer to
+Documentation/Build.txt for currently supported {platftorm_name} )
+Following PCDs are available:


gMarvellTokenSpaceGuid.PcdMppChipCount


+Indicates how many different chips are placed on board. So far up to 4 chips
+are supported.



+Every MPP PCD has <Num> part where

<Num> stands for chip ID (order is not important, but configuration will be
set for first PcdMppChipCount chips).


+Below is example for the first chip (Chip0).


gMarvellTokenSpaceGuid.PcdChip0MppReverseFlag


+Indicates that register order is reversed. (Needs to be used only for AP806-Z1)


gMarvellTokenSpaceGuid.PcdChip0MppBaseAddress


+This is base address for MPP configuration register.


gMarvellTokenSpaceGuid.PcdChip0MppPinCount


+Defines how many MPP pins are available.


gMarvellTokenSpaceGuid.PcdChip0MppSel0
gMarvellTokenSpaceGuid.PcdChip0MppSel1
gMarvellTokenSpaceGuid.PcdChip0MppSel2


+This registers defines functions of 10 pins in ascending order.



+Examples
+--------
+#APN806-A0 MPP SET

gMarvellTokenSpaceGuid.PcdChip0MppReverseFlag|FALSE
gMarvellTokenSpaceGuid.PcdChip0MppBaseAddress|0xF06F4000
gMarvellTokenSpaceGuid.PcdChip0MppRegCount|3
gMarvellTokenSpaceGuid.PcdChip0MppSel0|{ 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x0 }
gMarvellTokenSpaceGuid.PcdChip0MppSel1|{ 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }


+Set pin 6 and 7 to 0xa function:

gMarvellTokenSpaceGuid.PcdChip0MppSel0|{ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xa, 0xa, 0x0, 0x0 }

diff --git a/Platforms/Marvell/Include/Library/MppLib.h b/Platforms/Marvell/Include/Library/MppLib.h
new file mode 100644
index 0000000..77c6cdb
--- /dev/null
+++ b/Platforms/Marvell/Include/Library/MppLib.h
@@ -0,0 +1,42 @@
+/********************************************************************************
+Copyright (C) 2016 Marvell International Ltd.



+Marvell BSD License Option



+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:



+* Redistributions of source code must retain the above copyright notice,

this list of conditions and the following disclaimer.


+* Redistributions in binary form must reproduce the above copyright

notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.


+* Neither the name of Marvell nor the names of its contributors may be

used to endorse or promote products derived from this software without
specific prior written permission.


+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.



+*******************************************************************************/



+#ifndef __MPPLIB_H__
+#define __MPPLIB_H__



+EFI_STATUS
+MppInitialize (

);


+#endif
diff --git a/Platforms/Marvell/Library/MppLib/MppLib.c b/Platforms/Marvell/Library/MppLib/MppLib.c
new file mode 100644
index 0000000..b24743c
--- /dev/null
+++ b/Platforms/Marvell/Library/MppLib/MppLib.c
@@ -0,0 +1,163 @@
+/********************************************************************************
+Copyright (C) 2016 Marvell International Ltd.



+Marvell BSD License Option



+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:



+* Redistributions of source code must retain the above copyright notice,

this list of conditions and the following disclaimer.


+* Redistributions in binary form must reproduce the above copyright

notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.


+* Neither the name of Marvell nor the names of its contributors may be

used to endorse or promote products derived from this software without
specific prior written permission.


+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.



+*******************************************************************************/



+#include <Library/ArmLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/IoLib.h>



+#define MPP_PIN_VAL(pin,func)    (((func) & 0xf) << ((pin) * 4))
+#define MPP_MAX_REGS             8
+#define MPP_PINS_PER_REG         8
+#define PCD_PINS_PER_GROUP       10



+#define MAX_CHIPS                4



+#define GET_PCD_PTR(id,num)      PcdGetPtr(PcdChip##id##MppSel##num)
+#define GET_PIN_COUNT(id)        PcdGet32(PcdChip##id##MppPinCount)
+#define GET_BASE(id)             PcdGet64(PcdChip##id##MppBaseAddress)
+#define GET_REV_FLAG(id)         PcdGetBool(PcdChip##id##MppReverseFlag)



+/* We get chip number */
+#define GetMppPcd(id) {                 \

PinCount[id] = GET_PIN_COUNT(id);     \
MppRegPcd[id][7] = GET_PCD_PTR(id,7); \
MppRegPcd[id][6] = GET_PCD_PTR(id,6); \
MppRegPcd[id][5] = GET_PCD_PTR(id,5); \
MppRegPcd[id][4] = GET_PCD_PTR(id,4); \
MppRegPcd[id][3] = GET_PCD_PTR(id,3); \
MppRegPcd[id][2] = GET_PCD_PTR(id,2); \
MppRegPcd[id][1] = GET_PCD_PTR(id,1); \
MppRegPcd[id][0] = GET_PCD_PTR(id,0); \
BaseAddr[id] = GET_BASE(id);          \
ReverseFlag[id] = GET_REV_FLAG(id);   \

+}



+STATIC
+VOID
+SetRegisterValue (

UINT8 RegCount,
UINT8 **MppRegPcd,
UINTN BaseAddr,
BOOLEAN ReverseFlag
)

+{

UINT32 i, j, CtrlVal;
INTN Sign;

Sign = ReverseFlag ? -1 : 1;

for (i = 0; i < RegCount; i++) {
CtrlVal = 0;
for (j = 0; j < MPP_PINS_PER_REG; j++) {
 CtrlVal |= MPP_PIN_VAL(7 * (UINTN) ReverseFlag + j * Sign,


   MppRegPcd[i][7 * (UINTN) ReverseFlag + j * Sign]);


}
MmioWrite32 (BaseAddr + 4 * i * Sign, CtrlVal);
}

+}



+STATIC
+/* Transform PCD MPP group format into hardware register format */
+UINT8
+PcdToMppRegs (

UINTN PinCount,
UINT8 **MppRegPcd
)

+{

UINT8 MppRegPcdTmp[MPP_MAX_REGS][MPP_PINS_PER_REG];
UINT8 PcdGroupCount, MppRegCount;
UINTN i, j, k, l;

if (PinCount == 0) {
return 0;
}

PcdGroupCount = PinCount / PCD_PINS_PER_GROUP;
if ((PinCount % PCD_PINS_PER_GROUP) != 0) {
PcdGroupCount += 1;
}

MppRegCount = PinCount / MPP_PINS_PER_REG;
if ((PinCount % MPP_PINS_PER_REG) != 0) {
MppRegCount += 1;
}

/* Fill temporary table with data from PCD groups in HW format */
for (i = 0; i < PcdGroupCount; i++) {
for (j = 0; j < PCD_PINS_PER_GROUP; j++) {
 k = (PCD_PINS_PER_GROUP * i + j) / MPP_PINS_PER_REG;


 l = (PCD_PINS_PER_GROUP * i + j) % MPP_PINS_PER_REG;


 MppRegPcdTmp[k][l] = MppRegPcd[i][j];


}
}

/* Update input table */
for (i = 0; i < MppRegCount; i++) {
for (j = 0; j < MPP_PINS_PER_REG; j++) {
 MppRegPcd[i][j] = MppRegPcdTmp[i][j];


}
}

return MppRegCount;

+}



+EFI_STATUS
+MppInitialize (

)

+{

UINTN BaseAddr[MAX_CHIPS], PinCount[MAX_CHIPS], RegCount;
BOOLEAN ReverseFlag[MAX_CHIPS];
UINT8 *MppRegPcd[MAX_CHIPS][MPP_MAX_REGS];
UINT32 i, ChipCount;

ChipCount = PcdGet32 (PcdMppChipCount);

/* Read all needed PCD for MPP configuration */
GetMppPcd(0);
GetMppPcd(1);
GetMppPcd(2);
GetMppPcd(3);

for (i = 0; i < MAX_CHIPS; i++) {
if (i == ChipCount)
 break;


RegCount = PcdToMppRegs (PinCount[i], MppRegPcd[i]);
SetRegisterValue (RegCount, MppRegPcd[i], BaseAddr[i], ReverseFlag[i]);
}

return EFI_SUCCESS;

+}
diff --git a/Platforms/Marvell/Library/MppLib/MppLib.inf b/Platforms/Marvell/Library/MppLib/MppLib.inf
new file mode 100644
index 0000000..510064f
--- /dev/null
+++ b/Platforms/Marvell/Library/MppLib/MppLib.inf
@@ -0,0 +1,107 @@
+#
+# Marvell BSD License Option
+#
+# If you received this File from Marvell, you may opt to use, redistribute
+# and/or modify this File under the following licensing terms.
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.
+#
+# * Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# * Neither the name of Marvell nor the names of its contributors may be
+# used to endorse or promote products derived from this software without
+# specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#



+[Defines]

INF_VERSION                    = 0x00010005
BASE_NAME                      = MarvellMppLib
FILE_GUID                      = 3f19b642-4a49-4dfd-8f4a-205dd38432bb
MODULE_TYPE                    = BASE
VERSION_STRING                 = 1.0
LIBRARY_CLASS                  = MppLib


+[Packages]

MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
OpenPlatformPkg/Platforms/Marvell/Marvell.dec


+[LibraryClasses]

ArmLib
DebugLib
MemoryAllocationLib
PcdLib
IoLib


+[Sources.common]

MppLib.c


+[FixedPcd]

gMarvellTokenSpaceGuid.PcdMppChipCount

gMarvellTokenSpaceGuid.PcdChip0MppReverseFlag
gMarvellTokenSpaceGuid.PcdChip0MppBaseAddress
gMarvellTokenSpaceGuid.PcdChip0MppPinCount
gMarvellTokenSpaceGuid.PcdChip0MppSel0
gMarvellTokenSpaceGuid.PcdChip0MppSel1
gMarvellTokenSpaceGuid.PcdChip0MppSel2
gMarvellTokenSpaceGuid.PcdChip0MppSel3
gMarvellTokenSpaceGuid.PcdChip0MppSel4
gMarvellTokenSpaceGuid.PcdChip0MppSel5
gMarvellTokenSpaceGuid.PcdChip0MppSel6
gMarvellTokenSpaceGuid.PcdChip0MppSel7

gMarvellTokenSpaceGuid.PcdChip1MppReverseFlag
gMarvellTokenSpaceGuid.PcdChip1MppBaseAddress
gMarvellTokenSpaceGuid.PcdChip1MppPinCount
gMarvellTokenSpaceGuid.PcdChip1MppSel0
gMarvellTokenSpaceGuid.PcdChip1MppSel1
gMarvellTokenSpaceGuid.PcdChip1MppSel2
gMarvellTokenSpaceGuid.PcdChip1MppSel3
gMarvellTokenSpaceGuid.PcdChip1MppSel4
gMarvellTokenSpaceGuid.PcdChip1MppSel5
gMarvellTokenSpaceGuid.PcdChip1MppSel6
gMarvellTokenSpaceGuid.PcdChip1MppSel7

gMarvellTokenSpaceGuid.PcdChip2MppReverseFlag
gMarvellTokenSpaceGuid.PcdChip2MppBaseAddress
gMarvellTokenSpaceGuid.PcdChip2MppPinCount
gMarvellTokenSpaceGuid.PcdChip2MppSel0
gMarvellTokenSpaceGuid.PcdChip2MppSel1
gMarvellTokenSpaceGuid.PcdChip2MppSel2
gMarvellTokenSpaceGuid.PcdChip2MppSel3
gMarvellTokenSpaceGuid.PcdChip2MppSel4
gMarvellTokenSpaceGuid.PcdChip2MppSel5
gMarvellTokenSpaceGuid.PcdChip2MppSel6
gMarvellTokenSpaceGuid.PcdChip2MppSel7

gMarvellTokenSpaceGuid.PcdChip3MppReverseFlag
gMarvellTokenSpaceGuid.PcdChip3MppBaseAddress
gMarvellTokenSpaceGuid.PcdChip3MppPinCount
gMarvellTokenSpaceGuid.PcdChip3MppSel0
gMarvellTokenSpaceGuid.PcdChip3MppSel1
gMarvellTokenSpaceGuid.PcdChip3MppSel2
gMarvellTokenSpaceGuid.PcdChip3MppSel3
gMarvellTokenSpaceGuid.PcdChip3MppSel4
gMarvellTokenSpaceGuid.PcdChip3MppSel5
gMarvellTokenSpaceGuid.PcdChip3MppSel6
gMarvellTokenSpaceGuid.PcdChip3MppSel7


diff --git a/Platforms/Marvell/Marvell.dec b/Platforms/Marvell/Marvell.dec
new file mode 100644
index 0000000..fee8025
--- /dev/null
+++ b/Platforms/Marvell/Marvell.dec
@@ -0,0 +1,106 @@
+# Copyright (C) 2016 Marvell International Ltd.
+#
+# Marvell BSD License Option
+#
+# If you received this File from Marvell, you may opt to use, redistribute and/or
+# modify this File under the following licensing terms.
+# Redistribution and use in source and binary forms, with or without modification,
+# are permitted provided that the following conditions are met:
+#
+#* Redistributions of source code must retain the above copyright notice,
+#  this list of conditions and the following disclaimer.
+#
+#* Redistributions in binary form must reproduce the above copyright
+#  notice, this list of conditions and the following disclaimer in the
+#  documentation and/or other materials provided with the distribution.
+#
+#* Neither the name of Marvell nor the names of its contributors may be
+#  used to endorse or promote products derived from this software without
+#  specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#



+[Defines]

DEC_SPECIFICATION              = 0x00010005
PACKAGE_NAME                   = OpenPlatformMarvellPkg
PACKAGE_GUID                   = c372916e-83ad-4b2a-8410-bbc31bd9e68f
PACKAGE_VERSION                = 0.1


+################################################################################
+#
+# Include Section - list of Include Paths that are provided by this package.
+#                   Comments are used for Keywords and Module Types.
+#
+# Supported Module Types:
+#  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#
+################################################################################



+[Includes]

Include


+[Guids.common]

gMarvellTokenSpaceGuid = { 0xf995c6c8, 0xbc9b, 0x4e93, { 0xbd, 0xcf, 0x49, 0x90, 0xc6, 0xe7, 0x8c, 0x7f } }


+[PcdsFixedAtBuild.common]
+#MPP

gMarvellTokenSpaceGuid.PcdMppChipCount|0|UINT32|0x30000001

gMarvellTokenSpaceGuid.PcdChip0MppReverseFlag|FALSE|BOOLEAN|0x30000002
gMarvellTokenSpaceGuid.PcdChip0MppBaseAddress|0|UINT64|0x30000003
gMarvellTokenSpaceGuid.PcdChip0MppPinCount|0|UINT32|0x30000004
gMarvellTokenSpaceGuid.PcdChip0MppSel0|{ 0 }|VOID*|0x30000005
gMarvellTokenSpaceGuid.PcdChip0MppSel1|{ 0 }|VOID*|0x30000006
gMarvellTokenSpaceGuid.PcdChip0MppSel2|{ 0 }|VOID*|0x30000007
gMarvellTokenSpaceGuid.PcdChip0MppSel3|{ 0 }|VOID*|0x30000008
gMarvellTokenSpaceGuid.PcdChip0MppSel4|{ 0 }|VOID*|0x30000009
gMarvellTokenSpaceGuid.PcdChip0MppSel5|{ 0 }|VOID*|0x30000010
gMarvellTokenSpaceGuid.PcdChip0MppSel6|{ 0 }|VOID*|0x30000011
gMarvellTokenSpaceGuid.PcdChip0MppSel7|{ 0 }|VOID*|0x30000012

gMarvellTokenSpaceGuid.PcdChip1MppReverseFlag|FALSE|BOOLEAN|0x30000013
gMarvellTokenSpaceGuid.PcdChip1MppBaseAddress|0|UINT64|0x30000014
gMarvellTokenSpaceGuid.PcdChip1MppPinCount|0|UINT32|0x30000015
gMarvellTokenSpaceGuid.PcdChip1MppSel0|{ 0 }|VOID*|0x30000016
gMarvellTokenSpaceGuid.PcdChip1MppSel1|{ 0 }|VOID*|0x30000017
gMarvellTokenSpaceGuid.PcdChip1MppSel2|{ 0 }|VOID*|0x30000018
gMarvellTokenSpaceGuid.PcdChip1MppSel3|{ 0 }|VOID*|0x30000019
gMarvellTokenSpaceGuid.PcdChip1MppSel4|{ 0 }|VOID*|0x30000020
gMarvellTokenSpaceGuid.PcdChip1MppSel5|{ 0 }|VOID*|0x30000021
gMarvellTokenSpaceGuid.PcdChip1MppSel6|{ 0 }|VOID*|0x30000022
gMarvellTokenSpaceGuid.PcdChip1MppSel7|{ 0 }|VOID*|0x30000023

gMarvellTokenSpaceGuid.PcdChip2MppReverseFlag|FALSE|BOOLEAN|0x30000024
gMarvellTokenSpaceGuid.PcdChip2MppBaseAddress|0|UINT64|0x30000025
gMarvellTokenSpaceGuid.PcdChip2MppPinCount|0|UINT32|0x30000026
gMarvellTokenSpaceGuid.PcdChip2MppSel0|{ 0 }|VOID*|0x30000027
gMarvellTokenSpaceGuid.PcdChip2MppSel1|{ 0 }|VOID*|0x30000028
gMarvellTokenSpaceGuid.PcdChip2MppSel2|{ 0 }|VOID*|0x30000029
gMarvellTokenSpaceGuid.PcdChip2MppSel3|{ 0 }|VOID*|0x30000030
gMarvellTokenSpaceGuid.PcdChip2MppSel4|{ 0 }|VOID*|0x30000031
gMarvellTokenSpaceGuid.PcdChip2MppSel5|{ 0 }|VOID*|0x30000032
gMarvellTokenSpaceGuid.PcdChip2MppSel6|{ 0 }|VOID*|0x30000033
gMarvellTokenSpaceGuid.PcdChip2MppSel7|{ 0 }|VOID*|0x30000034

gMarvellTokenSpaceGuid.PcdChip3MppReverseFlag|FALSE|BOOLEAN|0x30000035
gMarvellTokenSpaceGuid.PcdChip3MppBaseAddress|0|UINT64|0x30000036
gMarvellTokenSpaceGuid.PcdChip3MppPinCount|0|UINT32|0x30000037
gMarvellTokenSpaceGuid.PcdChip3MppSel0|{ 0 }|VOID*|0x30000038
gMarvellTokenSpaceGuid.PcdChip3MppSel1|{ 0 }|VOID*|0x30000039
gMarvellTokenSpaceGuid.PcdChip3MppSel2|{ 0 }|VOID*|0x30000040
gMarvellTokenSpaceGuid.PcdChip3MppSel3|{ 0 }|VOID*|0x30000041
gMarvellTokenSpaceGuid.PcdChip3MppSel4|{ 0 }|VOID*|0x30000042
gMarvellTokenSpaceGuid.PcdChip3MppSel5|{ 0 }|VOID*|0x30000043
gMarvellTokenSpaceGuid.PcdChip3MppSel6|{ 0 }|VOID*|0x30000044
gMarvellTokenSpaceGuid.PcdChip3MppSel7|{ 0 }|VOID*|0x30000045


-- 
1.8.3.1

    

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Re: [Linaro-uefi] [PATCH v5 03/22] Platforms/Marvell: Create MppLib