On 28 June 2016 at 15:03, Ard Biesheuvel ard.biesheuvel@linaro.org wrote:
On 24 June 2016 at 18:37, Ryan Harkin ryan.harkin@linaro.org wrote:
On 24 June 2016 at 11:29, Ard Biesheuvel ard.biesheuvel@linaro.org wrote:
This upgrades the MADT table so that it exposes the GIC as a v3. The virtual base address and interrupt, and the hypervisor base address are corrected as well.
Since the Foundation model has 4 cores at the most, and since refactoring this code to update the ACPI tables dynamically based on the actual core count is more trouble that its worth, remove the second cluster while we are at it.
I know I said I wasn't bothered about ACPI, and I'm not, but doesn't the AEMv8 model have 2 clusters of 4 cpus?
At the most, yes. My assumption is that the overhead of having the firmware figure this out at runtime, and patch the ACPI tables accordingly is not worth the trouble. FVP Base can run fine with 4 CPUs (or only one), so it is simply a matter of choosing a reasonable sweet spot.
Fair enough, I have no objection to that. I was mostly thinking about the DTB: people decided the kernel runs fine if the extra CPUs are missing in the model, so it has 8 CPUs and Foundation just runs without them.
Alternatively, we could go back to different versions for FVP Foundation and FVP Base, but I was just trying to keep it simple.
I wouldn't want that. Too much hassle!
-- Ard.