From: Chenhui Sun sunchenhui@huawei.com
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chenhui Sun sunchenhui@huawei.com --- .../Drivers/Es3000PerformanceDxe/Es3000Dxe.c | 137 +++++++++++++++++++++ .../Drivers/Es3000PerformanceDxe/Es3000Dxe.inf | 57 +++++++++ Platforms/Hisilicon/D05/D05.dsc | 1 + Platforms/Hisilicon/D05/D05.fdf | 3 +- 4 files changed, 197 insertions(+), 1 deletion(-) create mode 100644 Chips/Hisilicon/Hi1610/Drivers/Es3000PerformanceDxe/Es3000Dxe.c create mode 100644 Chips/Hisilicon/Hi1610/Drivers/Es3000PerformanceDxe/Es3000Dxe.inf
diff --git a/Chips/Hisilicon/Hi1610/Drivers/Es3000PerformanceDxe/Es3000Dxe.c b/Chips/Hisilicon/Hi1610/Drivers/Es3000PerformanceDxe/Es3000Dxe.c new file mode 100644 index 0000000..4968f82 --- /dev/null +++ b/Chips/Hisilicon/Hi1610/Drivers/Es3000PerformanceDxe/Es3000Dxe.c @@ -0,0 +1,137 @@ +/** @file +* +* Copyright (c) 2016, Hisilicon Limited. All rights reserved. +* Copyright (c) 2016, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include <Uefi.h> +#include <Library/DebugLib.h> +#include <Library/UefiBootServicesTableLib.h> + +#include <Library/PlatformSysCtrlLib.h> +#include <Library/SerdesLib.h> +#include <Protocol/PciIo.h> +#include <Protocol/PciRootBridgeIo.h> +#include <IndustryStandard/Pci.h> + +UINT64 PCIE_APB_SLVAE_BASE_1616[2][8] = {{0xa0090000, 0xa0200000, 0xa00a0000, 0xa00b0000, 0x8a0090000, 0x8a0200000, 0x8a00a0000, 0x8a00b0000}, + {0x600a0090000, 0x600a0200000, 0x600a00a0000, 0x600a00b0000, 0x700a0090000, 0x700a0200000, 0x700a00a0000, 0x700a00b0000},}; +UINT8 PCIE_ROOT_BRIDGE_BUS_NUM_1P[8] = {0x10, 0x21, 0x81, 0x30, 0x40, 0x1, 0x60, 0x70}; +UINT8 PCIE_ROOT_BRIDGE_BUS_NUM_2P[8] = {0x80, 0x90, 0x11, 0x40, 0x21, 0x31, 0x60, 0x70}; + +#define RegWrite(addr,data) (*(volatile UINT32*)(UINTN)(addr) = (data)) +#define RegRead(addr,data) ((data) = *(volatile UINT32*)(UINTN)(addr)) + + +VOID +EFIAPI +OemEs3000PerformaceOperation( + IN EFI_EVENT Event, + IN VOID *Context + ) + +{ + EFI_STATUS Status; + UINTN HandleIndex; + EFI_HANDLE *HandleBuffer; + UINTN HandleCount; + EFI_PCI_IO_PROTOCOL *PciIo; + UINTN SegmentNumber; + UINTN BusNumber; + UINTN DeviceNumber; + UINTN FunctionNumber; + UINT16 DeviceId = 0; + UINT16 VenderId = 0; + UINT8 i = 0; + UINT32 Value = 0; + + Status = gBS->LocateHandleBuffer ( + ByProtocol, + &gEfiPciIoProtocolGuid, + NULL, + &HandleCount, + &HandleBuffer + ); + if(EFI_ERROR(Status)) { + DEBUG((EFI_D_ERROR, " Locate gEfiPciIoProtocol Failed.\n")); + //gBS->FreePool ((VOID *)HandleBuffer); + return; + } + DEBUG((EFI_D_ERROR, "HandleCount = %d\n", HandleCount)); + for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) { + (VOID)gBS->HandleProtocol ( + HandleBuffer[HandleIndex], + &gEfiPciIoProtocolGuid, + (VOID **)&PciIo + ); + + (VOID)PciIo->GetLocation(PciIo,&SegmentNumber,&BusNumber,&DeviceNumber,&FunctionNumber); + + DEBUG((EFI_D_ERROR,"PCIe device plot in slot Seg %d bdf %d %d %d\r\n",SegmentNumber,BusNumber,DeviceNumber,FunctionNumber)); + (VOID)PciIo->Pci.Read(PciIo,EfiPciIoWidthUint16,PCI_DEVICE_ID_OFFSET,1,&DeviceId); + (VOID)PciIo->Pci.Read(PciIo,EfiPciIoWidthUint16,PCI_VENDOR_ID_OFFSET,1,&VenderId); + if((DeviceId == 0x0123) && (VenderId == 0x19e5)) { + if (SegmentNumber == 0) { + for(i = 0; i < 8; i ++) { + if (BusNumber == PCIE_ROOT_BRIDGE_BUS_NUM_1P[i]) + break; + } + } + if (SegmentNumber == 1) { + for(i = 0; i < 8; i ++) { + if (BusNumber == PCIE_ROOT_BRIDGE_BUS_NUM_2P[i]) + break; + } + } + DEBUG((EFI_D_ERROR,"find es3000...............\n")); + DEBUG((EFI_D_ERROR,"Segment = %d, i = %d, PCIE APB SLAVE BASE = %lx\n",SegmentNumber, i, PCIE_APB_SLVAE_BASE_1616[SegmentNumber][i])); + RegWrite((UINT64)PCIE_APB_SLVAE_BASE_1616[SegmentNumber][i] + 0x1110, 0x28002fff); + RegRead((UINT64)PCIE_APB_SLVAE_BASE_1616[SegmentNumber][i] + 0x1110, Value); + DEBUG((EFI_D_ERROR,"Read value = %lx\n",Value)); + DEBUG((EFI_D_ERROR, "Device Id = %x, Vender Id = %x\n",VenderId, DeviceId)); + + } + + } + + return; +} + +EFI_STATUS +EFIAPI +Es3000PerformanceDxeEntry ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable) +{ + EFI_STATUS Status; + EFI_EVENT Event = NULL; + + // + // Register notify function + // + Status = gBS->CreateEvent ( + EVT_SIGNAL_EXIT_BOOT_SERVICES, + TPL_CALLBACK, + OemEs3000PerformaceOperation, + NULL, + &Event + ); + + if (EFI_ERROR(Status)) + { + DEBUG ((EFI_D_ERROR, "[%a:%d] - Es3000 performace createEvent failed: %r\n", __FUNCTION__, + __LINE__, Status)); + } + + return Status; +} + diff --git a/Chips/Hisilicon/Hi1610/Drivers/Es3000PerformanceDxe/Es3000Dxe.inf b/Chips/Hisilicon/Hi1610/Drivers/Es3000PerformanceDxe/Es3000Dxe.inf new file mode 100644 index 0000000..e0d3429 --- /dev/null +++ b/Chips/Hisilicon/Hi1610/Drivers/Es3000PerformanceDxe/Es3000Dxe.inf @@ -0,0 +1,57 @@ +#/** @file +# +# Copyright (c) 2015, Hisilicon Limited. All rights reserved. +# Copyright (c) 2015, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = Es3000Dxe + FILE_GUID = f99c606a-5826-11e6-b09e-bb93f4e4c402 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + + ENTRY_POINT = Es3000PerformanceDxeEntry + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = AARCH64 +# + +[Sources.common] + Es3000Dxe.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + ArmPkg/ArmPkg.dec + OpenPlatformPkg/Chips/Hisilicon/HisiPkg.dec + +[LibraryClasses] + UefiBootServicesTableLib + UefiDriverEntryPoint + DebugLib + BaseLib + PcdLib + CacheMaintenanceLib + +[Guids] + +[Protocols] + gEfiPciIoProtocolGuid + +[Pcd] + +[Depex] + gEfiPciIoProtocolGuid + diff --git a/Platforms/Hisilicon/D05/D05.dsc b/Platforms/Hisilicon/D05/D05.dsc index 8191459..8dfcca4 100644 --- a/Platforms/Hisilicon/D05/D05.dsc +++ b/Platforms/Hisilicon/D05/D05.dsc @@ -619,6 +619,7 @@ OpenPlatformPkg/Chips/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf OpenPlatformPkg/Platforms/Hisilicon/Binary/D05/Drivers/Sm750Dxe/UefiSmi.inf MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf + OpenPlatformPkg/Chips/Hisilicon/Hi1610/Drivers/Es3000PerformanceDxe/Es3000Dxe.inf OpenPlatformPkg/Chips/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
diff --git a/Platforms/Hisilicon/D05/D05.fdf b/Platforms/Hisilicon/D05/D05.fdf index 3081058..82a6a7e 100644 --- a/Platforms/Hisilicon/D05/D05.fdf +++ b/Platforms/Hisilicon/D05/D05.fdf @@ -292,8 +292,9 @@ READ_LOCK_STATUS = TRUE # INF OpenPlatformPkg/Platforms/Hisilicon/Binary/D05/Drivers/Sm750Dxe/UefiSmi.inf INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf - INF OpenPlatformPkg/Platforms/Hisilicon/Binary/D05/Drivers/SasPlatform/SasPlatform.inf + INF OpenPlatformPkg/Chips/Hisilicon/Hi1610/Drivers/Es3000PerformanceDxe/Es3000Dxe.inf INF OpenPlatformPkg/Platforms/Hisilicon/Binary/D05/Drivers/Sas/SasDxeDriver.inf + INF OpenPlatformPkg/Platforms/Hisilicon/Binary/D05/Drivers/SasPlatform/SasPlatform.inf # # UEFI application (Shell Embedded Boot Loader) #