On 2 May 2016 at 00:27, Duran, Leo leo.duran@amd.com wrote:
Actually, I probably should have said: Considering that ARM_CORE_INFO defines MailboxClearValue as UINT64, it seems reasonable to allow 64-bit MMMIO access.
I spent some time looking into this.
The EFI_PHYSICAL_ADDRESS field in ARM_CORE_INFO is the size of the *address* of the mailbox register, not the size of the register itself. However, I think it is reasonable to stipulate that mailbox registers are at least native word size, and the type of the MailboxClearValue field already suggests that.
So what I propose is to: - remove MPCore functionality from Juno and FVP, since they are the only ones that use a 32-bit mailbox register on a 64-bit arch - retype MailboxClearValue as UINTN, and update the related code accordingly - remove the code that installs an mpcore configuration table that is consumed by the linuxloader - implement an ACPI parking protocol DXE
I am not sure whether we are interested in having code upstream that manipulates the DT cpu nodes to assign the mailbox addresses. I think for now, ACPI support is sufficient and we can look into DT when anyone asks for it.